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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Alistair Francis <alistair.francis@xilinx.com>,
	Peter Maydell <peter.maydell@linaro.org>
Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	qemu-devel@nongnu.org,
	"Edgar E . Iglesias" <edgar.iglesias@xilinx.com>,
	"Andrey Smirnov" <andrew.smirnov@gmail.com>,
	"Prasad J Pandit" <pjp@fedoraproject.org>,
	"Sai Pavan Boddu" <saipava@xilinx.com>,
	"Peter Crosthwaite" <crosthwaite.peter@gmail.com>,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	"open list:Xilinx ZynqMP" <qemu-arm@nongnu.org>
Subject: [Qemu-devel] [PATCH v7 06/14] hw/arm/xilinx_zynqmp: implement SDHCI Spec v3
Date: Thu, 18 Jan 2018 17:40:50 -0300	[thread overview]
Message-ID: <20180118204058.5768-7-f4bug@amsat.org> (raw)
In-Reply-To: <20180118204058.5768-1-f4bug@amsat.org>

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/arm/xlnx-zynqmp.c | 40 +++++++++++++++++++++++++++++-----------
 1 file changed, 29 insertions(+), 11 deletions(-)

diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 325642058b..c4f6638ab7 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -381,22 +381,40 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
     sysbus_connect_irq(SYS_BUS_DEVICE(&s->sata), 0, gic_spi[SATA_INTR]);
 
     for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) {
-        char *bus_name;
-
-        object_property_set_bool(OBJECT(&s->sdhci[i]), true,
-                                 "realized", &err);
+        char *bus_name = g_strdup_printf("sd-bus%d", i);
+        SysBusDevice *sbd = SYS_BUS_DEVICE(&s->sdhci[i]);
+        Object *sdhci = OBJECT(&s->sdhci[i]);
+
+        /* Compatible with:
+         * - SD Host Controller Specification Version 3.00
+         * - SDIO Specification Version 3.0
+         * - eMMC Specification Version 4.51
+         *
+         * Host clock rate variable between 0 and 208 MHz
+         * Transfers the data in SDR104, SDR50, DDR50 modes
+         * (SDR104 mode: up to 832Mbits/s using 4 parallel data lines)
+         * Transfers the data in 1 bit and 4 bit SD modes
+         * UHS speed modes, 1.8V
+         * voltage switch, tuning commands
+         */
+        object_property_set_uint(sdhci, 3, "sd-spec-version", &err);
+        object_property_set_uint(sdhci, 0, "timeout-freq", &err);
+        object_property_set_uint(sdhci, 0, "max-frequency", &err);
+        object_property_set_bool(sdhci, true, "suspend", &err);
+        object_property_set_bool(sdhci, false, "adma1", &err);
+        object_property_set_bool(sdhci, true, "64bit", &err);
+        object_property_set_uint(sdhci, 0b111, "bus-speed", &err);
+        object_property_set_uint(sdhci, 0b111, "driver-strength", &err);
+        object_property_set_bool(sdhci, true, "realized", &err);
         if (err) {
             error_propagate(errp, err);
             return;
         }
-        sysbus_mmio_map(SYS_BUS_DEVICE(&s->sdhci[i]), 0,
-                        sdhci_addr[i]);
-        sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci[i]), 0,
-                           gic_spi[sdhci_intr[i]]);
+        sysbus_mmio_map(sbd, 0, sdhci_addr[i]);
+        sysbus_connect_irq(sbd, 0, gic_spi[sdhci_intr[i]]);
+
         /* Alias controller SD bus to the SoC itself */
-        bus_name = g_strdup_printf("sd-bus%d", i);
-        object_property_add_alias(OBJECT(s), bus_name,
-                                  OBJECT(&s->sdhci[i]), "sd-bus",
+        object_property_add_alias(OBJECT(s), bus_name, sdhci, "sd-bus",
                                   &error_abort);
         g_free(bus_name);
     }
-- 
2.15.1

  parent reply	other threads:[~2018-01-18 20:41 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-18 20:40 [Qemu-devel] [PATCH v7 00/14] SDHCI: add tunning sequence for UHS-I cards (part 3) Philippe Mathieu-Daudé
2018-01-18 20:40 ` [Qemu-devel] [PATCH v7 01/14] sdhci: add v3 capabilities Philippe Mathieu-Daudé
2018-01-18 20:40 ` [Qemu-devel] [PATCH v7 02/14] sdhci: rename the hostctl1 register Philippe Mathieu-Daudé
2018-01-18 20:40 ` [Qemu-devel] [PATCH v7 03/14] hw/arm/bcm2835_peripherals: implement SDHCI Spec v3 Philippe Mathieu-Daudé
2018-01-18 20:40 ` [Qemu-devel] [PATCH v7 04/14] hw/arm/bcm2835_peripherals: change maximum block size to 1kB Philippe Mathieu-Daudé
2018-01-18 20:40 ` [Qemu-devel] [PATCH v7 05/14] hw/arm/fsl-imx6: implement SDHCI Spec v3 Philippe Mathieu-Daudé
2018-01-18 20:40 ` Philippe Mathieu-Daudé [this message]
2018-01-18 20:40 ` [Qemu-devel] [PATCH v7 07/14] sdhci: check Spec v3 capabilities qtest Philippe Mathieu-Daudé
2018-01-18 20:40 ` [Qemu-devel] [PATCH v7 08/14] sdhci: add a check_capab_v3() qtest Philippe Mathieu-Daudé
2018-01-18 20:40 ` [Qemu-devel] [PATCH v7 09/14] sdhci: remove the deprecated 'capareg' property Philippe Mathieu-Daudé
2018-01-18 20:40 ` [Qemu-devel] [PATCH v7 10/14] sdhci: add Spec v4.2 register definitions Philippe Mathieu-Daudé
2018-01-18 20:40 ` [Qemu-devel] [PATCH v7 11/14] sdhci: implement the Host Control 2 register for the tunning sequence Philippe Mathieu-Daudé
2018-01-18 21:40   ` Eric Blake
2018-01-18 21:50     ` Philippe Mathieu-Daudé
2018-01-18 20:40 ` [Qemu-devel] [PATCH v7 12/14] sdbus: add trace events Philippe Mathieu-Daudé
2018-01-18 20:40 ` [Qemu-devel] [PATCH v7 13/14] sdhci: implement UHS-I voltage switch Philippe Mathieu-Daudé
2018-01-18 20:40 ` [Qemu-devel] [PATCH v7 14/14] sdhci: implement CMD/DAT[] fields in the Present State register Philippe Mathieu-Daudé

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