* [Qemu-devel] [PATCH] sii3112: Add explicit type casts to avoid unintended sign extension
@ 2018-01-18 18:18 BALATON Zoltan
2018-01-19 4:17 ` David Gibson
0 siblings, 1 reply; 2+ messages in thread
From: BALATON Zoltan @ 2018-01-18 18:18 UTC (permalink / raw)
To: qemu-devel, qemu-ppc; +Cc: Peter Maydell, David Gibson, Greg Kurz, Michael Roth
Noticed by Coverity
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
hw/ide/sii3112.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/ide/sii3112.c b/hw/ide/sii3112.c
index e2f5562..17aa930 100644
--- a/hw/ide/sii3112.c
+++ b/hw/ide/sii3112.c
@@ -79,13 +79,13 @@ static uint64_t sii3112_reg_read(void *opaque, hwaddr addr,
val |= (d->regs[0].confstat & (1UL << 11) ? (1 << 4) : 0); /*SATAINT0*/
val |= (d->regs[1].confstat & (1UL << 11) ? (1 << 6) : 0); /*SATAINT1*/
val |= (d->i.bmdma[1].status & BM_STATUS_INT ? (1 << 14) : 0);
- val |= d->i.bmdma[0].status << 16;
- val |= d->i.bmdma[1].status << 24;
+ val |= (uint32_t)d->i.bmdma[0].status << 16;
+ val |= (uint32_t)d->i.bmdma[1].status << 24;
break;
case 0x18:
val = d->i.bmdma[1].cmd;
val |= (d->regs[1].confstat & (1UL << 11) ? (1 << 4) : 0);
- val |= d->i.bmdma[1].status << 16;
+ val |= (uint32_t)d->i.bmdma[1].status << 16;
break;
case 0x80 ... 0x87:
if (size == 1) {
@@ -128,7 +128,7 @@ static uint64_t sii3112_reg_read(void *opaque, hwaddr addr,
val = (d->i.bus[0].ifs[0].blk) ? 0x113 : 0;
break;
case 0x148:
- val = d->regs[0].sien << 16;
+ val = (uint32_t)d->regs[0].sien << 16;
break;
case 0x180:
val = d->regs[1].scontrol;
@@ -137,7 +137,7 @@ static uint64_t sii3112_reg_read(void *opaque, hwaddr addr,
val = (d->i.bus[1].ifs[0].blk) ? 0x113 : 0;
break;
case 0x1c8:
- val = d->regs[1].sien << 16;
+ val = (uint32_t)d->regs[1].sien << 16;
break;
default:
val = 0;
--
2.7.6
^ permalink raw reply related [flat|nested] 2+ messages in thread* Re: [Qemu-devel] [PATCH] sii3112: Add explicit type casts to avoid unintended sign extension
2018-01-18 18:18 [Qemu-devel] [PATCH] sii3112: Add explicit type casts to avoid unintended sign extension BALATON Zoltan
@ 2018-01-19 4:17 ` David Gibson
0 siblings, 0 replies; 2+ messages in thread
From: David Gibson @ 2018-01-19 4:17 UTC (permalink / raw)
To: BALATON Zoltan
Cc: qemu-devel, qemu-ppc, Peter Maydell, Greg Kurz, Michael Roth
[-- Attachment #1: Type: text/plain, Size: 2209 bytes --]
On Thu, Jan 18, 2018 at 07:18:59PM +0100, BALATON Zoltan wrote:
> Noticed by Coverity
>
> Reported-by: Peter Maydell <peter.maydell@linaro.org>
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Applied to ppc-for-2.12, thanks.
> ---
> hw/ide/sii3112.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/hw/ide/sii3112.c b/hw/ide/sii3112.c
> index e2f5562..17aa930 100644
> --- a/hw/ide/sii3112.c
> +++ b/hw/ide/sii3112.c
> @@ -79,13 +79,13 @@ static uint64_t sii3112_reg_read(void *opaque, hwaddr addr,
> val |= (d->regs[0].confstat & (1UL << 11) ? (1 << 4) : 0); /*SATAINT0*/
> val |= (d->regs[1].confstat & (1UL << 11) ? (1 << 6) : 0); /*SATAINT1*/
> val |= (d->i.bmdma[1].status & BM_STATUS_INT ? (1 << 14) : 0);
> - val |= d->i.bmdma[0].status << 16;
> - val |= d->i.bmdma[1].status << 24;
> + val |= (uint32_t)d->i.bmdma[0].status << 16;
> + val |= (uint32_t)d->i.bmdma[1].status << 24;
> break;
> case 0x18:
> val = d->i.bmdma[1].cmd;
> val |= (d->regs[1].confstat & (1UL << 11) ? (1 << 4) : 0);
> - val |= d->i.bmdma[1].status << 16;
> + val |= (uint32_t)d->i.bmdma[1].status << 16;
> break;
> case 0x80 ... 0x87:
> if (size == 1) {
> @@ -128,7 +128,7 @@ static uint64_t sii3112_reg_read(void *opaque, hwaddr addr,
> val = (d->i.bus[0].ifs[0].blk) ? 0x113 : 0;
> break;
> case 0x148:
> - val = d->regs[0].sien << 16;
> + val = (uint32_t)d->regs[0].sien << 16;
> break;
> case 0x180:
> val = d->regs[1].scontrol;
> @@ -137,7 +137,7 @@ static uint64_t sii3112_reg_read(void *opaque, hwaddr addr,
> val = (d->i.bus[1].ifs[0].blk) ? 0x113 : 0;
> break;
> case 0x1c8:
> - val = d->regs[1].sien << 16;
> + val = (uint32_t)d->regs[1].sien << 16;
> break;
> default:
> val = 0;
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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