[Qemu-devel] [PATCH] target/arm: Fix 32-bit address truncation

[Qemu-devel] [PATCH] target/arm: Fix 32-bit address truncation

[Ard Biesheuvel]

Commit ("3b39d734141a target/arm: Handle page table walk load failures
correctly") modified both versions of the page table walking code (i.e.,
arm_ldl_ptw and arm_ldq_ptw) to record the result of the translation in
a temporary 'data' variable so that it can be inspected before being
returned. However, arm_ldq_ptw() returns an uint64_t, and using a
temporary uint32_t variable truncates the upper bits, corrupting the
result. This causes problems when using more than 4 GB of memory in
a TCG guest. So use a uint64_t instead.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
 target/arm/helper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/arm/helper.c b/target/arm/helper.c
index 67059033019c..a41b6c3a1b82 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -8368,7 +8368,7 @@ static uint64_t arm_ldq_ptw(CPUState *cs, hwaddr addr, bool is_secure,
     MemTxAttrs attrs = {};
     MemTxResult result = MEMTX_OK;
     AddressSpace *as;
-    uint32_t data;
+    uint64_t data;
 
     attrs.secure = is_secure;
     as = arm_addressspace(cs, attrs);
-- 
2.11.0

Re: [Qemu-devel] [PATCH] target/arm: Fix 32-bit address truncation

[Peter Maydell]

On 19 January 2018 at 19:46, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:
> Commit ("3b39d734141a target/arm: Handle page table walk load failures
> correctly") modified both versions of the page table walking code (i.e.,
> arm_ldl_ptw and arm_ldq_ptw) to record the result of the translation in
> a temporary 'data' variable so that it can be inspected before being
> returned. However, arm_ldq_ptw() returns an uint64_t, and using a
> temporary uint32_t variable truncates the upper bits, corrupting the
> result. This causes problems when using more than 4 GB of memory in
> a TCG guest. So use a uint64_t instead.
>
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

Oops. As you probably guessed, I wrote the 32-bit load function
first and then failed to update it correctly when writing the 64-bit
version...

Applied to target-arm.next, thanks.

-- PMM