From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org
Cc: groug@kaod.org, qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
lvivier@redhat.com, surajjs@au1.ibm.com,
BALATON Zoltan <balaton@eik.bme.hu>,
David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PULL 10/12] sii3112: Add explicit type casts to avoid unintended sign extension
Date: Sun, 21 Jan 2018 16:33:51 +1100 [thread overview]
Message-ID: <20180121053353.25970-11-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20180121053353.25970-1-david@gibson.dropbear.id.au>
From: BALATON Zoltan <balaton@eik.bme.hu>
Noticed by Coverity
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/ide/sii3112.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/ide/sii3112.c b/hw/ide/sii3112.c
index e2f5562bb7..17aa930e39 100644
--- a/hw/ide/sii3112.c
+++ b/hw/ide/sii3112.c
@@ -79,13 +79,13 @@ static uint64_t sii3112_reg_read(void *opaque, hwaddr addr,
val |= (d->regs[0].confstat & (1UL << 11) ? (1 << 4) : 0); /*SATAINT0*/
val |= (d->regs[1].confstat & (1UL << 11) ? (1 << 6) : 0); /*SATAINT1*/
val |= (d->i.bmdma[1].status & BM_STATUS_INT ? (1 << 14) : 0);
- val |= d->i.bmdma[0].status << 16;
- val |= d->i.bmdma[1].status << 24;
+ val |= (uint32_t)d->i.bmdma[0].status << 16;
+ val |= (uint32_t)d->i.bmdma[1].status << 24;
break;
case 0x18:
val = d->i.bmdma[1].cmd;
val |= (d->regs[1].confstat & (1UL << 11) ? (1 << 4) : 0);
- val |= d->i.bmdma[1].status << 16;
+ val |= (uint32_t)d->i.bmdma[1].status << 16;
break;
case 0x80 ... 0x87:
if (size == 1) {
@@ -128,7 +128,7 @@ static uint64_t sii3112_reg_read(void *opaque, hwaddr addr,
val = (d->i.bus[0].ifs[0].blk) ? 0x113 : 0;
break;
case 0x148:
- val = d->regs[0].sien << 16;
+ val = (uint32_t)d->regs[0].sien << 16;
break;
case 0x180:
val = d->regs[1].scontrol;
@@ -137,7 +137,7 @@ static uint64_t sii3112_reg_read(void *opaque, hwaddr addr,
val = (d->i.bus[1].ifs[0].blk) ? 0x113 : 0;
break;
case 0x1c8:
- val = d->regs[1].sien << 16;
+ val = (uint32_t)d->regs[1].sien << 16;
break;
default:
val = 0;
--
2.14.3
next prev parent reply other threads:[~2018-01-21 5:34 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-21 5:33 [Qemu-devel] [PULL 00/12] ppc-for-2.12 queue 20180121 David Gibson
2018-01-21 5:33 ` [Qemu-devel] [PULL 01/12] default-configs/ppc64-softmmu: Include 32-bit configs instead of copying them David Gibson
2018-01-21 5:33 ` [Qemu-devel] [PULL 02/12] default-configs/ppc-softmmu: Restructure the switches according to the machines David Gibson
2018-01-21 5:33 ` [Qemu-devel] [PULL 03/12] hw/ppc/Makefile: Add a way to disable the PPC4xx boards David Gibson
2018-01-21 5:33 ` [Qemu-devel] [PULL 04/12] target/ppc: fix doorbell and hypervisor doorbell definitions David Gibson
2018-01-21 5:33 ` [Qemu-devel] [PULL 05/12] target/ppc: msgsnd and msgclr instructions need hypervisor privilege David Gibson
2018-01-21 5:33 ` [Qemu-devel] [PULL 06/12] spapr: drop duplicate variable in spapr_core_plug() David Gibson
2018-01-21 5:33 ` [Qemu-devel] [PULL 07/12] spapr: fix device tree properties when using compatibility mode David Gibson
2018-01-21 5:33 ` [Qemu-devel] [PULL 08/12] target-ppc: optimize cmp translation David Gibson
2018-01-21 5:33 ` [Qemu-devel] [PULL 09/12] sm501: Add missing break to case David Gibson
2018-01-21 5:33 ` David Gibson [this message]
2018-01-21 5:33 ` [Qemu-devel] [PULL 11/12] target/ppc: add support for hypervisor doorbells on book3s CPUs David Gibson
2018-01-21 5:33 ` [Qemu-devel] [PULL 12/12] target/ppc/spapr_caps: Add macro to generate spapr_caps migration vmstate David Gibson
2018-01-22 13:17 ` [Qemu-devel] [PULL 00/12] ppc-for-2.12 queue 20180121 Peter Maydell
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