From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 29/43] target/hppa: Add system registers to gdbstub
Date: Sun, 21 Jan 2018 19:42:03 -0800 [thread overview]
Message-ID: <20180122034217.19593-30-richard.henderson@linaro.org> (raw)
In-Reply-To: <20180122034217.19593-1-richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hppa/gdbstub.c | 156 ++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 156 insertions(+)
diff --git a/target/hppa/gdbstub.c b/target/hppa/gdbstub.c
index fc27aec073..e2e9c4d77f 100644
--- a/target/hppa/gdbstub.c
+++ b/target/hppa/gdbstub.c
@@ -41,15 +41,93 @@ int hppa_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
case 33:
val = env->iaoq_f;
break;
+ case 34:
+ val = env->iasq_f >> 32;
+ break;
case 35:
val = env->iaoq_b;
break;
+ case 36:
+ val = env->iasq_b >> 32;
+ break;
+ case 37:
+ val = env->cr[CR_EIEM];
+ break;
+ case 38:
+ val = env->cr[CR_IIR];
+ break;
+ case 39:
+ val = env->cr[CR_ISR];
+ break;
+ case 40:
+ val = env->cr[CR_IOR];
+ break;
+ case 41:
+ val = env->cr[CR_IPSW];
+ break;
+ case 43:
+ val = env->sr[4] >> 32;
+ break;
+ case 44:
+ val = env->sr[0] >> 32;
+ break;
+ case 45:
+ val = env->sr[1] >> 32;
+ break;
+ case 46:
+ val = env->sr[2] >> 32;
+ break;
+ case 47:
+ val = env->sr[3] >> 32;
+ break;
+ case 48:
+ val = env->sr[5] >> 32;
+ break;
+ case 49:
+ val = env->sr[6] >> 32;
+ break;
+ case 50:
+ val = env->sr[7] >> 32;
+ break;
+ case 51:
+ val = env->cr[CR_RC];
+ break;
+ case 52:
+ val = env->cr[8];
+ break;
+ case 53:
+ val = env->cr[9];
+ break;
+ case 54:
+ val = env->cr[CR_SCRCCR];
+ break;
+ case 55:
+ val = env->cr[12];
+ break;
+ case 56:
+ val = env->cr[13];
+ break;
+ case 57:
+ val = env->cr[24];
+ break;
+ case 58:
+ val = env->cr[25];
+ break;
case 59:
val = env->cr[26];
break;
case 60:
val = env->cr[27];
break;
+ case 61:
+ val = env->cr[28];
+ break;
+ case 62:
+ val = env->cr[29];
+ break;
+ case 63:
+ val = env->cr[30];
+ break;
case 64 ... 127:
val = extract64(env->fr[(n - 64) / 2], (n & 1 ? 0 : 32), 32);
break;
@@ -94,15 +172,93 @@ int hppa_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
case 33:
env->iaoq_f = val;
break;
+ case 34:
+ env->iasq_f = (uint64_t)val << 32;
+ break;
case 35:
env->iaoq_b = val;
break;
+ case 36:
+ env->iasq_b = (uint64_t)val << 32;
+ break;
+ case 37:
+ env->cr[CR_EIEM] = val;
+ break;
+ case 38:
+ env->cr[CR_IIR] = val;
+ break;
+ case 39:
+ env->cr[CR_ISR] = val;
+ break;
+ case 40:
+ env->cr[CR_IOR] = val;
+ break;
+ case 41:
+ env->cr[CR_IPSW] = val;
+ break;
+ case 43:
+ env->sr[4] = (uint64_t)val << 32;
+ break;
+ case 44:
+ env->sr[0] = (uint64_t)val << 32;
+ break;
+ case 45:
+ env->sr[1] = (uint64_t)val << 32;
+ break;
+ case 46:
+ env->sr[2] = (uint64_t)val << 32;
+ break;
+ case 47:
+ env->sr[3] = (uint64_t)val << 32;
+ break;
+ case 48:
+ env->sr[5] = (uint64_t)val << 32;
+ break;
+ case 49:
+ env->sr[6] = (uint64_t)val << 32;
+ break;
+ case 50:
+ env->sr[7] = (uint64_t)val << 32;
+ break;
+ case 51:
+ env->cr[CR_RC] = val;
+ break;
+ case 52:
+ env->cr[8] = val;
+ break;
+ case 53:
+ env->cr[9] = val;
+ break;
+ case 54:
+ env->cr[CR_SCRCCR] = val;
+ break;
+ case 55:
+ env->cr[12] = val;
+ break;
+ case 56:
+ env->cr[13] = val;
+ break;
+ case 57:
+ env->cr[24] = val;
+ break;
+ case 58:
+ env->cr[25] = val;
+ break;
case 59:
env->cr[26] = val;
break;
case 60:
env->cr[27] = val;
break;
+ case 61:
+ env->cr[28] = val;
+ break;
+ case 62:
+ env->cr[29] = val;
+ break;
+ case 63:
+ env->cr[30] = val;
+ break;
case 64:
env->fr[0] = deposit64(env->fr[0], 32, 32, val);
cpu_hppa_loaded_fr0(env);
--
2.14.3
next prev parent reply other threads:[~2018-01-22 3:43 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-22 3:41 [Qemu-devel] [PULL 00/43] Add hppa-softmmu Richard Henderson
2018-01-22 3:41 ` [Qemu-devel] [PULL 01/43] target/hppa: Skeleton support for hppa-softmmu Richard Henderson
2018-01-22 3:41 ` [Qemu-devel] [PULL 02/43] target/hppa: Define the rest of the PSW Richard Henderson
2018-01-22 3:41 ` [Qemu-devel] [PULL 03/43] target/hppa: Disable gateway page emulation for system mode Richard Henderson
2018-01-22 3:41 ` [Qemu-devel] [PULL 04/43] target/hppa: Define hardware exception types Richard Henderson
2018-01-22 3:41 ` [Qemu-devel] [PULL 05/43] target/hppa: Split address size from register size Richard Henderson
2018-01-22 3:41 ` [Qemu-devel] [PULL 06/43] target/hppa: Implement mmu_idx from IA privilege level Richard Henderson
2018-01-22 3:41 ` [Qemu-devel] [PULL 07/43] target/hppa: Implement the system mask instructions Richard Henderson
2018-01-22 3:41 ` [Qemu-devel] [PULL 08/43] target/hppa: Add space registers Richard Henderson
2018-01-22 3:41 ` [Qemu-devel] [PULL 09/43] target/hppa: Add control registers Richard Henderson
2018-01-22 3:41 ` [Qemu-devel] [PULL 10/43] target/hppa: Adjust insn mask for mfctl, w Richard Henderson
2018-01-22 3:41 ` [Qemu-devel] [PULL 11/43] target/hppa: Implement rfi Richard Henderson
2018-01-22 3:41 ` [Qemu-devel] [PULL 12/43] target/hppa: Fill in hppa_cpu_do_interrupt/hppa_cpu_exec_interrupt Richard Henderson
2018-01-22 3:41 ` [Qemu-devel] [PULL 13/43] target/hppa: Implement unaligned access trap Richard Henderson
2018-01-22 3:41 ` [Qemu-devel] [PULL 14/43] target/hppa: Use space registers in data operations Richard Henderson
2018-01-22 3:41 ` [Qemu-devel] [PULL 15/43] target/hppa: Avoid privilege level decrease during branches Richard Henderson
2018-01-22 3:41 ` [Qemu-devel] [PULL 16/43] target/hppa: Implement IASQ Richard Henderson
2018-01-22 3:41 ` [Qemu-devel] [PULL 17/43] target/hppa: Implement tlb_fill Richard Henderson
2018-01-22 3:41 ` [Qemu-devel] [PULL 18/43] target/hppa: Implement external interrupts Richard Henderson
2018-01-22 3:41 ` [Qemu-devel] [PULL 19/43] target/hppa: Implement the interval timer Richard Henderson
2018-01-22 3:41 ` [Qemu-devel] [PULL 20/43] target/hppa: Log unimplemented instructions Richard Henderson
2018-01-22 3:41 ` [Qemu-devel] [PULL 21/43] target/hppa: Implement I*TLBA and I*TLBP insns Richard Henderson
2018-01-22 3:41 ` [Qemu-devel] [PULL 22/43] target/hppa: Implement P*TLB and P*TLBE insns Richard Henderson
2018-01-22 3:41 ` [Qemu-devel] [PULL 23/43] target/hppa: Implement LDWA Richard Henderson
2018-01-22 3:41 ` [Qemu-devel] [PULL 24/43] target/hppa: Implement LPA Richard Henderson
2018-01-22 3:41 ` [Qemu-devel] [PULL 25/43] target/hppa: Implement LCI Richard Henderson
2018-01-22 3:42 ` [Qemu-devel] [PULL 26/43] target/hppa: Implement SYNCDMA insn Richard Henderson
2018-01-22 3:42 ` [Qemu-devel] [PULL 27/43] target/hppa: Implement halt and reset instructions Richard Henderson
2018-01-22 3:42 ` [Qemu-devel] [PULL 28/43] target/hppa: Optimize for flat addressing space Richard Henderson
2018-01-22 3:42 ` Richard Henderson [this message]
2018-01-22 3:42 ` [Qemu-devel] [PULL 30/43] target/hppa: Add migration for the cpu Richard Henderson
2018-01-22 3:42 ` [Qemu-devel] [PULL 31/43] target/hppa: Implement B,GATE insn Richard Henderson
2018-01-22 3:42 ` [Qemu-devel] [PULL 32/43] target/hppa: Only use EXCP_DTLB_MISS Richard Henderson
2018-01-22 3:42 ` [Qemu-devel] [PULL 33/43] qom: Add MMU_DEBUG_LOAD Richard Henderson
2018-01-22 3:42 ` [Qemu-devel] [PULL 34/43] target/hppa: Use MMU_DEBUG_LOAD when reloading for CR[IIR] Richard Henderson
2018-01-22 3:42 ` [Qemu-devel] [PULL 35/43] target/hppa: Increase number of temp regs Richard Henderson
2018-01-22 3:42 ` [Qemu-devel] [PULL 36/43] target/hppa: Fix comment Richard Henderson
2018-01-22 3:42 ` [Qemu-devel] [PULL 37/43] target/hppa: Implement LDSID for system mode Richard Henderson
2018-01-22 3:42 ` [Qemu-devel] [PULL 38/43] target/hppa: Implement a pause instruction Richard Henderson
2018-01-22 3:42 ` [Qemu-devel] [PULL 39/43] target/hppa: Implement STWA Richard Henderson
2018-01-22 3:42 ` [Qemu-devel] [PULL 40/43] target/hppa: Enable MTTCG Richard Henderson
2018-01-22 3:42 ` [Qemu-devel] [PULL 41/43] hw/hppa: Implement DINO system board Richard Henderson
2018-01-22 3:42 ` [Qemu-devel] [PULL 42/43] pc-bios: Add hppa-firmware.img and git submodule Richard Henderson
2018-01-22 3:42 ` [Qemu-devel] [PULL 43/43] hw/hppa: Add MAINTAINERS entry Richard Henderson
2018-01-22 4:27 ` [Qemu-devel] [PULL 00/43] Add hppa-softmmu no-reply
2018-01-22 4:38 ` no-reply
2018-01-22 4:57 ` no-reply
2018-01-23 10:14 ` Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20180122034217.19593-30-richard.henderson@linaro.org \
--to=richard.henderson@linaro.org \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).