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From: Yi Min Zhao <zyimin@linux.vnet.ibm.com>
To: qemu-devel@nongnu.org
Cc: borntraeger@de.ibm.com, pasic@linux.vnet.ibm.com,
	pmorel@linux.vnet.ibm.com, cohuck@redhat.com,
	alex.williamson@redhat.com, marcel@redhat.com,
	zyimin@linux.vnet.ibm.com
Subject: [Qemu-devel] [PATCH 0/3] s390x/pci: fixup and optimize IOTLB code
Date: Tue, 30 Jan 2018 10:47:12 +0100	[thread overview]
Message-ID: <20180130094715.11578-1-zyimin@linux.vnet.ibm.com> (raw)

This series contains three patches,
1) optimizes the code including walking DMA tables and rpcit handler
2) fixes the issue caused by IOTLB global refresh 
3) uses the right pal and pba when registering ioat

The issue mentioned above was found when we tested SMC-r tools. This
behavior has been introduced when linux guest started using a global
refresh to purge the whole IOTLB of invalid entries in a lazy fashion
instead of flushing each entry when invalidating table entries.

The previous QEMU implementation didn't keep track of the mapping,
didn't handle correctly the global flush demand from the guest and a
major part of the IOTLB entries were not flushed.

Consequently linux kernel on the host keeping the previous mapping
reports, as it should, -EEXIST DMA mapping error on the next mapping
with the same IOVA. The second patch fixes this issue.

During the investigation, we noticed that the current code walking
PCI IOMMU page tables didn't check important flags of table entries,
including:
1) protection bit
2) table length
3) table offset
4) intermediate tables' invalid bit
5) format control bit

We implement the checking in the first patch before handling the
IOTLB global refresh issue. To keep track of the mapped IOTLB entries
and be able to check if the host IOTLB entries need to be refreshed
we implement a IOTLB cache in QEMU, and introduce some helper
functions to check these bits. All S390IOTLBEntry instances are stored
in a new hashtable which are indexed by IOVA. Each PCI device has its
own IOMMU. Therefore each IOMMU also has its own hashtable caching
corresponding PCI device's DMA entries. Finally, we split 1M
contiguous DMA range into 4K pages to do DMA map, and the code about
error notification is also optimized.

Yi Min Zhao (3):
  s390x/pci: fixup the code walking IOMMU tables
  s390x/pci: fixup global refresh
  s390x/pci: use the right pal and pba in reg_ioat()

 hw/s390x/s390-pci-bus.c  | 233 ++++++++++++++++++++++++++++++++++++++---------
 hw/s390x/s390-pci-bus.h  |  13 +++
 hw/s390x/s390-pci-inst.c | 103 ++++++++++++++-------
 3 files changed, 271 insertions(+), 78 deletions(-)

-- 
2.14.3 (Apple Git-98)

             reply	other threads:[~2018-01-30  9:47 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-30  9:47 Yi Min Zhao [this message]
2018-01-30  9:47 ` [Qemu-devel] [PATCH 1/3] s390x/pci: fixup the code walking IOMMU tables Yi Min Zhao
2018-01-31  7:42   ` Thomas Huth
2018-01-31  8:46     ` Yi Min Zhao
2018-01-31 10:58   ` Cornelia Huck
2018-02-01 11:28     ` Yi Min Zhao
2018-02-01 11:56       ` Pierre Morel
2018-02-01 12:15         ` Cornelia Huck
2018-02-01 13:17           ` Pierre Morel
2018-01-30  9:47 ` [Qemu-devel] [PATCH 2/3] s390x/pci: fixup global refresh Yi Min Zhao
2018-01-31 11:35   ` Cornelia Huck
2018-02-01 12:55     ` Pierre Morel
2018-01-30  9:47 ` [Qemu-devel] [PATCH 3/3] s390x/pci: use the right pal and pba in reg_ioat() Yi Min Zhao
2018-01-31 11:44   ` Cornelia Huck
2018-02-01 11:33     ` Pierre Morel
2018-02-01 12:02       ` Cornelia Huck
2018-02-02  3:50         ` Yi Min Zhao

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