qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
To: Brijesh Singh <brijesh.singh@amd.com>
Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org,
	Paolo Bonzini <pbonzini@redhat.com>,
	Tom Lendacky <Thomas.Lendacky@amd.com>,
	Peter Maydell <peter.maydell@linaro.org>,
	Richard Henderson <richard.henderson@linaro.org>,
	"Dr. David Alan Gilbert" <dgilbert@redhat.com>,
	Eduardo Habkost <ehabkost@redhat.com>,
	Stefan Hajnoczi <stefanha@gmail.com>,
	Eric Blake <eblake@redhat.com>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	"Daniel P . Berrange" <berrange@redhat.com>,
	Peter Crosthwaite <crosthwaite.peter@gmail.com>,
	Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH v6 02/23] exec: add ram_debug_ops support
Date: Wed, 31 Jan 2018 04:59:21 +0700	[thread overview]
Message-ID: <20180130215920.GA7547@toto> (raw)
In-Reply-To: <20180129174132.108925-3-brijesh.singh@amd.com>

On Mon, Jan 29, 2018 at 11:41:11AM -0600, Brijesh Singh wrote:
> Currently, the guest memory access for the debug purpose is performed
> using the memcpy(). Lets extend the 'struct MemoryRegion' to include
> ram_debug_ops callbacks. The ram_debug_ops can be used to override
> memcpy() with something else.
> 
> The feature can be used by encrypted guest -- which can register
> callbacks to override memcpy() with memory encryption/decryption APIs.
> 
> a typical usage:
> 
> mem_read(uint8_t *dst, uint8_t *src, uint32_t len, MemTxAttrs *attrs);
> mem_write(uint8_t *dst, uint8_t *src, uint32_t len, MemTxAttrs *attrs);
> 
> MemoryRegionRAMReadWriteOps ops;
> ops.read = mem_read;
> ops.write = mem_write;


Hi,

Do these really need to be RAM specific (ram_debug_ops -> debug_ops) ?
I was hoping a similar infrastructure could be used for MMIO
debug accesses.

Best regards,
Edgar



> 
> memory_region_init_ram(mem, NULL, "memory", size, NULL);
> memory_region_set_ram_debug_ops(mem, ops);
> 
> Cc: Paolo Bonzini <pbonzini@redhat.com>
> Cc: Peter Crosthwaite <crosthwaite.peter@gmail.com>
> Cc: Richard Henderson <rth@twiddle.net>
> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
> ---
>  exec.c                | 66 ++++++++++++++++++++++++++++++++++++++-------------
>  include/exec/memory.h | 27 +++++++++++++++++++++
>  2 files changed, 77 insertions(+), 16 deletions(-)
> 
> diff --git a/exec.c b/exec.c
> index 629a5083851d..1919052b7385 100644
> --- a/exec.c
> +++ b/exec.c
> @@ -3050,7 +3050,11 @@ static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr,
>          } else {
>              /* RAM case */
>              ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false);
> -            memcpy(ptr, buf, l);
> +            if (attrs.debug && mr->ram_debug_ops) {
> +                mr->ram_debug_ops->write(ptr, buf, l, attrs);
> +            } else {
> +                memcpy(ptr, buf, l);
> +            }
>              invalidate_and_set_dirty(mr, addr1, l);
>          }
>  
> @@ -3148,7 +3152,11 @@ MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr,
>          } else {
>              /* RAM case */
>              ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false);
> -            memcpy(buf, ptr, l);
> +            if (attrs.debug && mr->ram_debug_ops) {
> +                mr->ram_debug_ops->read(buf, ptr, l, attrs);
> +            } else {
> +                memcpy(buf, ptr, l);
> +            }
>          }
>  
>          if (release_lock) {
> @@ -3218,11 +3226,13 @@ void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf,
>  
>  enum write_rom_type {
>      WRITE_DATA,
> +    READ_DATA,
>      FLUSH_CACHE,
>  };
>  
> -static inline void cpu_physical_memory_write_rom_internal(AddressSpace *as,
> -    hwaddr addr, const uint8_t *buf, int len, enum write_rom_type type)
> +static inline void cpu_physical_memory_rw_internal(AddressSpace *as,
> +    hwaddr addr, uint8_t *buf, int len, MemTxAttrs attrs,
> +    enum write_rom_type type)
>  {
>      hwaddr l;
>      uint8_t *ptr;
> @@ -3237,12 +3247,33 @@ static inline void cpu_physical_memory_write_rom_internal(AddressSpace *as,
>          if (!(memory_region_is_ram(mr) ||
>                memory_region_is_romd(mr))) {
>              l = memory_access_size(mr, l, addr1);
> +            /* Pass MMIO down to address address_space_rw */
> +            switch (type) {
> +            case READ_DATA:
> +            case WRITE_DATA:
> +                address_space_rw(as, addr1, attrs, buf, l,
> +                                 type == WRITE_DATA);
> +                break;
> +            case FLUSH_CACHE:
> +                break;
> +            }
>          } else {
>              /* ROM/RAM case */
>              ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
>              switch (type) {
> +            case READ_DATA:
> +                if (mr->ram_debug_ops) {
> +                    mr->ram_debug_ops->read(buf, ptr, l, attrs);
> +                } else {
> +                    memcpy(buf, ptr, l);
> +                }
> +                break;
>              case WRITE_DATA:
> -                memcpy(ptr, buf, l);
> +                if (mr->ram_debug_ops) {
> +                    mr->ram_debug_ops->write(ptr, buf, l, attrs);
> +                } else {
> +                    memcpy(ptr, buf, l);
> +                }
>                  invalidate_and_set_dirty(mr, addr1, l);
>                  break;
>              case FLUSH_CACHE:
> @@ -3261,7 +3292,8 @@ static inline void cpu_physical_memory_write_rom_internal(AddressSpace *as,
>  void cpu_physical_memory_write_rom(AddressSpace *as, hwaddr addr,
>                                     const uint8_t *buf, int len)
>  {
> -    cpu_physical_memory_write_rom_internal(as, addr, buf, len, WRITE_DATA);
> +    cpu_physical_memory_rw_internal(as, addr, (uint8_t *)buf, len,
> +            MEMTXATTRS_UNSPECIFIED, WRITE_DATA);
>  }
>  
>  void cpu_flush_icache_range(hwaddr start, int len)
> @@ -3276,8 +3308,10 @@ void cpu_flush_icache_range(hwaddr start, int len)
>          return;
>      }
>  
> -    cpu_physical_memory_write_rom_internal(&address_space_memory,
> -                                           start, NULL, len, FLUSH_CACHE);
> +    cpu_physical_memory_rw_internal(&address_space_memory,
> +                                    start, NULL, len,
> +                                    MEMTXATTRS_UNSPECIFIED,
> +                                    FLUSH_CACHE);
>  }
>  
>  typedef struct {
> @@ -3583,6 +3617,7 @@ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
>      int l;
>      hwaddr phys_addr;
>      target_ulong page;
> +    int type = is_write ? WRITE_DATA : READ_DATA;
>  
>      cpu_synchronize_state(cpu);
>      while (len > 0) {
> @@ -3592,6 +3627,10 @@ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
>          page = addr & TARGET_PAGE_MASK;
>          phys_addr = cpu_get_phys_page_attrs_debug(cpu, page, &attrs);
>          asidx = cpu_asidx_from_attrs(cpu, attrs);
> +
> +        /* set debug attrs to indicate memory access is from the debugger */
> +        attrs.debug = 1;
> +
>          /* if no physical page mapped, return an error */
>          if (phys_addr == -1)
>              return -1;
> @@ -3599,14 +3638,9 @@ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
>          if (l > len)
>              l = len;
>          phys_addr += (addr & ~TARGET_PAGE_MASK);
> -        if (is_write) {
> -            cpu_physical_memory_write_rom(cpu->cpu_ases[asidx].as,
> -                                          phys_addr, buf, l);
> -        } else {
> -            address_space_rw(cpu->cpu_ases[asidx].as, phys_addr,
> -                             MEMTXATTRS_UNSPECIFIED,
> -                             buf, l, 0);
> -        }
> +        cpu_physical_memory_rw_internal(cpu->cpu_ases[asidx].as,
> +                                        phys_addr, buf, l, attrs,
> +                                        type);
>          len -= l;
>          buf += l;
>          addr += l;
> diff --git a/include/exec/memory.h b/include/exec/memory.h
> index 07c5d6d59796..4d027fffeebf 100644
> --- a/include/exec/memory.h
> +++ b/include/exec/memory.h
> @@ -215,6 +215,18 @@ typedef struct IOMMUMemoryRegionClass {
>  typedef struct CoalescedMemoryRange CoalescedMemoryRange;
>  typedef struct MemoryRegionIoeventfd MemoryRegionIoeventfd;
>  
> +/* Memory Region RAM debug callback */
> +typedef struct MemoryRegionRAMReadWriteOps MemoryRegionRAMReadWriteOps;
> +
> +struct MemoryRegionRAMReadWriteOps {
> +    /* Write data into guest memory */
> +    int (*write) (uint8_t *dest, const uint8_t *src,
> +                  uint32_t len, MemTxAttrs attrs);
> +    /* Read data from guest memory */
> +    int (*read) (uint8_t *dest, const uint8_t *src,
> +                 uint32_t len, MemTxAttrs attrs);
> +};
> +
>  struct MemoryRegion {
>      Object parent_obj;
>  
> @@ -254,6 +266,7 @@ struct MemoryRegion {
>      const char *name;
>      unsigned ioeventfd_nb;
>      MemoryRegionIoeventfd *ioeventfds;
> +    const MemoryRegionRAMReadWriteOps *ram_debug_ops;
>  };
>  
>  struct IOMMUMemoryRegion {
> @@ -624,6 +637,20 @@ void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
>                                               Error **errp);
>  
>  /**
> + * memory_region_set_ram_debug_ops: Set debug access ops for a given memory region
> + *
> + * @mr: the #MemoryRegion to be initialized
> + * @ops: a function that will be used for when accessing @target region during
> + *       debug
> + */
> +static inline void
> +memory_region_set_ram_debug_ops(MemoryRegion *mr,
> +                                const MemoryRegionRAMReadWriteOps *ops)
> +{
> +    mr->ram_debug_ops = ops;
> +}
> +
> +/**
>   * memory_region_init_reservation: Initialize a memory region that reserves
>   *                                 I/O space.
>   *
> -- 
> 2.9.5
> 

  reply	other threads:[~2018-01-30 22:01 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-29 17:41 [Qemu-devel] [PATCH v6 00/23] x86: Secure Encrypted Virtualization (AMD) Brijesh Singh
2018-01-29 17:41 ` [Qemu-devel] [PATCH v6 01/23] memattrs: add debug attribute Brijesh Singh
2018-01-30 21:59   ` Edgar E. Iglesias
2018-01-29 17:41 ` [Qemu-devel] [PATCH v6 02/23] exec: add ram_debug_ops support Brijesh Singh
2018-01-30 21:59   ` Edgar E. Iglesias [this message]
2018-01-30 22:34     ` Brijesh Singh
2018-01-30 22:37       ` Edgar E. Iglesias
2018-01-30 23:26         ` Brijesh Singh
2018-01-29 17:41 ` [Qemu-devel] [PATCH v6 03/23] exec: add debug version of physical memory read and write API Brijesh Singh
2018-01-29 17:41 ` [Qemu-devel] [PATCH v6 04/23] monitor/i386: use debug APIs when accessing guest memory Brijesh Singh
2018-01-29 17:41 ` [Qemu-devel] [PATCH v6 05/23] target/i386: add memory encryption feature cpuid support Brijesh Singh
2018-01-30 17:49   ` Dr. David Alan Gilbert
2018-01-30 21:46     ` Brijesh Singh
2018-01-30 22:15       ` Brijesh Singh
2018-01-31  9:57       ` Dr. David Alan Gilbert
2018-01-31 13:41       ` Eduardo Habkost
2018-01-31 16:05         ` Brijesh Singh
2018-01-29 17:41 ` [Qemu-devel] [PATCH v6 06/23] machine: add -memory-encryption property Brijesh Singh
2018-01-29 17:41 ` [Qemu-devel] [PATCH v6 07/23] kvm: update kvm.h to include memory encryption ioctls Brijesh Singh
2018-01-29 17:41 ` [Qemu-devel] [PATCH v6 08/23] docs: add AMD Secure Encrypted Virtualization (SEV) Brijesh Singh
2018-01-29 17:41 ` [Qemu-devel] [PATCH v6 09/23] accel: add Secure Encrypted Virtulization (SEV) object Brijesh Singh
2018-01-29 17:41 ` [Qemu-devel] [PATCH v6 10/23] sev: add command to initialize the memory encryption context Brijesh Singh
2018-02-01 12:13   ` Dr. David Alan Gilbert
2018-02-01 15:33     ` Brijesh Singh
2018-02-01 15:46       ` Dr. David Alan Gilbert
2018-01-29 17:41 ` [Qemu-devel] [PATCH v6 11/23] sev: register the guest memory range which may contain encrypted data Brijesh Singh
2018-01-29 17:41 ` [Qemu-devel] [PATCH v6 12/23] kvm: introduce memory encryption APIs Brijesh Singh
2018-01-29 17:41 ` [Qemu-devel] [PATCH v6 13/23] hmp: display memory encryption support in 'info kvm' Brijesh Singh
2018-01-31 17:43   ` Markus Armbruster
2018-02-01 15:21     ` Brijesh Singh
2018-02-01 17:58   ` Dr. David Alan Gilbert
2018-02-01 19:55     ` Brijesh Singh
2018-02-01 20:04       ` Dr. David Alan Gilbert
2018-02-02 13:08         ` Daniel P. Berrangé
2018-02-02 13:46           ` Brijesh Singh
2018-02-02 15:24             ` Dr. David Alan Gilbert
2018-01-29 17:41 ` [Qemu-devel] [PATCH v6 14/23] sev: add command to create launch memory encryption context Brijesh Singh
2018-01-29 17:41 ` [Qemu-devel] [PATCH v6 15/23] sev: add command to encrypt guest memory region Brijesh Singh
2018-01-29 17:41 ` [Qemu-devel] [PATCH v6 16/23] target/i386: encrypt bios rom Brijesh Singh
2018-01-29 17:41 ` [Qemu-devel] [PATCH v6 17/23] qapi: add SEV_MEASUREMENT event Brijesh Singh
2018-01-31 17:45   ` Markus Armbruster
2018-02-01 15:25     ` Brijesh Singh
2018-02-01 15:28       ` Eric Blake
2018-01-29 17:41 ` [Qemu-devel] [PATCH v6 18/23] sev: emit the " Brijesh Singh
2018-01-30 20:08   ` Dr. David Alan Gilbert
2018-01-30 22:13     ` Brijesh Singh
2018-02-01 17:27       ` Dr. David Alan Gilbert
2018-02-02 15:11         ` Brijesh Singh
2018-02-02 15:16           ` Daniel P. Berrangé
2018-02-08 16:17             ` Brijesh Singh
2018-02-08 16:22               ` Daniel P. Berrangé
2018-01-29 17:41 ` [Qemu-devel] [PATCH v6 19/23] sev: Finalize the SEV guest launch flow Brijesh Singh
2018-01-29 17:41 ` [Qemu-devel] [PATCH v6 20/23] hw: i386: set ram_debug_ops when memory encryption is enabled Brijesh Singh
2018-01-29 17:41 ` [Qemu-devel] [PATCH v6 21/23] sev: add debug encrypt and decrypt commands Brijesh Singh
2018-01-29 17:41 ` [Qemu-devel] [PATCH v6 22/23] target/i386: clear C-bit when walking SEV guest page table Brijesh Singh
2018-01-29 17:41 ` [Qemu-devel] [PATCH v6 23/23] sev: add migration blocker Brijesh Singh
2018-01-29 18:13 ` [Qemu-devel] [PATCH v6 00/23] x86: Secure Encrypted Virtualization (AMD) no-reply
2018-01-29 18:17 ` no-reply
2018-01-29 18:19 ` no-reply
2018-01-29 18:31 ` no-reply
2018-02-06 15:51 ` Bruce Rogers
2018-02-07  1:07   ` Brijesh Singh

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180130215920.GA7547@toto \
    --to=edgar.iglesias@xilinx.com \
    --cc=Thomas.Lendacky@amd.com \
    --cc=berrange@redhat.com \
    --cc=brijesh.singh@amd.com \
    --cc=crosthwaite.peter@gmail.com \
    --cc=dgilbert@redhat.com \
    --cc=eblake@redhat.com \
    --cc=ehabkost@redhat.com \
    --cc=kvm@vger.kernel.org \
    --cc=mst@redhat.com \
    --cc=pbonzini@redhat.com \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    --cc=rth@twiddle.net \
    --cc=stefanha@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).