From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: patches@linaro.org
Subject: [Qemu-devel] [PATCH] target/arm/translate.c: Fix missing 'break' for TT insns
Date: Tue, 6 Feb 2018 10:39:41 +0000 [thread overview]
Message-ID: <20180206103941.13985-1-peter.maydell@linaro.org> (raw)
The code where we added the TT instruction was accidentally
missing a 'break', which meant that after generating the code
to execute the TT we would fall through to 'goto illegal_op'
and generate code to take an UNDEF insn.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
Doh...
target/arm/translate.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 55826b7e5a..572c4d1cb6 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -9926,6 +9926,7 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn)
tcg_temp_free_i32(addr);
tcg_temp_free_i32(op);
store_reg(s, rd, ttresp);
+ break;
}
goto illegal_op;
}
--
2.16.1
next reply other threads:[~2018-02-06 10:39 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-06 10:39 Peter Maydell [this message]
2018-02-06 12:01 ` [Qemu-devel] [Qemu-arm] [PATCH] target/arm/translate.c: Fix missing 'break' for TT insns Philippe Mathieu-Daudé
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