From: "Alex Bennée" <alex.bennee@linaro.org>
To: richard.henderson@linaro.org, peter.maydell@linaro.org,
laurent@vivier.eu, bharata@linux.vnet.ibm.com,
andrew@andrewdutcher.com
Cc: qemu-devel@nongnu.org, "Alex Bennée" <alex.bennee@linaro.org>,
"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [Qemu-devel] [PATCH v4 10/22] fpu/softfloat: move the extract functions to the top of the file
Date: Tue, 6 Feb 2018 16:48:03 +0000 [thread overview]
Message-ID: <20180206164815.10084-11-alex.bennee@linaro.org> (raw)
In-Reply-To: <20180206164815.10084-1-alex.bennee@linaro.org>
This is pure code-motion during re-factoring as the helpers will be
needed earlier.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
---
v2
- fix minor white space nit
---
fpu/softfloat.c | 120 +++++++++++++++++++++++++-------------------------------
1 file changed, 54 insertions(+), 66 deletions(-)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 3a4ab1355f..297e48f5c9 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -132,6 +132,60 @@ static inline flag extractFloat16Sign(float16 a)
return float16_val(a)>>15;
}
+/*----------------------------------------------------------------------------
+| Returns the fraction bits of the single-precision floating-point value `a'.
+*----------------------------------------------------------------------------*/
+
+static inline uint32_t extractFloat32Frac(float32 a)
+{
+ return float32_val(a) & 0x007FFFFF;
+}
+
+/*----------------------------------------------------------------------------
+| Returns the exponent bits of the single-precision floating-point value `a'.
+*----------------------------------------------------------------------------*/
+
+static inline int extractFloat32Exp(float32 a)
+{
+ return (float32_val(a) >> 23) & 0xFF;
+}
+
+/*----------------------------------------------------------------------------
+| Returns the sign bit of the single-precision floating-point value `a'.
+*----------------------------------------------------------------------------*/
+
+static inline flag extractFloat32Sign(float32 a)
+{
+ return float32_val(a) >> 31;
+}
+
+/*----------------------------------------------------------------------------
+| Returns the fraction bits of the double-precision floating-point value `a'.
+*----------------------------------------------------------------------------*/
+
+static inline uint64_t extractFloat64Frac(float64 a)
+{
+ return float64_val(a) & LIT64(0x000FFFFFFFFFFFFF);
+}
+
+/*----------------------------------------------------------------------------
+| Returns the exponent bits of the double-precision floating-point value `a'.
+*----------------------------------------------------------------------------*/
+
+static inline int extractFloat64Exp(float64 a)
+{
+ return (float64_val(a) >> 52) & 0x7FF;
+}
+
+/*----------------------------------------------------------------------------
+| Returns the sign bit of the double-precision floating-point value `a'.
+*----------------------------------------------------------------------------*/
+
+static inline flag extractFloat64Sign(float64 a)
+{
+ return float64_val(a) >> 63;
+}
+
/*----------------------------------------------------------------------------
| Takes a 64-bit fixed-point value `absZ' with binary point between bits 6
| and 7, and returns the properly rounded 32-bit integer corresponding to the
@@ -299,39 +353,6 @@ static int64_t roundAndPackUint64(flag zSign, uint64_t absZ0,
return absZ0;
}
-/*----------------------------------------------------------------------------
-| Returns the fraction bits of the single-precision floating-point value `a'.
-*----------------------------------------------------------------------------*/
-
-static inline uint32_t extractFloat32Frac( float32 a )
-{
-
- return float32_val(a) & 0x007FFFFF;
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns the exponent bits of the single-precision floating-point value `a'.
-*----------------------------------------------------------------------------*/
-
-static inline int extractFloat32Exp(float32 a)
-{
-
- return ( float32_val(a)>>23 ) & 0xFF;
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns the sign bit of the single-precision floating-point value `a'.
-*----------------------------------------------------------------------------*/
-
-static inline flag extractFloat32Sign( float32 a )
-{
-
- return float32_val(a)>>31;
-
-}
-
/*----------------------------------------------------------------------------
| If `a' is denormal and we are in flush-to-zero mode then set the
| input-denormal exception and return zero. Otherwise just return the value.
@@ -492,39 +513,6 @@ static float32
}
-/*----------------------------------------------------------------------------
-| Returns the fraction bits of the double-precision floating-point value `a'.
-*----------------------------------------------------------------------------*/
-
-static inline uint64_t extractFloat64Frac( float64 a )
-{
-
- return float64_val(a) & LIT64( 0x000FFFFFFFFFFFFF );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns the exponent bits of the double-precision floating-point value `a'.
-*----------------------------------------------------------------------------*/
-
-static inline int extractFloat64Exp(float64 a)
-{
-
- return ( float64_val(a)>>52 ) & 0x7FF;
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns the sign bit of the double-precision floating-point value `a'.
-*----------------------------------------------------------------------------*/
-
-static inline flag extractFloat64Sign( float64 a )
-{
-
- return float64_val(a)>>63;
-
-}
-
/*----------------------------------------------------------------------------
| If `a' is denormal and we are in flush-to-zero mode then set the
| input-denormal exception and return zero. Otherwise just return the value.
--
2.15.1
next prev parent reply other threads:[~2018-02-06 16:48 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-06 16:47 [Qemu-devel] [PATCH v4 00/22] re-factor softfloat and add fp16 functions Alex Bennée
2018-02-06 16:47 ` [Qemu-devel] [PATCH v4 01/22] fpu/softfloat: implement float16_squash_input_denormal Alex Bennée
2018-02-06 16:47 ` [Qemu-devel] [PATCH v4 02/22] include/fpu/softfloat: remove USE_SOFTFLOAT_STRUCT_TYPES Alex Bennée
2018-02-06 16:47 ` [Qemu-devel] [PATCH v4 03/22] fpu/softfloat-types: new header to prevent excessive re-builds Alex Bennée
2018-02-06 16:47 ` [Qemu-devel] [PATCH v4 04/22] target/*/cpu.h: remove softfloat.h Alex Bennée
2018-02-06 16:47 ` [Qemu-devel] [PATCH v4 05/22] include/fpu/softfloat: implement float16_abs helper Alex Bennée
2018-02-06 16:47 ` [Qemu-devel] [PATCH v4 06/22] include/fpu/softfloat: implement float16_chs helper Alex Bennée
2018-02-06 16:48 ` [Qemu-devel] [PATCH v4 07/22] include/fpu/softfloat: implement float16_set_sign helper Alex Bennée
2018-02-06 16:48 ` [Qemu-devel] [PATCH v4 08/22] include/fpu/softfloat: add some float16 constants Alex Bennée
2018-02-06 16:48 ` [Qemu-devel] [PATCH v4 09/22] fpu/softfloat: improve comments on ARM NaN propagation Alex Bennée
2018-02-06 16:48 ` Alex Bennée [this message]
2018-02-06 16:48 ` [Qemu-devel] [PATCH v4 11/22] fpu/softfloat: define decompose structures Alex Bennée
2018-02-06 16:48 ` [Qemu-devel] [PATCH v4 12/22] fpu/softfloat: re-factor add/sub Alex Bennée
2018-02-06 16:48 ` [Qemu-devel] [PATCH v4 13/22] fpu/softfloat: re-factor mul Alex Bennée
2018-02-13 15:20 ` Peter Maydell
2018-02-13 15:39 ` Richard Henderson
2018-02-19 16:04 ` Alex Bennée
2018-02-06 16:48 ` [Qemu-devel] [PATCH v4 14/22] fpu/softfloat: re-factor div Alex Bennée
2018-02-13 15:22 ` Peter Maydell
2018-02-06 16:48 ` [Qemu-devel] [PATCH v4 15/22] fpu/softfloat: re-factor muladd Alex Bennée
2018-02-06 16:48 ` [Qemu-devel] [PATCH v4 16/22] fpu/softfloat: re-factor round_to_int Alex Bennée
2018-02-13 15:14 ` Peter Maydell
2018-02-06 16:48 ` [Qemu-devel] [PATCH v4 17/22] fpu/softfloat: re-factor float to int/uint Alex Bennée
2018-02-06 16:48 ` [Qemu-devel] [PATCH v4 18/22] fpu/softfloat: re-factor int/uint to float Alex Bennée
2018-02-06 16:48 ` [Qemu-devel] [PATCH v4 19/22] fpu/softfloat: re-factor scalbn Alex Bennée
2018-02-06 16:48 ` [Qemu-devel] [PATCH v4 20/22] fpu/softfloat: re-factor minmax Alex Bennée
2018-02-06 16:48 ` [Qemu-devel] [PATCH v4 21/22] fpu/softfloat: re-factor compare Alex Bennée
2018-02-06 16:48 ` [Qemu-devel] [PATCH v4 22/22] fpu/softfloat: re-factor sqrt Alex Bennée
2018-02-13 15:50 ` Peter Maydell
2018-02-13 16:23 ` Richard Henderson
2018-02-13 16:34 ` Peter Maydell
2018-02-20 21:01 ` [Qemu-devel] [PATCH] fpu/softfloat: use hardware sqrt if we can (EXPERIMENT!) Alex Bennée
2018-02-21 20:44 ` Alex Bennée
2018-03-21 20:16 ` Emilio G. Cota
2018-02-13 17:50 ` [Qemu-devel] [PATCH v4 22/22] fpu/softfloat: re-factor sqrt Richard Henderson
2018-02-06 17:42 ` [Qemu-devel] [PATCH v4 00/22] re-factor softfloat and add fp16 functions no-reply
2018-02-13 14:52 ` Peter Maydell
2018-02-17 13:23 ` Alex Bennée
2018-02-19 13:56 ` Peter Maydell
2018-02-22 1:23 ` Fam Zheng
2018-02-13 15:51 ` Peter Maydell
2018-02-13 17:31 ` Laurent Vivier
2018-02-20 12:43 ` Alex Bennée
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