From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34039) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ejUKW-0002QY-3a for qemu-devel@nongnu.org; Wed, 07 Feb 2018 13:20:27 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ejUKV-0005Fe-7S for qemu-devel@nongnu.org; Wed, 07 Feb 2018 13:20:24 -0500 Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 7 Feb 2018 15:19:27 -0300 Message-Id: <20180207181929.8701-15-f4bug@amsat.org> In-Reply-To: <20180207181929.8701-1-f4bug@amsat.org> References: <20180207181929.8701-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH v10 14/16] hw/arm/exynos4210: access the 64-bit capareg with qdev_prop_set_uint64() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini , Stefan Hajnoczi , Peter Maydell Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org, Alistair Francis , "Edgar E . Iglesias" , Igor Mitsyanko , "open list:Exynos" We only set a 32-bit value, but this is a good practice in case this code is used as reference. (missed in 5efc9016e52) Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis --- hw/arm/exynos4210.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index e8e1d81e62..d89322c7ea 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -378,7 +378,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem) DriveInfo *di; dev = qdev_create(NULL, TYPE_SYSBUS_SDHCI); - qdev_prop_set_uint32(dev, "capareg", EXYNOS4210_SDHCI_CAPABILITIES); + qdev_prop_set_uint64(dev, "capareg", EXYNOS4210_SDHCI_CAPABILITIES); qdev_init_nofail(dev); busdev = SYS_BUS_DEVICE(dev); -- 2.16.1