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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Paolo Bonzini <pbonzini@redhat.com>,
	Peter Maydell <peter.maydell@linaro.org>
Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	qemu-devel@nongnu.org,
	"Alistair Francis" <alistair.francis@xilinx.com>,
	"Edgar E . Iglesias" <edgar.iglesias@xilinx.com>
Subject: [Qemu-devel] [PATCH v11 09/30] sdhci: simplify sdhci_get_fifolen()
Date: Thu,  8 Feb 2018 13:47:57 -0300	[thread overview]
Message-ID: <20180208164818.7961-10-f4bug@amsat.org> (raw)
In-Reply-To: <20180208164818.7961-1-f4bug@amsat.org>

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
---
 hw/sd/sdhci-internal.h |  4 +++-
 hw/sd/sdhci.c          | 20 +++++---------------
 2 files changed, 8 insertions(+), 16 deletions(-)

diff --git a/hw/sd/sdhci-internal.h b/hw/sd/sdhci-internal.h
index b7751c815f..577ca9da54 100644
--- a/hw/sd/sdhci-internal.h
+++ b/hw/sd/sdhci-internal.h
@@ -24,6 +24,8 @@
 #ifndef SDHCI_INTERNAL_H
 #define SDHCI_INTERNAL_H
 
+#include "hw/registerfields.h"
+
 /* R/W SDMA System Address register 0x0 */
 #define SDHC_SYSAD                     0x00
 
@@ -179,7 +181,7 @@
 #define SDHC_CAN_DO_ADMA2              0x00080000
 #define SDHC_CAN_DO_ADMA1              0x00100000
 #define SDHC_64_BIT_BUS_SUPPORT        (1 << 28)
-#define SDHC_CAPAB_BLOCKSIZE(x)        (((x) >> 16) & 0x3)
+FIELD(SDHC_CAPAB, MAXBLOCKLENGTH,     16, 2);
 
 /* HWInit Maximum Current Capabilities Register 0x0 */
 #define SDHC_MAXCURR                   0x48
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index da30b58723..b1bcaa6153 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -59,6 +59,11 @@
  */
 #define SDHC_CAPAB_REG_DEFAULT 0x057834b4
 
+static inline unsigned int sdhci_get_fifolen(SDHCIState *s)
+{
+    return 1 << (9 + FIELD_EX32(s->capareg, SDHC_CAPAB, MAXBLOCKLENGTH));
+}
+
 static uint8_t sdhci_slotint(SDHCIState *s)
 {
     return (s->norintsts & s->norintsigen) || (s->errintsts & s->errintsigen) ||
@@ -1118,21 +1123,6 @@ static const MemoryRegionOps sdhci_mmio_ops = {
     .endianness = DEVICE_LITTLE_ENDIAN,
 };
 
-static inline unsigned int sdhci_get_fifolen(SDHCIState *s)
-{
-    switch (SDHC_CAPAB_BLOCKSIZE(s->capareg)) {
-    case 0:
-        return 512;
-    case 1:
-        return 1024;
-    case 2:
-        return 2048;
-    default:
-        hw_error("SDHC: unsupported value for maximum block size\n");
-        return 0;
-    }
-}
-
 static void sdhci_init_readonly_registers(SDHCIState *s, Error **errp)
 {
     if (s->sd_spec_version != 2) {
-- 
2.16.1

  parent reply	other threads:[~2018-02-08 16:49 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-08 16:47 [Qemu-devel] [PATCH v11 00/30] SDHCI: clean v1/2 Specs, UHS-I cards tuning sequence Philippe Mathieu-Daudé
2018-02-08 16:47 ` [Qemu-devel] [PATCH v11 01/30] sdhci: use error_propagate(local_err) in realize() Philippe Mathieu-Daudé
2018-02-08 16:47 ` [Qemu-devel] [PATCH v11 02/30] sdhci: add qtest to check the SD capabilities register Philippe Mathieu-Daudé
2018-02-08 16:47 ` [Qemu-devel] [PATCH v11 03/30] sdhci: add check_capab_readonly() qtest Philippe Mathieu-Daudé
2018-02-08 16:47 ` [Qemu-devel] [PATCH v11 04/30] sdhci: add a check_capab_baseclock() qtest Philippe Mathieu-Daudé
2018-02-08 16:47 ` [Qemu-devel] [PATCH v11 05/30] sdhci: add a check_capab_sdma() qtest Philippe Mathieu-Daudé
2018-02-08 16:47 ` [Qemu-devel] [PATCH v11 06/30] sdhci: add qtest to check the SD Spec version Philippe Mathieu-Daudé
2018-02-08 16:47 ` [Qemu-devel] [PATCH v11 07/30] sdhci: add a 'spec_version property' (default to v2) Philippe Mathieu-Daudé
2018-02-08 16:47 ` [Qemu-devel] [PATCH v11 08/30] sdhci: use a numeric value for the default CAPAB register Philippe Mathieu-Daudé
2018-02-08 16:47 ` Philippe Mathieu-Daudé [this message]
2018-02-08 16:47 ` [Qemu-devel] [PATCH v11 10/30] sdhci: check the Spec v1 capabilities correctness Philippe Mathieu-Daudé
2018-02-08 16:48 ` [Qemu-devel] [PATCH v11 12/30] sdhci: Fix 64-bit ADMA2 Philippe Mathieu-Daudé
2018-02-08 16:48 ` [Qemu-devel] [PATCH v11 13/30] sdhci: check Spec v2 capabilities (DMA and 64-bit bus) Philippe Mathieu-Daudé
2018-02-08 16:48 ` [Qemu-devel] [PATCH v11 14/30] hw/arm/exynos4210: access the 64-bit capareg with qdev_prop_set_uint64() Philippe Mathieu-Daudé
2018-02-08 16:48 ` [Qemu-devel] [PATCH v11 15/30] hw/arm/exynos4210: add a comment about a very similar SDHCI (Spec. v2) Philippe Mathieu-Daudé
2018-02-08 16:48 ` [Qemu-devel] [PATCH v11 16/30] hw/arm/xilinx_zynq: fix the capabilities register to match the datasheet Philippe Mathieu-Daudé
2018-02-08 16:48 ` [Qemu-devel] [PATCH v11 18/30] sdhci: rename the hostctl1 register Philippe Mathieu-Daudé
2018-02-08 16:48 ` [Qemu-devel] [PATCH v11 19/30] sdhci: implement the Host Control 2 register (tuning sequence) Philippe Mathieu-Daudé
2018-02-08 16:48 ` [Qemu-devel] [PATCH v11 20/30] sdbus: add trace events Philippe Mathieu-Daudé
2018-02-08 16:48 ` [Qemu-devel] [PATCH v11 21/30] sdhci: implement UHS-I voltage switch Philippe Mathieu-Daudé
2018-02-08 16:48 ` [Qemu-devel] [PATCH v11 22/30] sdhci: implement CMD/DAT[] fields in the Present State register Philippe Mathieu-Daudé
2018-02-08 16:48 ` [Qemu-devel] [PATCH v11 23/30] hw/arm/bcm2835_peripherals: implement SDHCI Spec v3 Philippe Mathieu-Daudé
2018-02-08 16:48 ` [Qemu-devel] [PATCH v11 24/30] hw/arm/bcm2835_peripherals: change maximum block size to 1kB Philippe Mathieu-Daudé
2018-02-08 16:48 ` [Qemu-devel] [PATCH v11 25/30] hw/arm/fsl-imx6: implement SDHCI Spec. v3 Philippe Mathieu-Daudé
2018-02-08 16:48 ` [Qemu-devel] [PATCH v11 26/30] hw/arm/xilinx_zynqmp: fix the capabilities/spec version to match the datasheet Philippe Mathieu-Daudé
2018-02-08 16:48 ` [Qemu-devel] [PATCH v11 27/30] hw/arm/xilinx_zynqmp: enable the UHS-I mode Philippe Mathieu-Daudé
2018-02-08 16:48 ` [Qemu-devel] [PATCH v11 28/30] sdhci: check Spec v3 capabilities qtest Philippe Mathieu-Daudé
2018-02-08 16:48 ` [Qemu-devel] [PATCH v11 29/30] sdhci: add a check_capab_v3() qtest Philippe Mathieu-Daudé

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