From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41850) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ejpNU-0007jv-2j for qemu-devel@nongnu.org; Thu, 08 Feb 2018 11:48:55 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ejpNT-0003eY-Au for qemu-devel@nongnu.org; Thu, 08 Feb 2018 11:48:52 -0500 Received: from mail-qt0-x244.google.com ([2607:f8b0:400d:c0d::244]:38112) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ejpNT-0003eS-5l for qemu-devel@nongnu.org; Thu, 08 Feb 2018 11:48:51 -0500 Received: by mail-qt0-x244.google.com with SMTP id z10so6980366qti.5 for ; Thu, 08 Feb 2018 08:48:51 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 8 Feb 2018 13:47:54 -0300 Message-Id: <20180208164818.7961-7-f4bug@amsat.org> In-Reply-To: <20180208164818.7961-1-f4bug@amsat.org> References: <20180208164818.7961-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH v11 06/30] sdhci: add qtest to check the SD Spec version List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini , Peter Maydell Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org, Alistair Francis , "Edgar E . Iglesias" Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Stefan Hajnoczi --- tests/sdhci-test.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/tests/sdhci-test.c b/tests/sdhci-test.c index 4b901b6cf1..ee12c4be7b 100644 --- a/tests/sdhci-test.c +++ b/tests/sdhci-test.c @@ -51,6 +51,19 @@ typedef struct QSDHCI { } pci; } QSDHCI; +static uint32_t sdhci_readl(QSDHCI *s, uintptr_t base, uint32_t reg) +{ + uint32_t val; + + if (s->pci.dev) { + qpci_memread(s->pci.dev, s->pci.mem_bar, reg, &val, sizeof(val)); + } else { + val = qtest_readl(global_qtest, base + reg); + } + + return val; +} + static uint64_t sdhci_readq(QSDHCI *s, uintptr_t base, uint32_t reg) { uint64_t val; @@ -73,6 +86,16 @@ static void sdhci_writeq(QSDHCI *s, uintptr_t base, uint32_t reg, uint64_t val) } } +static void check_specs_version(QSDHCI *s, uintptr_t addr, uint8_t version) +{ + uint32_t v; + + v = sdhci_readl(s, addr, SDHC_HCVER); + v &= 0xff; + v += 1; + g_assert_cmpuint(v, ==, version); +} + static void check_capab_capareg(QSDHCI *s, uintptr_t addr, uint64_t expec_capab) { uint64_t capab; @@ -160,6 +183,7 @@ static void test_machine(const void *data) s = machine_start(test); + check_specs_version(s, test->sdhci.addr, test->sdhci.version); check_capab_capareg(s, test->sdhci.addr, test->sdhci.capab.reg); check_capab_readonly(s, test->sdhci.addr); check_capab_sdma(s, test->sdhci.addr, test->sdhci.capab.sdma); -- 2.16.1