From: "Alex Bennée" <alex.bennee@linaro.org>
To: qemu-arm@nongnu.org
Cc: qemu-devel@nongnu.org, "Alex Bennée" <alex.bennee@linaro.org>,
"Peter Maydell" <peter.maydell@linaro.org>
Subject: [Qemu-devel] [PATCH v2 03/32] target/arm/cpu64: allow fp16 to be disabled
Date: Thu, 8 Feb 2018 17:31:28 +0000 [thread overview]
Message-ID: <20180208173157.24705-4-alex.bennee@linaro.org> (raw)
In-Reply-To: <20180208173157.24705-1-alex.bennee@linaro.org>
While for CONFIG_USER_ONLY it is policy for the "cpu" to be the most
capable is can be this does cause problems. For example legacy RISU
runs would fail as there are a bunch of implemented instructions which
would have caused failures that now trigger actual calculations.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
target/arm/cpu64.c | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 973614dfc6..0dc4debd9c 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -275,6 +275,26 @@ static void aarch64_cpu_set_aarch64(Object *obj, bool value, Error **errp)
}
}
+#ifdef CONFIG_USER_ONLY
+static bool aarch64_cpu_get_fp16(Object *obj, Error **errp)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+
+ return arm_feature(&cpu->env, ARM_FEATURE_V8_FP16);
+}
+
+static void aarch64_cpu_set_fp16(Object *obj, bool value, Error **errp)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+
+ if (value == false) {
+ unset_feature(&cpu->env, ARM_FEATURE_V8_FP16);
+ } else {
+ set_feature(&cpu->env, ARM_FEATURE_V8_FP16);
+ }
+}
+#endif
+
static void aarch64_cpu_initfn(Object *obj)
{
object_property_add_bool(obj, "aarch64", aarch64_cpu_get_aarch64,
@@ -283,6 +303,13 @@ static void aarch64_cpu_initfn(Object *obj)
"Set on/off to enable/disable aarch64 "
"execution state ",
NULL);
+#ifdef CONFIG_USER_ONLY
+ object_property_add_bool(obj, "fp16", aarch64_cpu_get_fp16,
+ aarch64_cpu_set_fp16, NULL);
+ object_property_set_description(obj, "fp16",
+ "Set on/off to enable/disable FP16 extensions ",
+ NULL);
+#endif
}
static void aarch64_cpu_finalizefn(Object *obj)
--
2.15.1
next prev parent reply other threads:[~2018-02-08 17:32 UTC|newest]
Thread overview: 79+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-08 17:31 [Qemu-devel] [PATCH v2 00/32] Add ARMv8.2 half-precision functions Alex Bennée
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 01/32] include/exec/helper-head.h: support f16 in helper calls Alex Bennée
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 02/32] target/arm/cpu64: introduce ARM_V8_FP16 feature bit Alex Bennée
2018-02-08 17:31 ` Alex Bennée [this message]
2018-02-08 20:36 ` [Qemu-devel] [PATCH v2 03/32] target/arm/cpu64: allow fp16 to be disabled Richard Henderson
2018-02-13 14:26 ` Peter Maydell
2018-02-21 16:35 ` Alex Bennée
2018-02-21 18:16 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 04/32] target/arm/cpu.h: update comment for half-precision values Alex Bennée
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 05/32] target/arm/cpu.h: add additional float_status flags Alex Bennée
2018-02-08 20:42 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 06/32] target/arm/helper: pass explicit fpst to set_rmode Alex Bennée
2018-02-08 20:43 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 07/32] arm/translate-a64: implement half-precision F(MIN|MAX)(V|NMV) Alex Bennée
2018-02-08 20:46 ` Richard Henderson
2018-02-08 20:49 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 08/32] arm/translate-a64: handle_3same_64 comment fix Alex Bennée
2018-02-08 20:46 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 09/32] arm/translate-a64: initial decode for simd_three_reg_same_fp16 Alex Bennée
2018-02-08 20:48 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 10/32] arm/translate-a64: add FP16 FADD/FABD/FSUB/FMUL/FDIV to simd_three_reg_same_fp16 Alex Bennée
2018-02-08 20:49 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 11/32] arm/translate-a64: add FP16 F[A]C[EQ/GE/GT] " Alex Bennée
2018-02-08 20:54 ` Richard Henderson
2018-02-23 11:59 ` Alex Bennée
2018-02-23 22:10 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 12/32] arm/translate-a64: add FP16 FMULA/X/S " Alex Bennée
2018-02-08 20:56 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 13/32] arm/translate-a64: add FP16 FR[ECP/SQRT]S " Alex Bennée
2018-02-08 20:59 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 14/32] arm/translate-a64: add FP16 pairwise ops simd_three_reg_same_fp16 Alex Bennée
2018-02-08 21:30 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 15/32] arm/translate-a64: add FP16 FMULX/MLS/FMLA to simd_indexed Alex Bennée
2018-02-08 21:49 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 16/32] arm/translate-a64: add FP16 x2 ops for simd_indexed Alex Bennée
2018-02-08 22:10 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 17/32] arm/translate-a64: initial decode for simd_two_reg_misc_fp16 Alex Bennée
2018-02-08 22:15 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 18/32] arm/translate-a64: add FP16 FPRINTx to simd_two_reg_misc_fp16 Alex Bennée
2018-02-08 22:32 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 19/32] arm/translate-a64: add FCVTxx " Alex Bennée
2018-02-08 22:35 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 20/32] arm/translate-a64: add FP16 FCMxx (zero) " Alex Bennée
2018-02-08 22:39 ` Richard Henderson
2018-02-22 17:23 ` Alex Bennée
2018-02-22 19:40 ` Richard Henderson
2018-02-23 10:23 ` Alex Bennée
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 21/32] arm/translate-a64: add FP16 SCVTF/UCVFT " Alex Bennée
2018-02-08 22:42 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 22/32] arm/translate-a64: add FP16 FNEG/FABS " Alex Bennée
2018-02-08 22:43 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 23/32] arm/helper.c: re-factor recpe and add recepe_f16 Alex Bennée
2018-02-09 17:54 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 24/32] arm/translate-a64: add FP16 FRECPE Alex Bennée
2018-02-09 17:57 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 25/32] arm/translate-a64: add FP16 FRCPX to simd_two_reg_misc_fp16 Alex Bennée
2018-02-09 18:00 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 26/32] arm/translate-a64: add FP16 FSQRT " Alex Bennée
2018-02-09 18:01 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 27/32] arm/helper.c: re-factor rsqrte and add rsqrte_f16 Alex Bennée
2018-02-09 18:15 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 28/32] arm/translate-a64: add FP16 FRSQRTE to simd_two_reg_misc_fp16 Alex Bennée
2018-02-09 18:15 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 29/32] arm/translate-a64: add FP16 FMOV to simd_mod_imm Alex Bennée
2018-02-09 18:23 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 30/32] arm/translate-a64: add all FP16 ops in simd_scalar_pairwise Alex Bennée
2018-02-09 18:27 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 31/32] arm/translate-a64: implement simd_scalar_three_reg_same_fp16 Alex Bennée
2018-02-09 18:34 ` Richard Henderson
2018-02-08 17:31 ` [Qemu-devel] [PATCH v2 32/32] arm/translate-a64: add all single op FP16 to handle_fp_1src_half Alex Bennée
2018-02-09 18:37 ` Richard Henderson
2018-02-23 9:45 ` Alex Bennée
2018-02-08 18:49 ` [Qemu-devel] [PATCH v2 00/32] Add ARMv8.2 half-precision functions no-reply
2018-02-08 18:56 ` no-reply
2018-02-08 19:04 ` no-reply
2018-02-08 19:11 ` no-reply
2018-02-08 19:17 ` no-reply
2018-02-08 21:33 ` no-reply
2018-02-13 14:27 ` [Qemu-devel] [Qemu-arm] " Peter Maydell
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