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From: "Michael S. Tsirkin" <mst@redhat.com>
To: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: "open list:ARM" <qemu-arm@nongnu.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Jason Wang" <jasowang@redhat.com>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Marcel Apfelbaum" <marcel.apfelbaum@zoho.com>,
	"QEMU Developers" <qemu-devel@nongnu.org>,
	"Andrey Yurovsky" <yurovsky@gmail.com>
Subject: Re: [Qemu-devel] [PATCH v5 10/14] pci: Add support for Designware IP block
Date: Thu, 8 Feb 2018 22:33:57 +0200	[thread overview]
Message-ID: <20180208223323-mutt-send-email-mst@kernel.org> (raw)
In-Reply-To: <CAHQ1cqHGfTYyKuMEDGPWnHBbWYV2sMrqfHU6oJV3NQSv0Xi0Qg@mail.gmail.com>

On Thu, Feb 08, 2018 at 12:22:53PM -0800, Andrey Smirnov wrote:
> On Thu, Feb 8, 2018 at 12:11 PM, Michael S. Tsirkin <mst@redhat.com> wrote:
> > On Thu, Feb 08, 2018 at 12:03:04PM -0800, Andrey Smirnov wrote:
> >> >> +#define PCIE_PORT_LINK_CONTROL          0x710
> >> >> +
> >> >> +#define PCIE_PHY_DEBUG_R1               0x72C
> >> >> +#define PCIE_PHY_DEBUG_R1_XMLH_LINK_UP  BIT(4)
> >> >> +
> >> >> +#define PCIE_LINK_WIDTH_SPEED_CONTROL   0x80C
> >> >> +#define PORT_LOGIC_SPEED_CHANGE         (0x1 << 17)
> >> >> +
> >> >> +#define PCIE_MSI_ADDR_LO                0x820
> >> >> +#define PCIE_MSI_ADDR_HI                0x824
> >> >> +#define PCIE_MSI_INTR0_ENABLE           0x828
> >> >> +#define PCIE_MSI_INTR0_MASK             0x82C
> >> >> +#define PCIE_MSI_INTR0_STATUS           0x830
> >> >> +
> >> >> +#define PCIE_ATU_VIEWPORT               0x900
> >> >> +#define PCIE_ATU_REGION_INBOUND         (0x1 << 31)
> >> >> +#define PCIE_ATU_REGION_OUTBOUND        (0x0 << 31)
> >> >> +#define PCIE_ATU_REGION_INDEX2          (0x2 << 0)
> >> >> +#define PCIE_ATU_REGION_INDEX1          (0x1 << 0)
> >> >> +#define PCIE_ATU_REGION_INDEX0          (0x0 << 0)
> >> >> +#define PCIE_ATU_CR1                    0x904
> >> >> +#define PCIE_ATU_TYPE_MEM               (0x0 << 0)
> >> >> +#define PCIE_ATU_TYPE_IO                (0x2 << 0)
> >> >> +#define PCIE_ATU_TYPE_CFG0              (0x4 << 0)
> >> >> +#define PCIE_ATU_TYPE_CFG1              (0x5 << 0)
> >> >> +#define PCIE_ATU_CR2                    0x908
> >> >> +#define PCIE_ATU_ENABLE                 (0x1 << 31)
> >> >> +#define PCIE_ATU_BAR_MODE_ENABLE        (0x1 << 30)
> >> >> +#define PCIE_ATU_LOWER_BASE             0x90C
> >> >> +#define PCIE_ATU_UPPER_BASE             0x910
> >> >> +#define PCIE_ATU_LIMIT                  0x914
> >> >> +#define PCIE_ATU_LOWER_TARGET           0x918
> >> >> +#define PCIE_ATU_BUS(x)                 (((x) >> 24) & 0xff)
> >> >> +#define PCIE_ATU_DEVFN(x)               (((x) >> 16) & 0xff)
> >> >> +#define PCIE_ATU_UPPER_TARGET           0x91C
> >
> > Can you avoid a PCIE prefix for this btw?
> >
> 
> That's how those constants were named in Linux kernel, but yeah, I'll
> add a prefix to them.
> 
> Thanks,
> Andrey Smirnov

In that case you should not copy it into your file.
Stuff from linux kernel should be imported into standard-headers.


-- 
MST

  reply	other threads:[~2018-02-08 20:34 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-07  4:24 [Qemu-devel] [PATCH v5 00/14] Initial i.MX7 support Andrey Smirnov
2018-02-07  4:24 ` [Qemu-devel] [PATCH v5 01/14] sdhci: Add i.MX specific subtype of SDHCI Andrey Smirnov
2018-02-07 14:41   ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé
2018-02-07  4:24 ` [Qemu-devel] [PATCH v5 02/14] hw: i.MX: Convert i.MX6 to use TYPE_IMX_USDHC Andrey Smirnov
2018-02-07  4:24 ` [Qemu-devel] [PATCH v5 03/14] i.MX: Add code to emulate i.MX7 CCM, PMU and ANALOG IP blocks Andrey Smirnov
2018-02-07  4:24 ` [Qemu-devel] [PATCH v5 04/14] i.MX: Add code to emulate i.MX2 watchdog IP block Andrey Smirnov
2018-02-07 14:26   ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé
2018-02-07  4:24 ` [Qemu-devel] [PATCH v5 05/14] i.MX: Add code to emulate i.MX7 SNVS IP-block Andrey Smirnov
2018-02-07  4:24 ` [Qemu-devel] [PATCH v5 06/14] i.MX: Add code to emulate GPCv2 IP block Andrey Smirnov
2018-02-07  4:24 ` [Qemu-devel] [PATCH v5 07/14] i.MX: Add i.MX7 GPT variant Andrey Smirnov
2018-02-07  4:24 ` [Qemu-devel] [PATCH v5 08/14] i.MX: Add implementation of i.MX7 GPR IP block Andrey Smirnov
2018-02-07  4:24 ` [Qemu-devel] [PATCH v5 09/14] pci: Use pci_config_size in pci_data_* accessors Andrey Smirnov
2018-02-07 14:29   ` Philippe Mathieu-Daudé
2018-02-08 17:20   ` Peter Maydell
2018-02-08 17:34     ` Michael S. Tsirkin
2018-02-08 17:43       ` Andrey Smirnov
2018-02-08 17:50         ` Michael S. Tsirkin
2018-02-08 18:08         ` Peter Maydell
2018-02-07  4:24 ` [Qemu-devel] [PATCH v5 10/14] pci: Add support for Designware IP block Andrey Smirnov
2018-02-08 17:45   ` Michael S. Tsirkin
2018-02-08 20:03     ` Andrey Smirnov
2018-02-08 20:11       ` Michael S. Tsirkin
2018-02-08 20:22         ` Andrey Smirnov
2018-02-08 20:33           ` Michael S. Tsirkin [this message]
2018-02-08 20:43             ` Andrey Smirnov
2018-02-09  0:08               ` Michael S. Tsirkin
2018-02-07  4:24 ` [Qemu-devel] [PATCH v5 11/14] usb: Add basic code to emulate Chipidea USB IP Andrey Smirnov
2018-02-07  4:24 ` [Qemu-devel] [PATCH v5 12/14] i.MX: Add i.MX7 SOC implementation Andrey Smirnov
2018-02-08 13:26   ` Peter Maydell
2018-02-08 16:49     ` Andrey Smirnov
2018-02-07  4:24 ` [Qemu-devel] [PATCH v5 13/14] hw/arm: Move virt's PSCI DT fixup code to arm/boot.c Andrey Smirnov
2018-02-07 14:27   ` Philippe Mathieu-Daudé
2018-02-08 13:49 ` [Qemu-devel] [PATCH v5 00/14] Initial i.MX7 support Peter Maydell
2018-02-08 16:50   ` Andrey Smirnov

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