* [Qemu-devel] [PULL 00/30] target-arm queue
@ 2014-02-20 11:17 Peter Maydell
2014-02-21 16:01 ` Peter Maydell
0 siblings, 1 reply; 43+ messages in thread
From: Peter Maydell @ 2014-02-20 11:17 UTC (permalink / raw)
To: Anthony Liguori; +Cc: Blue Swirl, qemu-devel, Aurelien Jarno
Here's the latest target-arm pull request. There are definitely
more things still in the pipeline so there will be at least one
more before softfreeze...
thanks
-- PMM
The following changes since commit 46eef33b89e936ca793e13c4aeea1414e97e8dbb:
Fix QEMU build on OpenBSD on x86 archs (2014-02-17 11:44:00 +0000)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20140220
for you to fetch changes up to 2ea5a2ca1f1dc302652d2ad5035e0b209ccaa177:
linux-user: AArch64: Fix exclusive store of the zero register (2014-02-20 10:35:56 +0000)
----------------------------------------------------------------
target-arm queue:
* Fix a bug causing an assertion in the NVIC on ARMv7M models
* More A64 Neon instructions
* Refactor cpreg API to separate out access check functions, as
groundwork for AArch64 system mode
* Fix bug in linux-user A64 store-exclusive of XZR
----------------------------------------------------------------
Alex Bennée (2):
target-arm: A64: Implement SIMD FP compare and set insns
target-arm: A64: Implement floating point pairwise insns
Janne Grunau (1):
linux-user: AArch64: Fix exclusive store of the zero register
Peter Maydell (27):
hw/intc/arm_gic: Fix NVIC assertion failure
target-arm: A64: Implement plain vector SIMD indexed element insns
target-arm: A64: Implement long vector x indexed insns
target-arm: A64: Implement SIMD scalar indexed instructions
target-arm: A64: Implement scalar three different instructions
softfloat: Support halving the result of muladd operation
target-arm: A64: Implement remaining 3-same instructions
target-arm/kvm-consts.h: Define QEMU constants for known KVM CPUs
target-arm: Define names for SCTLR bits
target-arm: Restrict check_ap() use of S and R bits to v6 and earlier
target-arm: Remove unused ARMCPUState sr substruct
target-arm: Log bad system register accesses with LOG_UNIMP
target-arm: Stop underdecoding ARM946 PRBS registers
target-arm: Split cpreg access checks out from read/write functions
target-arm: Convert performance monitor reginfo to accessfn
target-arm: Convert generic timer reginfo to accessfn
target-arm: Convert miscellaneous reginfo structs to accessfn
target-arm: Drop success/fail return from cpreg read and write functions
target-arm: Remove unnecessary code now read/write fns can't fail
target-arm: Remove failure status return from read/write_raw_cp_reg
target-arm: Fix incorrect type for value argument to write_raw_cp_reg
target-arm: A64: Implement store-exclusive for system mode
target-arm: A64: Add opcode comments to disas_simd_three_reg_diff
target-arm: A64: Add most remaining three-reg-diff widening ops
target-arm: A64: Implement the wide 3-reg-different operations
target-arm: A64: Implement narrowing three-reg-diff operations
target-arm: A64: Implement unprivileged load/store
fpu/softfloat.c | 38 ++
hw/arm/pxa2xx.c | 36 +-
hw/arm/pxa2xx_pic.c | 11 +-
hw/intc/arm_gic.c | 2 +-
include/fpu/softfloat.h | 3 +
linux-user/main.c | 6 +-
target-arm/cpu.c | 8 +-
target-arm/cpu.h | 105 +++-
target-arm/helper-a64.c | 105 ++++
target-arm/helper-a64.h | 9 +
target-arm/helper.c | 620 +++++++++-----------
target-arm/helper.h | 3 +
target-arm/kvm-consts.h | 16 +-
target-arm/neon_helper.c | 16 +
target-arm/op_helper.c | 46 +-
target-arm/translate-a64.c | 1358 ++++++++++++++++++++++++++++++++++++++------
target-arm/translate.c | 28 +-
17 files changed, 1815 insertions(+), 595 deletions(-)
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PULL 00/30] target-arm queue
2014-02-20 11:17 Peter Maydell
@ 2014-02-21 16:01 ` Peter Maydell
0 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2014-02-21 16:01 UTC (permalink / raw)
To: Anthony Liguori; +Cc: Blue Swirl, QEMU Developers, Aurelien Jarno
On 20 February 2014 11:17, Peter Maydell <peter.maydell@linaro.org> wrote:
> Here's the latest target-arm pull request. There are definitely
> more things still in the pipeline so there will be at least one
> more before softfreeze...
Applied, thanks.
-- PMM
^ permalink raw reply [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 00/30] target-arm queue
@ 2016-03-04 11:41 Peter Maydell
2016-03-04 14:05 ` Peter Maydell
0 siblings, 1 reply; 43+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
Here's the target-arm queue: fairly large with a roundup of lots
of patches that hit the list at or just before the softfreeze
deadline. Most notable thing in here is Peter/Paolo's bigendian
and SETEND support patchset.
There are still some patchsets on list that I haven't got to
reviewing yet (eg last set of raspi patches, imx6) which I hope
to get to early next week and into a pullreq next week sometime.
thanks
-- PMM
The following changes since commit 2d3b7c0164e1b9287304bc70dd6ed071ba3e8dfc:
Merge remote-tracking branch 'remotes/amit-virtio-rng/tags/rng-for-2.6-1' into staging (2016-03-03 13:13:36 +0000)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20160304
for you to fetch changes up to ba63cf47a93041137a94e86b7d0cd87fc896949b:
target-arm: Only trap SRS from S-EL1 if specified mode is MON (2016-03-04 11:30:22 +0000)
----------------------------------------------------------------
target-arm queue:
* Correct handling of writes to CPSR from gdbstub in user mode
* virt: lift maximum RAM limit to 255GB
* sdhci: implement reset
* virt: if booting in Secure mode, provide secure-only RAM, make first
flash device secure-only, and assume the EL3 boot rom will handle PSCI
* bcm2835: use explicit endianness accessors rather than ldl/stl_phys
* support big-endian in system mode for ARM
* implement SETEND instruction
* arm_gic: implement the GICv2 GICC_DIR register
* fix SRS bug: only trap from S-EL1 to EL3 if specified mode is Mon
----------------------------------------------------------------
Andrew Baumann (1):
bcm2835_mbox/property: replace ldl_phys/stl_phys with endian-specific accesses
Paolo Bonzini (8):
linux-user: arm: fix coding style for some linux-user signal functions
linux-user: arm: pass env to get_user_code_*
target-arm: implement SCTLR.B, drop bswap_code
linux-user: arm: handle CPSR.E correctly in strex emulation
target-arm: pass DisasContext to gen_aa32_ld*/st*
target-arm: introduce disas flag for endianness
target-arm: implement setend
target-arm: implement BE32 mode in system emulation
Peter Crosthwaite (10):
target-arm: cpu: Move cpu_is_big_endian to header
arm: cpu: handle BE32 user-mode as BE
linux-user: arm: set CPSR.E/SCTLR.E0E correctly for BE mode
target-arm: implement SCTLR.EE
target-arm: a64: Add endianness support
target-arm: introduce tbflag for endianness
loader: add API to load elf header
loader: load_elf(): Add doc comment
loader: Add data swap option to load-elf
arm: boot: Support big-endian elfs
Peter Maydell (10):
target-arm: Correct handling of writes to CPSR mode bits from gdb in usermode
virt: Lift the maximum RAM limit from 30GB to 255GB
sd.c: Handle NULL block backend in sd_get_inserted()
sdhci: Implement DeviceClass reset
hw/arm/virt: Provide a secure-only RAM if booting in Secure mode
loader: Add load_image_mr() to load ROM image to a MemoryRegion
hw/arm/virt: Load bios image to MemoryRegion, not physaddr
hw/arm/virt: Make first flash device Secure-only if booting secure
hw/arm/virt: Assume EL3 boot rom will handle PSCI if one is provided
hw/intc/arm_gic.c: Implement GICv2 GICC_DIR
Ralf-Philipp Weinmann (1):
target-arm: Only trap SRS from S-EL1 if specified mode is MON
hw/alpha/dp264.c | 4 +-
hw/arm/armv7m.c | 2 +-
hw/arm/boot.c | 93 ++++++++-
hw/arm/virt.c | 168 +++++++++++++----
hw/core/loader.c | 99 +++++++++-
hw/cpu/a15mpcore.c | 2 +-
hw/cris/boot.c | 2 +-
hw/i386/multiboot.c | 3 +-
hw/intc/arm_gic.c | 45 ++++-
hw/intc/arm_gic_common.c | 2 +-
hw/lm32/lm32_boards.c | 4 +-
hw/lm32/milkymist.c | 2 +-
hw/m68k/an5206.c | 2 +-
hw/m68k/dummy_m68k.c | 2 +-
hw/m68k/mcf5208.c | 2 +-
hw/microblaze/boot.c | 4 +-
hw/mips/mips_fulong2e.c | 2 +-
hw/mips/mips_malta.c | 2 +-
hw/mips/mips_mipssim.c | 2 +-
hw/mips/mips_r4k.c | 2 +-
hw/misc/bcm2835_mbox.c | 6 +-
hw/misc/bcm2835_property.c | 38 ++--
hw/moxie/moxiesim.c | 3 +-
hw/openrisc/openrisc_sim.c | 3 +-
hw/pci-host/prep.c | 2 +-
hw/ppc/e500.c | 2 +-
hw/ppc/mac_newworld.c | 5 +-
hw/ppc/mac_oldworld.c | 5 +-
hw/ppc/ppc440_bamboo.c | 3 +-
hw/ppc/spapr.c | 6 +-
hw/ppc/virtex_ml507.c | 3 +-
hw/s390x/ipl.c | 4 +-
hw/sd/sd.c | 2 +-
hw/sd/sdhci.c | 21 ++-
hw/sparc/leon3.c | 2 +-
hw/sparc/sun4m.c | 4 +-
hw/sparc64/sun4u.c | 4 +-
hw/tricore/tricore_testboard.c | 2 +-
hw/xtensa/sim.c | 4 +-
hw/xtensa/xtfpga.c | 2 +-
include/hw/arm/arm.h | 9 +
include/hw/arm/virt.h | 1 +
include/hw/elf_ops.h | 22 ++-
include/hw/loader.h | 59 +++++-
linux-user/main.c | 77 ++++++--
linux-user/signal.c | 110 +++++------
target-arm/arm_ldst.h | 8 +-
target-arm/cpu.c | 21 +--
target-arm/cpu.h | 98 +++++++++-
target-arm/helper.c | 42 ++++-
target-arm/helper.h | 1 +
target-arm/op_helper.c | 5 +
target-arm/translate-a64.c | 56 +++---
target-arm/translate.c | 418 ++++++++++++++++++++++++-----------------
target-arm/translate.h | 3 +-
55 files changed, 1064 insertions(+), 431 deletions(-)
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PULL 00/30] target-arm queue
2016-03-04 11:41 Peter Maydell
@ 2016-03-04 14:05 ` Peter Maydell
0 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2016-03-04 14:05 UTC (permalink / raw)
To: QEMU Developers
On 4 March 2016 at 11:41, Peter Maydell <peter.maydell@linaro.org> wrote:
> Here's the target-arm queue: fairly large with a roundup of lots
> of patches that hit the list at or just before the softfreeze
> deadline. Most notable thing in here is Peter/Paolo's bigendian
> and SETEND support patchset.
>
> There are still some patchsets on list that I haven't got to
> reviewing yet (eg last set of raspi patches, imx6) which I hope
> to get to early next week and into a pullreq next week sometime.
>
> thanks
> -- PMM
>
> The following changes since commit 2d3b7c0164e1b9287304bc70dd6ed071ba3e8dfc:
>
> Merge remote-tracking branch 'remotes/amit-virtio-rng/tags/rng-for-2.6-1' into staging (2016-03-03 13:13:36 +0000)
>
> are available in the git repository at:
>
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20160304
>
> for you to fetch changes up to ba63cf47a93041137a94e86b7d0cd87fc896949b:
>
> target-arm: Only trap SRS from S-EL1 if specified mode is MON (2016-03-04 11:30:22 +0000)
>
> ----------------------------------------------------------------
> target-arm queue:
> * Correct handling of writes to CPSR from gdbstub in user mode
> * virt: lift maximum RAM limit to 255GB
> * sdhci: implement reset
> * virt: if booting in Secure mode, provide secure-only RAM, make first
> flash device secure-only, and assume the EL3 boot rom will handle PSCI
> * bcm2835: use explicit endianness accessors rather than ldl/stl_phys
> * support big-endian in system mode for ARM
> * implement SETEND instruction
> * arm_gic: implement the GICv2 GICC_DIR register
> * fix SRS bug: only trap from S-EL1 to EL3 if specified mode is Mon
>
Applied, thanks.
-- PMM
^ permalink raw reply [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 00/30] target-arm queue
@ 2016-06-14 14:13 Peter Maydell
0 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2016-06-14 14:13 UTC (permalink / raw)
To: qemu-devel
target-arm queue; quite a lot of patches but nothing earthshaking.
thanks
-- PMM
The following changes since commit d32490ca74c700edc74f0b2f6b7536b52a644739:
Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20160614' into staging (2016-06-14 13:14:55 +0100)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20160614
for you to fetch changes up to ea924f729b7703c9d81f62b54bcaa75f9d9f314e:
target-arm: Don't permit ARMv8-only Neon insns on ARMv7 (2016-06-14 15:02:30 +0100)
----------------------------------------------------------------
target-arm queue:
* add PMU support for virt machine under KVM
* fix reset and migration of TTBCR(S)
* add virt-2.7 machine type
* QOMify various ARM devices
* implement xilinx DisplayPort device
* don't permit ARMv8-only Neon insns to work on ARMv7
----------------------------------------------------------------
Andrew Jones (4):
hw/arm/virt: separate versioned type-init code
hw/arm/virt: introduce DEFINE_VIRT_MACHINE
hw/arm/virt: introduce DEFINE_VIRT_MACHINE_AS_LATEST
hw/arm/virt: create the 2.7 machine type
KONRAD Frederic (7):
i2cbus: remove unused dev field
i2c: implement broadcast write
introduce aux-bus
introduce dpcd module
introduce xlnx-dpdma
introduce xlnx-dp
arm: xlnx-zynqmp: Add xlnx-dp and xlnx-dpdma
Peter Crosthwaite (1):
i2c: Factor our send() and recv() common logic
Peter Maydell (3):
target-arm: Fix reset and migration of TTBCR(S)
hw/i2c-ddc.c: Implement DDC I2C slave
target-arm: Don't permit ARMv8-only Neon insns on ARMv7
Shannon Zhao (3):
target-arm: kvm64: set guest PMUv3 feature bit if supported
hw/arm/virt: Add PMU node for virt machine
hw/arm/virt-acpi-build: Add PMU IRQ number in ACPI table
xiaoqiang zhao (12):
hw/i2c: QOM'ify bitbang_i2c.c
hw/i2c: QOM'ify exynos4210_i2c.c
hw/i2c: QOM'ify omap_i2c.c
hw/i2c: QOM'ify versatile_i2c.c
hw/gpio: QOM'ify omap_gpio.c
hw/gpio: QOM'ify pl061.c
hw/gpio: QOM'ify zaurus.c
hw/misc: QOM'ify arm_l2x0.c
hw/misc: QOM'ify exynos4210_pmu.c
hw/misc: QOM'ify mst_fpga.c
hw/dma: QOM'ify pxa2xx_dma.c
hw/sd: QOM'ify pl181.c
default-configs/aarch64-softmmu.mak | 3 +
hw/arm/virt-acpi-build.c | 4 +
hw/arm/virt.c | 99 ++-
hw/arm/xlnx-zynqmp.c | 32 +-
hw/display/Makefile.objs | 2 +
hw/display/dpcd.c | 173 +++++
hw/display/xlnx_dp.c | 1336 +++++++++++++++++++++++++++++++++++
hw/dma/Makefile.objs | 1 +
hw/dma/pxa2xx_dma.c | 38 +-
hw/dma/xlnx_dpdma.c | 794 +++++++++++++++++++++
hw/gpio/omap_gpio.c | 61 +-
hw/gpio/pl061.c | 24 +-
hw/gpio/zaurus.c | 14 +-
hw/i2c/Makefile.objs | 1 +
hw/i2c/bitbang_i2c.c | 14 +-
hw/i2c/core.c | 161 +++--
hw/i2c/exynos4210_i2c.c | 13 +-
hw/i2c/i2c-ddc.c | 307 ++++++++
hw/i2c/omap_i2c.c | 42 +-
hw/i2c/versatile_i2c.c | 19 +-
hw/misc/Makefile.objs | 1 +
hw/misc/arm_l2x0.c | 11 +-
hw/misc/aux.c | 292 ++++++++
hw/misc/exynos4210_pmu.c | 11 +-
hw/misc/mst_fpga.c | 13 +-
hw/sd/pl181.c | 26 +-
include/hw/arm/virt.h | 4 +
include/hw/arm/xlnx-zynqmp.h | 4 +
include/hw/display/dpcd.h | 105 +++
include/hw/display/xlnx_dp.h | 109 +++
include/hw/dma/xlnx_dpdma.h | 85 +++
include/hw/i2c/i2c-ddc.h | 38 +
include/hw/i2c/i2c.h | 1 +
include/hw/misc/aux.h | 128 ++++
target-arm/cpu.h | 2 +
target-arm/helper.c | 5 +-
target-arm/kvm32.c | 6 +
target-arm/kvm64.c | 46 ++
target-arm/kvm_arm.h | 7 +
target-arm/translate.c | 28 +
40 files changed, 3837 insertions(+), 223 deletions(-)
create mode 100644 hw/display/dpcd.c
create mode 100644 hw/display/xlnx_dp.c
create mode 100644 hw/dma/xlnx_dpdma.c
create mode 100644 hw/i2c/i2c-ddc.c
create mode 100644 hw/misc/aux.c
create mode 100644 include/hw/display/dpcd.h
create mode 100644 include/hw/display/xlnx_dp.h
create mode 100644 include/hw/dma/xlnx_dpdma.h
create mode 100644 include/hw/i2c/i2c-ddc.h
create mode 100644 include/hw/misc/aux.h
^ permalink raw reply [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 00/30] target-arm queue
@ 2017-02-27 18:04 Peter Maydell
2017-02-27 19:14 ` no-reply
2017-02-28 12:07 ` Peter Maydell
0 siblings, 2 replies; 43+ messages in thread
From: Peter Maydell @ 2017-02-27 18:04 UTC (permalink / raw)
To: qemu-devel
ARM queu; includes all the NVIC rewrite patches.
The QOMify-armv7m patchset hasn't got enough review just
yet but I may be able to sneak it in before freeze
tomorrow if it gets review. Didn't want to hold this lot
up waiting, anyway.
thanks
-- PMM
The following changes since commit 8f2d7c341184a95d05476ea3c45dbae2b9ddbe51:
Merge remote-tracking branch 'remotes/berrange/tags/pull-qcrypto-2017-02-27-1' into staging (2017-02-27 15:33:21 +0000)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20170227
for you to fetch changes up to 94d5bcf5a7f3799660b62098a5183f161aad0601:
hw/arm/exynos: Fix proper mapping of CPUs by providing real cluster ID (2017-02-27 17:23:16 +0000)
----------------------------------------------------------------
target-arm queue:
* raspi2: implement RNG module, GPIO and new SD card controller
(sufficient to boot new raspbian kernels)
* sdhci: bugfixes for block transfers
* virt: fix cpu object reference leak
* Add missing fp_access_check() to aarch64 crypto instructions
* cputlb: Don't assume do_unassigned_access() never returns
* virt: Add a user option to disallow ITS instantiation
* i.MX timers: fix reset handling
* ARMv7M NVIC: rewrite to fix broken priority handling and masking
* exynos: Fix proper mapping of CPUs by providing real cluster ID
* exynos: Fix Linux kernel division by zero for PLLs
----------------------------------------------------------------
Clement Deschamps (4):
bcm2835_sdhost: add bcm2835 sdhost controller
hw/sd: add card-reparenting function
bcm2835_gpio: add bcm2835 gpio controller
bcm2835: add sdhost and gpio controllers
Eric Auger (1):
hw/arm/virt: Add a user option to disallow ITS instantiation
Igor Mammedov (1):
hw/arm/virt: fix cpu object reference leak
Krzysztof Kozlowski (2):
hw/arm/exynos: Fix Linux kernel division by zero for PLLs
hw/arm/exynos: Fix proper mapping of CPUs by providing real cluster ID
Kurban Mallachiev (1):
ARM i.MX timers: fix reset handling
Marcin Chojnacki (1):
target-arm: Implement BCM2835 hardware RNG
Michael Davidsaver (5):
armv7m: Rewrite NVIC to not use any GIC code
arm: gic: Remove references to NVIC
armv7m: Escalate exceptions to HardFault if necessary
armv7m: Simpler and faster exception start
armv7m: VECTCLRACTIVE and VECTRESET are UNPREDICTABLE
Nick Reilly (1):
Add missing fp_access_check() to aarch64 crypto instructions
Peter Maydell (10):
bcm2835_rng: Use qcrypto_random_bytes() rather than rand()
cputlb: Don't assume do_unassigned_access() never returns
armv7m: Rename nvic_state to NVICState
armv7m: Implement reading and writing of PRIGROUP
armv7m: Fix condition check for taking exceptions
armv7m: Remove unused armv7m_nvic_acknowledge_irq() return value
armv7m: Extract "exception taken" code into functions
armv7m: Check exception return consistency
armv7m: Raise correct kind of UsageFault for attempts to execute ARM code
armv7m: Allow SHCSR writes to change pending and active bits
Prasad J Pandit (4):
sd: sdhci: mask transfer mode register value
sd: sdhci: check transfer mode register in multi block transfer
sd: sdhci: conditionally invoke multi block transfer
sd: sdhci: Remove block count enable check in single block transfers
hw/gpio/Makefile.objs | 1 +
hw/misc/Makefile.objs | 3 +-
hw/sd/Makefile.objs | 1 +
hw/intc/gic_internal.h | 7 +-
include/hw/arm/bcm2835_peripherals.h | 6 +
include/hw/arm/virt.h | 1 +
include/hw/gpio/bcm2835_gpio.h | 39 ++
include/hw/misc/bcm2835_rng.h | 27 ++
include/hw/sd/bcm2835_sdhost.h | 48 ++
include/hw/sd/sd.h | 11 +
target/arm/cpu.h | 23 +-
cputlb.c | 15 +-
hw/arm/bcm2835_peripherals.c | 58 ++-
hw/arm/exynos4210.c | 18 +
hw/arm/virt.c | 32 +-
hw/gpio/bcm2835_gpio.c | 353 ++++++++++++++
hw/intc/arm_gic.c | 31 +-
hw/intc/arm_gic_common.c | 23 +-
hw/intc/armv7m_nvic.c | 885 ++++++++++++++++++++++++++++-------
hw/misc/bcm2835_rng.c | 149 ++++++
hw/misc/exynos4210_clk.c | 164 +++++++
hw/sd/bcm2835_sdhost.c | 429 +++++++++++++++++
hw/sd/core.c | 30 ++
hw/sd/sdhci.c | 25 +-
hw/timer/imx_gpt.c | 33 +-
linux-user/main.c | 1 +
target/arm/cpu.c | 16 +-
target/arm/helper.c | 245 +++++++---
target/arm/translate-a64.c | 12 +
target/arm/translate.c | 8 +-
hw/intc/trace-events | 15 +
31 files changed, 2376 insertions(+), 333 deletions(-)
create mode 100644 include/hw/gpio/bcm2835_gpio.h
create mode 100644 include/hw/misc/bcm2835_rng.h
create mode 100644 include/hw/sd/bcm2835_sdhost.h
create mode 100644 hw/gpio/bcm2835_gpio.c
create mode 100644 hw/misc/bcm2835_rng.c
create mode 100644 hw/misc/exynos4210_clk.c
create mode 100644 hw/sd/bcm2835_sdhost.c
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PULL 00/30] target-arm queue
2017-02-27 18:04 Peter Maydell
@ 2017-02-27 19:14 ` no-reply
2017-02-28 12:07 ` Peter Maydell
1 sibling, 0 replies; 43+ messages in thread
From: no-reply @ 2017-02-27 19:14 UTC (permalink / raw)
To: peter.maydell; +Cc: famz, qemu-devel
Hi,
This series failed build test on s390x host. Please find the details below.
Message-id: 1488218699-31035-1-git-send-email-peter.maydell@linaro.org
Type: series
Subject: [Qemu-devel] [PULL 00/30] target-arm queue
=== TEST SCRIPT BEGIN ===
#!/bin/bash
# Testing script will be invoked under the git checkout with
# HEAD pointing to a commit that has the patches applied on top of "base"
# branch
set -e
echo "=== ENV ==="
env
echo "=== PACKAGES ==="
rpm -qa
echo "=== TEST BEGIN ==="
CC=$HOME/bin/cc
INSTALL=$PWD/install
BUILD=/var/tmp/patchew-qemu-build
echo -n "Using CC: "
realpath $CC
test -e $BUILD && rm -rf $BUILD
mkdir -p $BUILD $INSTALL
SRC=$PWD
cd $BUILD
$SRC/configure --cc=$CC --prefix=$INSTALL
make -j4
make check -j4
make install
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
* [new tag] patchew/1488218699-31035-1-git-send-email-peter.maydell@linaro.org -> patchew/1488218699-31035-1-git-send-email-peter.maydell@linaro.org
Switched to a new branch 'test'
fac2e4e hw/arm/exynos: Fix proper mapping of CPUs by providing real cluster ID
a19dfed hw/arm/exynos: Fix Linux kernel division by zero for PLLs
c49b077 bcm2835: add sdhost and gpio controllers
119282b bcm2835_gpio: add bcm2835 gpio controller
d874e6e hw/sd: add card-reparenting function
dcbc5d0 bcm2835_sdhost: add bcm2835 sdhost controller
1c9fe401 armv7m: Allow SHCSR writes to change pending and active bits
ec123a6 armv7m: Raise correct kind of UsageFault for attempts to execute ARM code
de24aef armv7m: Check exception return consistency
aba0f63 armv7m: Extract "exception taken" code into functions
041a279 armv7m: VECTCLRACTIVE and VECTRESET are UNPREDICTABLE
87177eb armv7m: Simpler and faster exception start
8b1fa57 armv7m: Remove unused armv7m_nvic_acknowledge_irq() return value
76d49a0 armv7m: Escalate exceptions to HardFault if necessary
b554bb3 arm: gic: Remove references to NVIC
d9368b7 armv7m: Fix condition check for taking exceptions
c44de81 armv7m: Rewrite NVIC to not use any GIC code
aa72c10 armv7m: Implement reading and writing of PRIGROUP
086d1be armv7m: Rename nvic_state to NVICState
a5cf037 ARM i.MX timers: fix reset handling
4aaa21e hw/arm/virt: Add a user option to disallow ITS instantiation
45db604 cputlb: Don't assume do_unassigned_access() never returns
65c7e7f Add missing fp_access_check() to aarch64 crypto instructions
f1d750d hw/arm/virt: fix cpu object reference leak
816a1bb sd: sdhci: Remove block count enable check in single block transfers
3ea47a5 sd: sdhci: conditionally invoke multi block transfer
6d6aac0 sd: sdhci: check transfer mode register in multi block transfer
4365104 sd: sdhci: mask transfer mode register value
3c3f31d bcm2835_rng: Use qcrypto_random_bytes() rather than rand()
f58b171 target-arm: Implement BCM2835 hardware RNG
=== OUTPUT BEGIN ===
=== ENV ===
XDG_SESSION_ID=38554
SHELL=/bin/sh
USER=fam
PATCHEW=/home/fam/patchew/patchew-cli -s http://patchew.org --nodebug
PATH=/usr/bin:/bin
PWD=/var/tmp/patchew-tester-tmp-_t3ms3un/src
LANG=en_US.UTF-8
HOME=/home/fam
SHLVL=2
LOGNAME=fam
DBUS_SESSION_BUS_ADDRESS=unix:path=/run/user/1012/bus
XDG_RUNTIME_DIR=/run/user/1012
_=/usr/bin/env
=== PACKAGES ===
gpg-pubkey-873529b8-54e386ff
xz-libs-5.2.2-2.fc24.s390x
libacl-2.2.52-11.fc24.s390x
libxshmfence-1.2-3.fc24.s390x
cdparanoia-libs-10.2-21.fc24.s390x
ustr-1.0.4-21.fc24.s390x
giflib-4.1.6-15.fc24.s390x
libusb-0.1.5-7.fc24.s390x
trousers-lib-0.3.13-6.fc24.s390x
readline-devel-6.3-8.fc24.s390x
python-srpm-macros-3-10.fc25.noarch
ncurses-base-6.0-6.20160709.fc25.noarch
gmp-6.1.1-1.fc25.s390x
chkconfig-1.8-1.fc25.s390x
libidn-1.33-1.fc25.s390x
file-5.28-4.fc25.s390x
slang-2.3.0-7.fc25.s390x
avahi-libs-0.6.32-4.fc25.s390x
libsemanage-2.5-8.fc25.s390x
perl-Unicode-Normalize-1.25-365.fc25.s390x
perl-libnet-3.10-1.fc25.noarch
perl-Thread-Queue-3.11-1.fc25.noarch
perl-podlators-4.09-1.fc25.noarch
jasper-libs-1.900.13-1.fc25.s390x
graphite2-1.3.6-1.fc25.s390x
libblkid-2.28.2-1.fc25.s390x
pkgconfig-0.29.1-1.fc25.s390x
dbus-python-1.2.4-2.fc25.s390x
alsa-lib-1.1.1-2.fc25.s390x
libgnome-keyring-3.12.0-7.fc25.s390x
yum-metadata-parser-1.1.4-17.fc25.s390x
python3-3.5.2-4.fc25.s390x
python3-slip-dbus-0.6.4-4.fc25.noarch
python2-cssselect-0.9.2-1.fc25.noarch
python-backports-1.0-8.fc25.s390x
python-magic-5.28-4.fc25.noarch
python-pycparser-2.14-7.fc25.noarch
python-fedora-0.8.0-2.fc25.noarch
createrepo_c-libs-0.10.0-6.fc25.s390x
initscripts-9.69-1.fc25.s390x
plymouth-scripts-0.9.3-0.6.20160620git0e65b86c.fc25.s390x
cronie-1.5.1-2.fc25.s390x
python2-librepo-1.7.18-3.fc25.s390x
wget-1.18-2.fc25.s390x
python3-dnf-plugins-core-0.1.21-4.fc25.noarch
at-spi2-core-2.22.0-1.fc25.s390x
libXv-1.0.11-1.fc25.s390x
dhcp-client-4.3.5-1.fc25.s390x
python2-dnf-plugins-core-0.1.21-4.fc25.noarch
parted-3.2-21.fc25.s390x
python2-ndg_httpsclient-0.4.0-4.fc25.noarch
bash-completion-2.4-1.fc25.noarch
btrfs-progs-4.6.1-1.fc25.s390x
texinfo-6.1-3.fc25.s390x
perl-Filter-1.55-366.fc25.s390x
flex-2.6.0-3.fc25.s390x
libgcc-6.3.1-1.fc25.s390x
glib2-2.50.2-1.fc25.s390x
dbus-libs-1.11.8-1.fc25.s390x
libgomp-6.3.1-1.fc25.s390x
colord-libs-1.3.4-1.fc25.s390x
perl-Encode-2.88-5.fc25.s390x
gstreamer1-1.10.2-1.fc25.s390x
cracklib-2.9.6-4.fc25.s390x
rpm-build-libs-4.13.0-6.fc25.s390x
libobjc-6.3.1-1.fc25.s390x
pcre-devel-8.40-1.fc25.s390x
mariadb-config-10.1.20-1.fc25.s390x
gcc-6.3.1-1.fc25.s390x
mesa-libGL-13.0.3-1.fc25.s390x
python3-dnf-plugin-system-upgrade-0.7.1-4.fc25.noarch
bind-libs-9.10.4-4.P5.fc25.s390x
python-osbs-client-0.33-3.fc25.noarch
NetworkManager-1.4.4-3.fc25.s390x
audit-2.7.1-1.fc25.s390x
glibc-static-2.24-4.fc25.s390x
perl-Pod-Simple-3.35-1.fc25.noarch
gdb-7.12-36.fc25.s390x
python2-simplejson-3.10.0-1.fc25.s390x
python3-sssdconfig-1.14.2-2.fc25.noarch
texlive-lib-2016-30.20160520.fc25.s390x
boost-random-1.60.0-10.fc25.s390x
brltty-5.4-2.fc25.s390x
libref_array-0.1.5-29.fc25.s390x
librados2-10.2.4-2.fc25.s390x
gnutls-dane-3.5.8-1.fc25.s390x
systemtap-client-3.1-0.20160725git91bfb36.fc25.s390x
libXrender-devel-0.9.10-1.fc25.s390x
libXi-devel-1.7.8-2.fc25.s390x
texlive-pdftex-doc-svn41149-30.fc25.noarch
tcp_wrappers-7.6-83.fc25.s390x
javapackages-tools-4.7.0-6.1.fc25.noarch
texlive-kpathsea-bin-svn40473-30.20160520.fc25.s390x
texlive-url-svn32528.3.4-30.fc25.noarch
texlive-latex-fonts-svn28888.0-30.fc25.noarch
texlive-mptopdf-bin-svn18674.0-30.20160520.fc25.noarch
texlive-underscore-svn18261.0-30.fc25.noarch
texlive-subfig-svn15878.1.3-30.fc25.noarch
texlive-dvipdfmx-def-svn40328-30.fc25.noarch
texlive-plain-svn40274-30.fc25.noarch
texlive-texlive-scripts-svn41433-30.fc25.noarch
texlive-fancyref-svn15878.0.9c-30.fc25.noarch
texlive-csquotes-svn39538-30.fc25.noarch
texlive-pxfonts-svn15878.0-30.fc25.noarch
texlive-cite-svn36428.5.5-30.fc25.noarch
texlive-section-svn20180.0-30.fc25.noarch
texlive-pslatex-svn16416.0-30.fc25.noarch
texlive-tex-gyre-math-svn41264-30.fc25.noarch
texlive-knuth-local-svn38627-30.fc25.noarch
texlive-type1cm-svn21820.0-30.fc25.noarch
texlive-finstrut-svn21719.0.5-30.fc25.noarch
texlive-ucharcat-svn38907-30.fc25.noarch
texlive-environ-svn33821.0.3-30.fc25.noarch
texlive-eso-pic-svn37925.2.0g-30.fc25.noarch
texlive-filehook-svn24280.0.5d-30.fc25.noarch
texlive-luatexbase-svn38550-30.fc25.noarch
texlive-pst-text-svn15878.1.00-30.fc25.noarch
texlive-pst-tree-svn24142.1.12-30.fc25.noarch
texlive-latex-bin-bin-svn14050.0-30.20160520.fc25.noarch
texlive-metalogo-svn18611.0.12-30.fc25.noarch
texlive-cm-super-svn15878.0-30.fc25.noarch
texlive-xetex-svn41438-30.fc25.noarch
keyutils-1.5.9-8.fc24.s390x
libcephfs_jni1-10.2.4-2.fc25.s390x
libcom_err-devel-1.43.3-1.fc25.s390x
mesa-libGLES-devel-13.0.3-1.fc25.s390x
graphite2-devel-1.3.6-1.fc25.s390x
nettle-devel-3.3-1.fc25.s390x
lzo-minilzo-2.08-8.fc24.s390x
bzip2-devel-1.0.6-21.fc25.s390x
libusbx-devel-1.0.21-1.fc25.s390x
SDL2-devel-2.0.5-2.fc25.s390x
virglrenderer-devel-0.5.0-1.20160411git61846f92f.fc25.s390x
glib2-static-2.50.2-1.fc25.s390x
mesa-libgbm-devel-13.0.3-1.fc25.s390x
acpica-tools-20160831-1.fc25.s390x
gdk-pixbuf2-2.36.4-1.fc25.s390x
nss-softokn-3.28.1-1.0.fc25.s390x
python3-dnf-1.1.10-5.fc25.noarch
python-gluster-3.9.1-1.fc25.noarch
perl-IO-1.36-382.fc25.s390x
glusterfs-devel-3.9.1-1.fc25.s390x
gtk3-3.22.7-1.fc25.s390x
vim-enhanced-8.0.206-1.fc25.s390x
nss-tools-3.28.1-1.3.fc25.s390x
libmicrohttpd-0.9.52-1.fc25.s390x
gpg-pubkey-a29cb19c-53bcbba6
libaio-0.3.110-6.fc24.s390x
m4-1.4.17-9.fc24.s390x
libfontenc-1.1.3-3.fc24.s390x
lzo-2.08-8.fc24.s390x
isl-0.14-5.fc24.s390x
libXau-1.0.8-6.fc24.s390x
liblockfile-1.09-4.fc24.s390x
linux-atm-libs-2.5.1-14.fc24.s390x
sg3_utils-1.41-3.fc24.s390x
libXext-1.3.3-4.fc24.s390x
libXinerama-1.1.3-6.fc24.s390x
libXxf86vm-1.1.4-3.fc24.s390x
libXft-2.3.2-4.fc24.s390x
ykpers-1.17.3-2.fc24.s390x
bison-3.0.4-4.fc24.s390x
perl-srpm-macros-1-20.fc25.noarch
gawk-4.1.3-8.fc25.s390x
tcp_wrappers-libs-7.6-83.fc25.s390x
libwayland-client-1.12.0-1.fc25.s390x
iptables-1.6.0-2.fc25.s390x
perl-Exporter-5.72-366.fc25.noarch
perl-Text-Tabs+Wrap-2013.0523-365.fc25.noarch
perl-Error-0.17024-7.fc25.noarch
perl-Term-Cap-1.17-365.fc25.noarch
perl-version-0.99.17-1.fc25.s390x
perl-Pod-Usage-1.69-1.fc25.noarch
fftw-libs-double-3.3.5-3.fc25.s390x
device-mapper-persistent-data-0.6.3-1.fc25.s390x
krb5-libs-1.14.4-4.fc25.s390x
system-python-libs-3.5.2-4.fc25.s390x
net-snmp-libs-5.7.3-13.fc25.s390x
libssh2-1.8.0-1.fc25.s390x
libgusb-0.2.9-1.fc25.s390x
ModemManager-glib-1.6.4-1.fc25.s390x
python3-six-1.10.0-3.fc25.noarch
newt-python3-0.52.19-2.fc25.s390x
python3-pysocks-1.5.6-5.fc25.noarch
python-chardet-2.3.0-1.fc25.noarch
python-munch-2.0.4-3.fc25.noarch
python2-cffi-1.7.0-2.fc25.s390x
python-bugzilla-1.2.2-4.fc25.noarch
openldap-2.4.44-2.fc25.s390x
libedit-3.1-16.20160618cvs.fc25.s390x
gc-devel-7.4.4-1.fc25.s390x
python-pycurl-7.43.0-4.fc25.s390x
createrepo_c-0.10.0-6.fc25.s390x
plymouth-0.9.3-0.6.20160620git0e65b86c.fc25.s390x
device-mapper-multipath-libs-0.4.9-83.fc25.s390x
ebtables-2.0.10-21.fc25.s390x
python3-librepo-1.7.18-3.fc25.s390x
libwmf-lite-0.2.8.4-49.fc25.s390x
net-snmp-5.7.3-13.fc25.s390x
yum-3.4.3-510.fc25.noarch
dnf-plugins-core-0.1.21-4.fc25.noarch
at-spi2-atk-2.22.0-1.fc25.s390x
ImageMagick-libs-6.9.3.0-3.fc25.s390x
dhcp-common-4.3.5-1.fc25.noarch
kernel-modules-4.8.8-300.fc25.s390x
dracut-config-rescue-044-78.fc25.s390x
sendmail-8.15.2-7.fc25.s390x
avahi-autoipd-0.6.32-4.fc25.s390x
teamd-1.26-1.fc25.s390x
kernel-devel-4.8.8-300.fc25.s390x
mozjs17-17.0.0-16.fc25.s390x
libselinux-2.5-13.fc25.s390x
libcrypt-nss-2.24-4.fc25.s390x
systemd-libs-231-12.fc25.s390x
libgo-6.3.1-1.fc25.s390x
libgo-devel-6.3.1-1.fc25.s390x
NetworkManager-libnm-1.4.4-3.fc25.s390x
cpp-6.3.1-1.fc25.s390x
rpm-plugin-selinux-4.13.0-6.fc25.s390x
pcre-utf32-8.40-1.fc25.s390x
packagedb-cli-2.14-1.fc25.noarch
python2-pyparsing-2.1.10-1.fc25.noarch
glibc-devel-2.24-4.fc25.s390x
libdrm-2.4.74-1.fc25.s390x
kernel-modules-4.9.3-200.fc25.s390x
cairo-gobject-1.14.8-1.fc25.s390x
bind99-license-9.9.9-4.P5.fc25.noarch
pyrpkg-1.47-5.fc25.noarch
emacs-25.1-3.fc25.s390x
firewalld-0.4.4.2-2.fc25.noarch
pyparsing-2.1.10-1.fc25.noarch
kernel-devel-4.9.3-200.fc25.s390x
libproxy-0.4.14-1.fc25.s390x
ethtool-4.8-1.fc25.s390x
python3-pyparsing-2.1.10-1.fc25.noarch
xorg-x11-proto-devel-7.7-20.fc25.noarch
brlapi-0.6.5-2.fc25.s390x
libcollection-0.7.0-29.fc25.s390x
librados-devel-10.2.4-2.fc25.s390x
libcephfs-devel-10.2.4-2.fc25.s390x
libXdamage-devel-1.1.4-8.fc24.s390x
libXinerama-devel-1.1.3-6.fc24.s390x
quota-4.03-7.fc25.s390x
texlive-texlive-common-doc-svn40682-30.fc25.noarch
texlive-metafont-bin-svn40987-30.20160520.fc25.s390x
texlive-ifluatex-svn41346-30.fc25.noarch
texlive-dvips-bin-svn40987-30.20160520.fc25.s390x
texlive-marvosym-svn29349.2.2a-30.fc25.noarch
texlive-graphics-cfg-svn40269-30.fc25.noarch
texlive-carlisle-svn18258.0-30.fc25.noarch
texlive-glyphlist-svn28576.0-30.fc25.noarch
texlive-tex-bin-svn40987-30.20160520.fc25.s390x
texlive-texlive-scripts-bin-svn29741.0-30.20160520.fc25.noarch
texlive-mathtools-svn38833-30.fc25.noarch
texlive-euro-svn22191.1.1-30.fc25.noarch
texlive-palatino-svn31835.0-30.fc25.noarch
texlive-anysize-svn15878.0-30.fc25.noarch
texlive-sansmath-svn17997.1.1-30.fc25.noarch
texlive-mfnfss-svn19410.0-30.fc25.noarch
texlive-mathpazo-svn15878.1.003-30.fc25.noarch
texlive-knuth-lib-svn35820.0-30.fc25.noarch
texlive-updmap-map-svn41159-30.fc25.noarch
texlive-beton-svn15878.0-30.fc25.noarch
texlive-xetexconfig-svn41133-30.fc25.noarch
texlive-trimspaces-svn15878.1.1-30.fc25.noarch
texlive-memoir-svn41203-30.fc25.noarch
texlive-latex-svn40218-30.fc25.noarch
texlive-lualatex-math-svn40621-30.fc25.noarch
texlive-pst-grad-svn15878.1.06-30.fc25.noarch
texlive-pst-tools-svn34067.0.05-30.fc25.noarch
texlive-amscls-svn36804.0-30.fc25.noarch
texlive-tex-gyre-svn18651.2.004-30.fc25.noarch
texlive-ltxmisc-svn21927.0-30.fc25.noarch
texlive-xetex-bin-svn41091-30.20160520.fc25.s390x
lua-posix-33.3.1-3.fc25.s390x
gssproxy-0.5.1-3.fc25.s390x
java-1.8.0-openjdk-1.8.0.111-5.b16.fc25.s390x
libverto-devel-0.2.6-6.fc24.s390x
mesa-libGLES-13.0.3-1.fc25.s390x
p11-kit-devel-0.23.2-2.fc24.s390x
snappy-1.1.3-2.fc24.s390x
gnutls-devel-3.5.8-1.fc25.s390x
cairo-gobject-devel-1.14.8-1.fc25.s390x
usbredir-devel-0.7.1-2.fc24.s390x
systemtap-3.1-0.20160725git91bfb36.fc25.s390x
bluez-libs-devel-5.43-1.fc25.s390x
libcurl-devel-7.51.0-4.fc25.s390x
cyrus-sasl-devel-2.1.26-26.2.fc24.s390x
python-libs-2.7.13-1.fc25.s390x
nss-sysinit-3.28.1-1.3.fc25.s390x
dnf-1.1.10-5.fc25.noarch
glusterfs-extra-xlators-3.9.1-1.fc25.s390x
perl-5.24.1-382.fc25.s390x
linux-firmware-20161205-69.git91ddce49.fc25.noarch
libX11-devel-1.6.4-4.fc25.s390x
kernel-devel-4.9.5-200.fc25.s390x
python-devel-2.7.13-1.fc25.s390x
kernel-headers-4.9.5-200.fc25.s390x
gpg-pubkey-efe550f5-5220ba41
python-async-0.6.1-9.fc22.s390x
gpg-pubkey-81b46521-55b3ca9a
dejavu-sans-mono-fonts-2.35-3.fc24.noarch
filesystem-3.2-37.fc24.s390x
popt-1.16-7.fc24.s390x
libffi-3.1-9.fc24.s390x
cyrus-sasl-lib-2.1.26-26.2.fc24.s390x
xz-5.2.2-2.fc24.s390x
keyutils-libs-1.5.9-8.fc24.s390x
libnfnetlink-1.0.1-8.fc24.s390x
libnetfilter_conntrack-1.0.4-6.fc24.s390x
libtheora-1.1.1-14.fc24.s390x
xml-common-0.6.3-44.fc24.noarch
autoconf-2.69-22.fc24.noarch
libpipeline-1.4.1-2.fc24.s390x
libXt-1.1.5-3.fc24.s390x
kbd-legacy-2.0.3-3.fc24.noarch
ghostscript-fonts-5.50-35.fc24.noarch
libcroco-0.6.11-2.fc24.s390x
pinentry-0.9.7-2.fc24.s390x
libXevie-1.0.3-11.fc24.s390x
pth-2.0.7-27.fc24.s390x
python2-rpm-macros-3-10.fc25.noarch
libsepol-2.5-10.fc25.s390x
libcap-2.25-2.fc25.s390x
sqlite-libs-3.14.2-1.fc25.s390x
mpfr-3.1.5-1.fc25.s390x
libxcb-1.12-1.fc25.s390x
libicu-57.1-4.fc25.s390x
perl-Carp-1.40-365.fc25.noarch
perl-IO-Socket-IP-0.38-1.fc25.noarch
libmnl-1.0.4-1.fc25.s390x
perl-Unicode-EastAsianWidth-1.33-8.fc25.noarch
perl-Getopt-Long-2.49.1-1.fc25.noarch
libwayland-cursor-1.12.0-1.fc25.s390x
coreutils-common-8.25-15.fc25.s390x
libmount-2.28.2-1.fc25.s390x
python2-decorator-4.0.10-3.fc25.noarch
avahi-glib-0.6.32-4.fc25.s390x
python3-pip-8.1.2-2.fc25.noarch
python3-libcomps-0.1.7-5.fc25.s390x
python-slip-0.6.4-4.fc25.noarch
python-krbV-1.0.90-12.fc25.s390x
python2-libcomps-0.1.7-5.fc25.s390x
python2-urllib3-1.15.1-3.fc25.noarch
fipscheck-1.4.1-11.fc25.s390x
gc-7.4.4-1.fc25.s390x
libndp-1.6-1.fc25.s390x
libsolv-0.6.24-1.fc25.s390x
gnupg2-2.1.13-2.fc25.s390x
geoclue2-2.4.4-1.fc25.s390x
s390utils-cmsfs-1.36.0-1.fc25.s390x
libXfixes-5.0.3-1.fc25.s390x
libXi-1.7.8-2.fc25.s390x
adwaita-icon-theme-3.22.0-1.fc25.noarch
dconf-0.26.0-1.fc25.s390x
ncurses-devel-6.0-6.20160709.fc25.s390x
newt-python-0.52.19-2.fc25.s390x
perl-Test-Harness-3.36-367.fc25.noarch
valgrind-3.12.0-1.fc25.s390x
dejagnu-1.6-1.fc25.noarch
audit-libs-2.7.1-1.fc25.s390x
libstdc++-devel-6.3.1-1.fc25.s390x
emacs-filesystem-25.1-3.fc25.noarch
libdb-utils-5.3.28-16.fc25.s390x
libidn2-0.11-1.fc25.s390x
python3-rpm-4.13.0-6.fc25.s390x
gnutls-3.5.8-1.fc25.s390x
python-beautifulsoup4-4.5.3-1.fc25.noarch
qt5-srpm-macros-5.7.1-1.fc25.noarch
elfutils-default-yama-scope-0.168-1.fc25.noarch
device-mapper-1.02.136-3.fc25.s390x
device-mapper-event-1.02.136-3.fc25.s390x
systemd-container-231-12.fc25.s390x
python3-distro-1.0.1-2.fc25.noarch
fedpkg-1.26-4.fc25.noarch
gstreamer1-plugins-base-1.10.2-1.fc25.s390x
subversion-1.9.5-1.fc25.s390x
perl-Module-CoreList-5.20170115-1.fc25.noarch
perl-Class-Inspector-1.31-2.fc25.noarch
libtool-ltdl-2.4.6-13.fc25.s390x
python2-sssdconfig-1.14.2-2.fc25.noarch
glib2-devel-2.50.2-1.fc25.s390x
poppler-0.45.0-2.fc25.s390x
libbasicobjects-0.1.1-29.fc25.s390x
libevent-2.0.22-1.fc25.s390x
libradosstriper1-10.2.4-2.fc25.s390x
atk-devel-2.22.0-1.fc25.s390x
libXxf86vm-devel-1.1.4-3.fc24.s390x
libev-4.24-1.fc25.s390x
gsm-1.0.16-1.fc25.s390x
libnfsidmap-0.27-0.fc25.s390x
zziplib-0.13.62-7.fc24.s390x
texlive-metafont-svn40793-30.fc25.noarch
texlive-booktabs-svn40846-30.fc25.noarch
texlive-dvips-svn41149-30.fc25.noarch
texlive-zapfding-svn31835.0-30.fc25.noarch
texlive-graphics-svn41015-30.fc25.noarch
texlive-latexconfig-svn40274-30.fc25.noarch
texlive-gsftopk-bin-svn40473-30.20160520.fc25.s390x
texlive-tex-svn40793-30.fc25.noarch
texlive-xdvi-bin-svn40750-30.20160520.fc25.s390x
texlive-qstest-svn15878.0-30.fc25.noarch
texlive-avantgar-svn31835.0-30.fc25.noarch
texlive-ncntrsbk-svn31835.0-30.fc25.noarch
texlive-cm-svn32865.0-30.fc25.noarch
texlive-rcs-svn15878.0-30.fc25.noarch
texlive-fix2col-svn38770-30.fc25.noarch
texlive-lm-math-svn36915.1.959-30.fc25.noarch
texlive-hyphen-base-svn41138-30.fc25.noarch
texlive-unicode-data-svn39808-30.fc25.noarch
texlive-luatex-svn40963-30.fc25.noarch
texlive-xetex-def-svn40327-30.fc25.noarch
texlive-varwidth-svn24104.0.92-30.fc25.noarch
texlive-l3kernel-svn41246-30.fc25.noarch
texlive-hyperref-svn41396-30.fc25.noarch
texlive-unicode-math-svn38462-30.fc25.noarch
texlive-fancyvrb-svn18492.2.8-30.fc25.noarch
texlive-pst-plot-svn41242-30.fc25.noarch
texlive-rotating-svn16832.2.16b-30.fc25.noarch
texlive-pdfpages-svn40638-30.fc25.noarch
texlive-ae-svn15878.1.4-30.fc25.noarch
libpaper-1.1.24-12.fc24.s390x
texlive-collection-latexrecommended-svn35765.0-30.20160520.fc25.noarch
libini_config-1.3.0-29.fc25.s390x
xorg-x11-fonts-Type1-7.5-16.fc24.noarch
pcre2-devel-10.22-8.fc25.s390x
gnutls-c++-3.5.8-1.fc25.s390x
systemtap-devel-3.1-0.20160725git91bfb36.fc25.s390x
libtasn1-devel-4.10-1.fc25.s390x
pango-devel-1.40.3-1.fc25.s390x
vte291-devel-0.46.1-1.fc25.s390x
snappy-devel-1.1.3-2.fc24.s390x
brlapi-devel-0.6.5-2.fc25.s390x
man-pages-4.06-3.fc25.noarch
libcap-ng-devel-0.7.8-1.fc25.s390x
glusterfs-3.9.1-1.fc25.s390x
nss-util-devel-3.28.1-1.0.fc25.s390x
dnf-conf-1.1.10-5.fc25.noarch
libxkbcommon-devel-0.7.1-1.fc25.s390x
perl-macros-5.24.1-382.fc25.s390x
rpcbind-0.2.4-2.fc25.s390x
pulseaudio-libs-10.0-2.fc25.s390x
kernel-4.9.5-200.fc25.s390x
libnl3-cli-3.2.29-2.fc25.s390x
tzdata-2016j-2.fc25.noarch
gpg-pubkey-34ec9cba-54e38751
gpg-pubkey-030d5aed-55b577f0
basesystem-11-2.fc24.noarch
libattr-2.4.47-16.fc24.s390x
libmpc-1.0.2-5.fc24.s390x
apr-util-1.5.4-3.fc24.s390x
rsync-3.1.2-2.fc24.s390x
libunistring-0.9.4-3.fc24.s390x
jbigkit-libs-2.1-5.fc24.s390x
pixman-0.34.0-2.fc24.s390x
acl-2.2.52-11.fc24.s390x
dwz-0.12-2.fc24.s390x
expect-5.45-22.fc24.s390x
libmodman-2.0.1-12.fc24.s390x
libsigsegv-2.10-10.fc24.s390x
libvisual-0.4.0-20.fc24.s390x
fakeroot-libs-1.20.2-4.fc24.s390x
m17n-lib-1.7.0-5.fc24.s390x
libpcap-1.7.4-2.fc24.s390x
libverto-0.2.6-6.fc24.s390x
lsscsi-0.28-3.fc24.s390x
setup-2.10.4-1.fc25.noarch
rpmconf-base-1.0.18-2.fc25.noarch
bash-4.3.43-4.fc25.s390x
expat-2.2.0-1.fc25.s390x
libxml2-2.9.3-4.fc25.s390x
libgpg-error-1.24-1.fc25.s390x
nspr-4.13.1-1.fc25.s390x
libgcrypt-1.6.6-1.fc25.s390x
file-libs-5.28-4.fc25.s390x
findutils-4.6.0-8.fc25.s390x
libjpeg-turbo-1.5.1-0.fc25.s390x
kmod-23-1.fc25.s390x
libassuan-2.4.3-1.fc25.s390x
libusbx-1.0.21-1.fc25.s390x
newt-0.52.19-2.fc25.s390x
libxslt-1.1.28-13.fc25.s390x
libmetalink-0.1.3-1.fc25.s390x
perl-Socket-2.024-1.fc25.s390x
perl-File-Path-2.12-365.fc25.noarch
perl-MIME-Base64-3.15-365.fc25.s390x
perl-HTTP-Tiny-0.070-1.fc25.noarch
ncurses-6.0-6.20160709.fc25.s390x
libwayland-server-1.12.0-1.fc25.s390x
ipset-6.29-1.fc25.s390x
perl-Text-Unidecode-1.27-3.fc25.noarch
perl-Fedora-VSP-0.001-4.fc25.noarch
perl-libintl-perl-1.26-1.fc25.s390x
plymouth-core-libs-0.9.3-0.6.20160620git0e65b86c.fc25.s390x
hunspell-1.4.1-1.fc25.s390x
which-2.21-1.fc25.s390x
coreutils-8.25-15.fc25.s390x
python2-setuptools-25.1.1-1.fc25.noarch
shadow-utils-4.2.1-11.fc25.s390x
atk-2.22.0-1.fc25.s390x
system-python-3.5.2-4.fc25.s390x
pam-1.3.0-1.fc25.s390x
python2-pyasn1-0.1.9-7.fc25.1.noarch
harfbuzz-icu-1.3.2-1.fc25.s390x
gsettings-desktop-schemas-3.22.0-1.fc25.s390x
libsecret-0.18.5-2.fc25.s390x
s390utils-iucvterm-1.36.0-1.fc25.s390x
python3-setuptools-25.1.1-1.fc25.noarch
python3-decorator-4.0.10-3.fc25.noarch
python3-slip-0.6.4-4.fc25.noarch
python3-magic-5.28-4.fc25.noarch
python3-requests-2.10.0-4.fc25.noarch
python3-systemd-232-1.fc25.s390x
pyusb-1.0.0-2.fc25.noarch
python-slip-dbus-0.6.4-4.fc25.noarch
python-enum34-1.0.4-6.fc25.noarch
python-lockfile-0.11.0-4.fc25.noarch
python2-ply-3.8-2.fc25.noarch
pyOpenSSL-16.0.0-2.fc25.noarch
python2-requests-2.10.0-4.fc25.noarch
pyxattr-0.5.3-8.fc25.s390x
libarchive-3.2.2-1.fc25.s390x
libkadm5-1.14.4-4.fc25.s390x
dtc-1.4.2-1.fc25.s390x
libbabeltrace-1.4.0-3.fc25.s390x
guile-2.0.13-1.fc25.s390x
libthai-0.1.25-1.fc25.s390x
libnghttp2-1.13.0-2.fc25.s390x
deltarpm-3.6-17.fc25.s390x
python-urlgrabber-3.10.1-9.fc25.noarch
iputils-20161105-1.fc25.s390x
s390utils-mon_statd-1.36.0-1.fc25.s390x
cryptsetup-libs-1.7.2-3.fc25.s390x
device-mapper-multipath-0.4.9-83.fc25.s390x
cronie-anacron-1.5.1-2.fc25.s390x
ghostscript-core-9.20-5.fc25.s390x
python3-pygpgme-0.3-18.fc25.s390x
rest-0.8.0-1.fc25.s390x
libreport-filesystem-2.8.0-1.fc25.s390x
libXtst-1.2.3-1.fc25.s390x
iso-codes-3.70-1.fc25.noarch
ghc-srpm-macros-1.4.2-4.fc25.noarch
adwaita-cursor-theme-3.22.0-1.fc25.noarch
rpmdevtools-8.9-1.fc25.noarch
kernel-4.8.8-300.fc25.s390x
python-dnf-plugins-extras-migrate-0.0.12-4.fc25.noarch
s390utils-1.36.0-1.fc25.s390x
authconfig-6.2.10-14.fc25.s390x
fedora-cert-0.6.0.1-1.fc25.noarch
glibc-2.24-4.fc25.s390x
elfutils-libelf-0.168-1.fc25.s390x
libstdc++-6.3.1-1.fc25.s390x
perl-Scalar-List-Utils-1.47-1.fc25.s390x
gdb-headless-7.12-36.fc25.s390x
bzip2-1.0.6-21.fc25.s390x
bind-license-9.10.4-4.P5.fc25.noarch
pcre-cpp-8.40-1.fc25.s390x
perl-threads-2.12-1.fc25.s390x
subversion-libs-1.9.5-1.fc25.s390x
libss-1.43.3-1.fc25.s390x
shared-mime-info-1.8-1.fc25.s390x
libselinux-utils-2.5-13.fc25.s390x
libgfortran-6.3.1-1.fc25.s390x
rpm-4.13.0-6.fc25.s390x
python2-rpm-4.13.0-6.fc25.s390x
policycoreutils-2.5-19.fc25.s390x
libtasn1-4.10-1.fc25.s390x
mesa-libwayland-egl-13.0.3-1.fc25.s390x
pigz-2.3.4-1.fc25.s390x
koji-1.11.0-1.fc25.noarch
python3-enchant-1.6.8-1.fc25.noarch
mariadb-common-10.1.20-1.fc25.s390x
firewalld-filesystem-0.4.4.2-2.fc25.noarch
systemd-231-12.fc25.s390x
device-mapper-libs-1.02.136-3.fc25.s390x
systemd-udev-231-12.fc25.s390x
dnf-plugin-system-upgrade-0.7.1-4.fc25.noarch
mesa-libEGL-13.0.3-1.fc25.s390x
dnsmasq-2.76-2.fc25.s390x
distribution-gpg-keys-1.9-1.fc25.noarch
bind-libs-lite-9.10.4-4.P5.fc25.s390x
mock-1.3.3-1.fc25.noarch
python2-dockerfile-parse-0.0.5-7.fc25.noarch
fedora-packager-0.6.0.1-1.fc25.noarch
openssl-1.0.2j-3.fc25.s390x
lvm2-2.02.167-3.fc25.s390x
systemd-bootchart-231-2.fc25.s390x
gcc-c++-6.3.1-1.fc25.s390x
texlive-base-2016-30.20160520.fc25.noarch
boost-system-1.60.0-10.fc25.s390x
pcre2-10.22-8.fc25.s390x
libpng-devel-1.6.27-1.fc25.s390x
perl-XML-Parser-2.44-5.fc25.s390x
libtirpc-1.0.1-3.rc3.fc25.s390x
lttng-ust-2.8.1-2.fc25.s390x
libasyncns-0.8-10.fc24.s390x
unbound-libs-1.5.10-1.fc25.s390x
libradosstriper-devel-10.2.4-2.fc25.s390x
systemtap-runtime-3.1-0.20160725git91bfb36.fc25.s390x
libXau-devel-1.0.8-6.fc24.s390x
libXfixes-devel-5.0.3-1.fc25.s390x
mesa-libEGL-devel-13.0.3-1.fc25.s390x
libXcomposite-devel-0.4.4-8.fc24.s390x
libverto-libev-0.2.6-6.fc24.s390x
texlive-kpathsea-doc-svn41139-30.fc25.noarch
flac-libs-1.3.2-1.fc25.s390x
quota-nls-4.03-7.fc25.noarch
python3-html5lib-0.999-9.fc25.noarch
python3-javapackages-4.7.0-6.1.fc25.noarch
perl-Digest-1.17-366.fc25.noarch
texlive-texlive.infra-svn41280-30.fc25.noarch
texlive-tetex-svn41059-30.fc25.noarch
texlive-amsfonts-svn29208.3.04-30.fc25.noarch
texlive-etex-pkg-svn39355-30.fc25.noarch
texlive-lm-svn28119.2.004-30.fc25.noarch
texlive-fp-svn15878.0-30.fc25.noarch
texlive-mptopdf-svn41282-30.fc25.noarch
texlive-euler-svn17261.2.5-30.fc25.noarch
texlive-setspace-svn24881.6.7a-30.fc25.noarch
texlive-tools-svn40934-30.fc25.noarch
texlive-colortbl-svn29803.v1.0a-30.fc25.noarch
texlive-natbib-svn20668.8.31b-30.fc25.noarch
texlive-bibtex-svn40768-30.fc25.noarch
texlive-gsftopk-svn40768-30.fc25.noarch
texlive-mfware-svn40768-30.fc25.noarch
texlive-tex-ini-files-svn40533-30.fc25.noarch
texlive-texconfig-bin-svn29741.0-30.20160520.fc25.noarch
libXmu-1.1.2-4.fc24.s390x
libXcursor-1.1.14-6.fc24.s390x
kbd-misc-2.0.3-3.fc24.noarch
libutempter-1.1.6-8.fc24.s390x
python-kitchen-1.2.4-2.fc24.noarch
polkit-libs-0.113-5.fc24.s390x
libgudev-230-3.fc24.s390x
popt-devel-1.16-7.fc24.s390x
make-4.1-5.fc24.s390x
fakeroot-1.20.2-4.fc24.s390x
blktrace-1.1.0-3.fc24.s390x
hicolor-icon-theme-0.15-3.fc24.noarch
usermode-1.111-8.fc24.s390x
kbd-2.0.3-3.fc24.s390x
libaio-devel-0.3.110-6.fc24.s390x
web-assets-filesystem-5-4.fc24.noarch
perl-IO-Socket-SSL-2.038-1.fc25.noarch
python-backports-ssl_match_hostname-3.5.0.1-3.fc25.noarch
mc-4.8.18-2.fc25.s390x
expat-devel-2.2.0-1.fc25.s390x
automake-1.15-7.fc25.noarch
perl-File-ShareDir-1.102-7.fc25.noarch
lua-5.3.3-3.fc25.s390x
tcl-8.6.6-1.fc25.s390x
gcc-objc-6.3.1-1.fc25.s390x
libselinux-devel-2.5-13.fc25.s390x
e2fsprogs-1.43.3-1.fc25.s390x
perl-Storable-2.56-367.fc25.s390x
libstdc++-static-6.3.1-1.fc25.s390x
perl-Time-Local-1.250-1.fc25.noarch
libwebp-0.5.2-1.fc25.s390x
xkeyboard-config-2.19-1.1.fc25.noarch
python-firewall-0.4.4.2-2.fc25.noarch
texlive-xdvi-svn40768-30.fc25.noarch
texlive-wasy2-ps-svn35830.0-30.fc25.noarch
texlive-ltabptch-svn17533.1.74d-30.fc25.noarch
texlive-sauerj-svn15878.0-30.fc25.noarch
texlive-bookman-svn31835.0-30.fc25.noarch
texlive-courier-svn35058.0-30.fc25.noarch
texlive-mflogo-font-svn36898.1.002-30.fc25.noarch
texlive-rsfs-svn15878.0-30.fc25.noarch
texlive-zapfchan-svn31835.0-30.fc25.noarch
texlive-cmap-svn41168-30.fc25.noarch
texlive-parskip-svn19963.2.0-30.fc25.noarch
texlive-sepnum-svn20186.2.0-30.fc25.noarch
texlive-fancyhdr-svn15878.3.1-30.fc25.noarch
texlive-pspicture-svn15878.0-30.fc25.noarch
texlive-fpl-svn15878.1.002-30.fc25.noarch
texlive-utopia-svn15878.0-30.fc25.noarch
texlive-hyph-utf8-svn41189-30.fc25.noarch
texlive-lua-alt-getopt-svn29349.0.7.0-30.fc25.noarch
texlive-texlive-msg-translations-svn41431-30.fc25.noarch
texlive-parallel-svn15878.0-30.fc25.noarch
texlive-luatex-bin-svn41091-30.20160520.fc25.s390x
texlive-lineno-svn21442.4.41-30.fc25.noarch
texlive-kastrup-svn15878.0-30.fc25.noarch
texlive-chngcntr-svn17157.1.0a-30.fc25.noarch
texlive-lualibs-svn40370-30.fc25.noarch
texlive-xunicode-svn30466.0.981-30.fc25.noarch
texlive-l3packages-svn41246-30.fc25.noarch
texlive-pgf-svn40966-30.fc25.noarch
texlive-koma-script-svn41508-30.fc25.noarch
texlive-currfile-svn40725-30.fc25.noarch
texlive-luaotfload-svn40902-30.fc25.noarch
texlive-ifplatform-svn21156.0.4-30.fc25.noarch
texlive-showexpl-svn32737.v0.3l-30.fc25.noarch
texlive-pst-3d-svn17257.1.10-30.fc25.noarch
texlive-pst-node-svn40743-30.fc25.noarch
texlive-pstricks-add-svn40744-30.fc25.noarch
texlive-pst-pdf-svn31660.1.1v-30.fc25.noarch
texlive-latex-bin-svn41438-30.fc25.noarch
texlive-powerdot-svn38984-30.fc25.noarch
texlive-sansmathaccent-svn30187.0-30.fc25.noarch
texlive-typehtml-svn17134.0-30.fc25.noarch
texlive-ucs-svn35853.2.2-30.fc25.noarch
teckit-2.5.1-15.fc24.s390x
texlive-dvipdfmx-svn41149-30.fc25.noarch
texlive-collection-latex-svn41011-30.20160520.fc25.noarch
netpbm-10.76.00-2.fc25.s390x
libpath_utils-0.2.1-29.fc25.s390x
nfs-utils-1.3.4-1.rc3.fc25.s390x
ttmkfdir-3.0.9-48.fc24.s390x
libcephfs_jni-devel-10.2.4-2.fc25.s390x
pcre2-utf16-10.22-8.fc25.s390x
keyutils-libs-devel-1.5.9-8.fc24.s390x
libicu-devel-57.1-4.fc25.s390x
attr-2.4.47-16.fc24.s390x
harfbuzz-devel-1.3.2-1.fc25.s390x
libidn-devel-1.33-1.fc25.s390x
usbredir-0.7.1-2.fc24.s390x
libnfs-1.9.8-2.fc24.s390x
SDL2-2.0.5-2.fc25.s390x
freetype-devel-2.6.5-1.fc25.s390x
cairo-devel-1.14.8-1.fc25.s390x
libepoxy-devel-1.3.1-3.fc25.s390x
libcacard-devel-2.5.2-2.fc24.s390x
lzo-devel-2.08-8.fc24.s390x
libssh2-devel-1.8.0-1.fc25.s390x
pcre-static-8.40-1.fc25.s390x
qemu-sanity-check-nodeps-1.1.5-5.fc24.s390x
libcap-devel-2.25-2.fc25.s390x
alsa-lib-devel-1.1.1-2.fc25.s390x
nss-util-3.28.1-1.0.fc25.s390x
glusterfs-client-xlators-3.9.1-1.fc25.s390x
nss-softokn-freebl-3.28.1-1.0.fc25.s390x
libnl3-3.2.29-2.fc25.s390x
python3-hawkey-0.6.3-6.1.fc25.s390x
git-core-doc-2.9.3-2.fc25.s390x
glusterfs-fuse-3.9.1-1.fc25.s390x
gdk-pixbuf2-devel-2.36.4-1.fc25.s390x
perl-Errno-1.25-382.fc25.s390x
git-2.9.3-2.fc25.s390x
glusterfs-server-3.9.1-1.fc25.s390x
kernel-modules-4.9.5-200.fc25.s390x
pulseaudio-libs-glib2-10.0-2.fc25.s390x
libpsl-0.17.0-1.fc25.s390x
glusterfs-api-devel-3.9.1-1.fc25.s390x
nss-devel-3.28.1-1.3.fc25.s390x
wpa_supplicant-2.6-1.fc25.s390x
xemacs-filesystem-21.5.34-19.20170114hgd0e8ec0fe015.fc25.noarch
opus-1.1.3-2.fc25.s390x
copy-jdk-configs-2.0-1.fc25.noarch
gpg-pubkey-a0a7badb-52844296
fontpackages-filesystem-1.44-17.fc24.noarch
readline-6.3-8.fc24.s390x
cpio-2.12-3.fc24.s390x
groff-base-1.22.3-8.fc24.s390x
ilmbase-2.2.0-5.fc24.s390x
p11-kit-trust-0.23.2-2.fc24.s390x
OpenEXR-libs-2.2.0-5.fc24.s390x
hesiod-3.2.1-6.fc24.s390x
sysfsutils-2.1.0-19.fc24.s390x
qrencode-libs-3.4.2-6.fc24.s390x
GeoIP-1.6.9-2.fc24.s390x
ocaml-srpm-macros-2-4.fc24.noarch
libXcomposite-0.4.4-8.fc24.s390x
procps-ng-3.3.10-11.fc24.s390x
GConf2-3.2.6-16.fc24.s390x
mailx-12.5-19.fc24.s390x
xz-devel-5.2.2-2.fc24.s390x
fedora-logos-22.0.0-3.fc24.s390x
telnet-0.17-65.fc24.s390x
gpg-pubkey-e372e838-56fd7943
fedora-repos-25-1.noarch
ncurses-libs-6.0-6.20160709.fc25.s390x
lua-libs-5.3.3-3.fc25.s390x
kmod-libs-23-1.fc25.s390x
libseccomp-2.3.1-1.fc25.s390x
perl-parent-0.236-1.fc25.noarch
libICE-1.0.9-5.fc25.s390x
ipset-libs-6.29-1.fc25.s390x
perl-TermReadKey-2.37-1.fc25.s390x
dhcp-libs-4.3.5-1.fc25.s390x
gmp-devel-6.1.1-1.fc25.s390x
ncurses-c++-libs-6.0-6.20160709.fc25.s390x
python-pip-8.1.2-2.fc25.noarch
gzip-1.8-1.fc25.s390x
harfbuzz-1.3.2-1.fc25.s390x
python2-iniparse-0.4-20.fc25.noarch
libfdisk-2.28.2-1.fc25.s390x
python3-iniparse-0.4-20.fc25.noarch
python3-gobject-base-3.22.0-1.fc25.s390x
python3-kickstart-2.32-1.fc25.noarch
python2-yubico-1.3.2-3.fc25.noarch
python-idna-2.0-4.fc25.noarch
nss-pem-1.0.2-2.fc25.s390x
perl-Net-SSLeay-1.78-1.fc25.s390x
krb5-workstation-1.14.4-4.fc25.s390x
libepoxy-1.3.1-3.fc25.s390x
drpm-0.3.0-3.fc25.s390x
libsmartcols-2.28.2-1.fc25.s390x
s390utils-ziomon-1.36.0-1.fc25.s390x
librepo-1.7.18-3.fc25.s390x
glib-networking-2.50.0-1.fc25.s390x
librsvg2-2.40.16-2.fc25.s390x
gnat-srpm-macros-4-1.fc25.noarch
webkitgtk3-2.4.11-3.fc25.s390x
libXaw-1.0.13-4.fc25.s390x
sudo-1.8.18p1-1.fc25.s390x
systemtap-sdt-devel-3.1-0.20160725git91bfb36.fc25.s390x
xorg-x11-font-utils-7.5-32.fc25.s390x
python-decoratortools-1.8-12.fc25.noarch
m17n-db-1.7.0-7.fc25.noarch
hardlink-1.1-1.fc25.s390x
glibc-common-2.24-4.fc25.s390x
libcom_err-1.43.3-1.fc25.s390x
grep-2.27-1.fc25.s390x
iproute-4.6.0-6.fc25.s390x
e2fsprogs-libs-1.43.3-1.fc25.s390x
curl-7.51.0-4.fc25.s390x
libvorbis-1.3.5-1.fc25.s390x
python2-dateutil-2.6.0-1.fc25.noarch
python3-firewall-0.4.4.2-2.fc25.noarch
libXpm-3.5.12-1.fc25.s390x
systemd-pam-231-12.fc25.s390x
mesa-libgbm-13.0.3-1.fc25.s390x
rpm-build-4.13.0-6.fc25.s390x
openssl-libs-1.0.2j-3.fc25.s390x
python2-smmap-2.0.1-1.fc25.noarch
bind99-libs-9.9.9-4.P5.fc25.s390x
kernel-4.9.3-200.fc25.s390x
gcc-gdb-plugin-6.3.1-1.fc25.s390x
selinux-policy-targeted-3.13.1-225.6.fc25.noarch
perl-Time-HiRes-1.9741-1.fc25.s390x
npth-1.3-1.fc25.s390x
poppler-data-0.4.7-6.fc25.noarch
nspr-devel-4.13.1-1.fc25.s390x
libcephfs1-10.2.4-2.fc25.s390x
wayland-devel-1.12.0-1.fc25.s390x
librbd1-10.2.4-2.fc25.s390x
libxcb-devel-1.12-1.fc25.s390x
mesa-libGL-devel-13.0.3-1.fc25.s390x
perl-encoding-2.19-5.fc25.s390x
libsndfile-1.0.27-1.fc25.s390x
python3-cssselect-0.9.2-1.fc25.noarch
perl-Digest-MD5-2.55-2.fc25.s390x
texlive-tetex-bin-svn36770.0-30.20160520.fc25.noarch
texlive-etoolbox-svn38031.2.2a-30.fc25.noarch
texlive-babel-svn40706-30.fc25.noarch
texlive-fancybox-svn18304.1.4-30.fc25.noarch
texlive-xkeyval-svn35741.2.7a-30.fc25.noarch
texlive-pdftex-def-svn22653.0.06d-30.fc25.noarch
texlive-makeindex-bin-svn40473-30.20160520.fc25.s390x
texlive-pdftex-bin-svn40987-30.20160520.fc25.s390x
texlive-pst-ovl-svn40873-30.fc25.noarch
texlive-crop-svn15878.1.5-30.fc25.noarch
texlive-manfnt-font-svn35799.0-30.fc25.noarch
texlive-txfonts-svn15878.0-30.fc25.noarch
texlive-ntgclass-svn15878.2.1a-30.fc25.noarch
texlive-dvisvgm-def-svn41011-30.fc25.noarch
texlive-ec-svn25033.1.0-30.fc25.noarch
texlive-etex-svn37057.0-30.fc25.noarch
texlive-texlive-en-svn41185-30.fc25.noarch
texlive-graphics-def-svn41879-30.fc25.noarch
texlive-iftex-svn29654.0.2-30.fc25.noarch
texlive-pst-math-svn34786.0.63-30.fc25.noarch
texlive-bera-svn20031.0-30.fc25.noarch
texlive-ms-svn29849.0-30.fc25.noarch
texlive-luaotfload-bin-svn34647.0-30.20160520.fc25.noarch
texlive-listings-svn37534.1.6-30.fc25.noarch
texlive-pst-fill-svn15878.1.01-30.fc25.noarch
texlive-pst-pdf-bin-svn7838.0-30.20160520.fc25.noarch
texlive-pst-slpe-svn24391.1.31-30.fc25.noarch
texlive-seminar-svn34011.1.62-30.fc25.noarch
texlive-l3experimental-svn41163-30.fc25.noarch
texlive-collection-fontsrecommended-svn35830.0-30.20160520.fc25.noarch
gettext-libs-0.19.8.1-3.fc25.s390x
java-1.8.0-openjdk-headless-1.8.0.111-5.b16.fc25.s390x
pcre2-utf32-10.22-8.fc25.s390x
at-spi2-atk-devel-2.22.0-1.fc25.s390x
wayland-protocols-devel-1.7-1.fc25.noarch
virglrenderer-0.5.0-1.20160411git61846f92f.fc25.s390x
libcacard-2.5.2-2.fc24.s390x
pixman-devel-0.34.0-2.fc24.s390x
libacl-devel-2.2.52-11.fc24.s390x
libnfs-devel-1.9.8-2.fc24.s390x
texi2html-5.0-4.fc24.noarch
libseccomp-devel-2.3.1-1.fc25.s390x
perl-libs-5.24.1-382.fc25.s390x
libxkbcommon-0.7.1-1.fc25.s390x
git-core-2.9.3-2.fc25.s390x
nss-softokn-freebl-devel-3.28.1-1.0.fc25.s390x
gtk-update-icon-cache-3.22.7-1.fc25.s390x
vim-filesystem-8.0.206-1.fc25.s390x
libX11-common-1.6.4-4.fc25.noarch
gtk3-devel-3.22.7-1.fc25.s390x
python2-dnf-1.1.10-5.fc25.noarch
vim-minimal-8.0.206-1.fc25.s390x
GeoIP-GeoLite-data-2017.01-1.fc25.noarch
gpg-pubkey-95a43f54-5284415a
dejavu-fonts-common-2.35-3.fc24.noarch
libSM-1.2.2-4.fc24.s390x
diffutils-3.3-13.fc24.s390x
libogg-1.3.2-5.fc24.s390x
hunspell-en-US-0.20140811.1-5.fc24.noarch
libdaemon-0.14-10.fc24.s390x
patch-2.7.5-3.fc24.s390x
libsysfs-2.1.0-19.fc24.s390x
procmail-3.22-39.fc24.s390x
libXdamage-1.1.4-8.fc24.s390x
libotf-0.9.13-7.fc24.s390x
urw-fonts-2.4-22.fc24.noarch
crontabs-1.11-12.20150630git.fc24.noarch
ppp-2.4.7-9.fc24.s390x
polkit-0.113-5.fc24.s390x
cyrus-sasl-2.1.26-26.2.fc24.s390x
zlib-devel-1.2.8-10.fc24.s390x
time-1.7-49.fc24.s390x
gpg-pubkey-fdb19c98-56fd6333
fedora-release-25-1.noarch
freetype-2.6.5-1.fc25.s390x
libcap-ng-0.7.8-1.fc25.s390x
gdbm-1.12-1.fc25.s390x
binutils-2.26.1-1.fc25.s390x
lcms2-2.8-2.fc25.s390x
libcomps-0.1.7-5.fc25.s390x
less-481-6.fc25.s390x
apr-1.5.2-4.fc25.s390x
perl-constant-1.33-367.fc25.noarch
perl-Data-Dumper-2.161-1.fc25.s390x
ipcalc-0.1.8-1.fc25.s390x
perl-Pod-Perldoc-3.27-1.fc25.noarch
libteam-1.26-1.fc25.s390x
gmp-c++-6.1.1-1.fc25.s390x
fontconfig-2.12.1-1.fc25.s390x
enchant-1.6.0-14.fc25.s390x
json-glib-1.2.2-1.fc25.s390x
pyliblzma-0.5.3-16.fc25.s390x
libsepol-devel-2.5-10.fc25.s390x
python3-libs-3.5.2-4.fc25.s390x
python3-ordered-set-2.0.0-4.fc25.noarch
python3-rpmconf-1.0.18-2.fc25.noarch
python-ipaddress-1.0.16-3.fc25.noarch
python2-kerberos-1.2.5-1.fc25.s390x
python2-pysocks-1.5.6-5.fc25.noarch
fipscheck-lib-1.4.1-11.fc25.s390x
libatomic_ops-7.4.4-1.fc25.s390x
net-snmp-agent-libs-5.7.3-13.fc25.s390x
util-linux-2.28.2-1.fc25.s390x
dracut-044-78.fc25.s390x
python2-pygpgme-0.3-18.fc25.s390x
libsoup-2.56.0-2.fc25.s390x
orc-0.4.26-1.fc25.s390x
yum-utils-1.1.31-511.fc25.noarch
libXrender-0.9.10-1.fc25.s390x
libXrandr-1.5.1-1.fc25.s390x
go-srpm-macros-2-7.fc25.noarch
gnupg2-smime-2.1.13-2.fc25.s390x
guile-devel-2.0.13-1.fc25.s390x
uboot-tools-2016.09.01-2.fc25.s390x
pykickstart-2.32-1.fc25.noarch
python-bunch-1.0.1-9.fc25.noarch
perl-generators-1.10-1.fc25.noarch
perl-Mozilla-CA-20160104-3.fc25.noarch
glibc-all-langpacks-2.24-4.fc25.s390x
bzip2-libs-1.0.6-21.fc25.s390x
libpng-1.6.27-1.fc25.s390x
libtiff-4.0.7-1.fc25.s390x
desktop-file-utils-0.23-2.fc25.s390x
python2-cccolutils-1.4-1.fc25.s390x
libcurl-7.51.0-4.fc25.s390x
rpm-plugin-systemd-inhibit-4.13.0-6.fc25.s390x
cups-libs-2.2.0-5.fc25.s390x
python2-lxml-3.7.2-1.fc25.s390x
redhat-rpm-config-45-1.fc25.noarch
elfutils-libs-0.168-1.fc25.s390x
device-mapper-event-libs-1.02.136-3.fc25.s390x
lvm2-libs-2.02.167-3.fc25.s390x
elfutils-0.168-1.fc25.s390x
openssh-7.4p1-1.fc25.s390x
python2-gitdb-2.0.0-1.fc25.noarch
openssh-server-7.4p1-1.fc25.s390x
gcc-gfortran-6.3.1-1.fc25.s390x
rpm-devel-4.13.0-6.fc25.s390x
libselinux-python-2.5-13.fc25.s390x
openjpeg2-2.1.2-3.fc25.s390x
js-jquery-2.2.4-1.fc25.noarch
boost-thread-1.60.0-10.fc25.s390x
json-c-0.12-7.fc24.s390x
ghostscript-x11-9.20-5.fc25.s390x
libdrm-devel-2.4.74-1.fc25.s390x
libuuid-devel-2.28.2-1.fc25.s390x
librbd-devel-10.2.4-2.fc25.s390x
libXcursor-devel-1.1.14-6.fc24.s390x
python3-beautifulsoup4-4.5.3-1.fc25.noarch
texlive-kpathsea-svn41139-30.fc25.noarch
texlive-amsmath-svn41561-30.fc25.noarch
texlive-thumbpdf-svn34621.3.16-30.fc25.noarch
texlive-multido-svn18302.1.42-30.fc25.noarch
texlive-float-svn15878.1.3d-30.fc25.noarch
texlive-psnfss-svn33946.9.2a-30.fc25.noarch
texlive-wasy-svn35831.0-30.fc25.noarch
texlive-makeindex-svn40768-30.fc25.noarch
texlive-pdftex-svn41149-30.fc25.noarch
texlive-enumitem-svn24146.3.5.2-30.fc25.noarch
texlive-microtype-svn41127-30.fc25.noarch
texlive-helvetic-svn31835.0-30.fc25.noarch
texlive-times-svn35058.0-30.fc25.noarch
texlive-mdwtools-svn15878.1.05.4-30.fc25.noarch
texlive-babel-english-svn30264.3.3p-30.fc25.noarch
texlive-cmextra-svn32831.0-30.fc25.noarch
texlive-enctex-svn34957.0-30.fc25.noarch
texlive-texlive-docindex-svn41430-30.fc25.noarch
texlive-ifetex-svn24853.1.2-30.fc25.noarch
texlive-mparhack-svn15878.1.4-30.fc25.noarch
texlive-paralist-svn39247-30.fc25.noarch
texlive-algorithms-svn38085.0.1-30.fc25.noarch
texlive-geometry-svn19716.5.6-30.fc25.noarch
texlive-fontspec-svn41262-30.fc25.noarch
texlive-oberdiek-svn41346-30.fc25.noarch
texlive-pst-eps-svn15878.1.0-30.fc25.noarch
texlive-pstricks-svn41321-30.fc25.noarch
texlive-pst-blur-svn15878.2.0-30.fc25.noarch
texlive-jknapltx-svn19440.0-30.fc25.noarch
texlive-breqn-svn38099.0.98d-30.fc25.noarch
texlive-collection-basic-svn41149-30.20160520.fc25.noarch
latex2html-2012-7.fc24.noarch
lksctp-tools-1.0.16-5.fc24.s390x
vte291-0.46.1-1.fc25.s390x
openssl-devel-1.0.2j-3.fc25.s390x
at-spi2-core-devel-2.22.0-1.fc25.s390x
libfdt-1.4.2-1.fc25.s390x
libXft-devel-2.3.2-4.fc24.s390x
libattr-devel-2.4.47-16.fc24.s390x
libiscsi-devel-1.15.0-2.fc24.s390x
gettext-0.19.8.1-3.fc25.s390x
libjpeg-turbo-devel-1.5.1-0.fc25.s390x
glusterfs-libs-3.9.1-1.fc25.s390x
glusterfs-api-3.9.1-1.fc25.s390x
hawkey-0.6.3-6.1.fc25.s390x
nss-softokn-devel-3.28.1-1.0.fc25.s390x
glusterfs-cli-3.9.1-1.fc25.s390x
vim-common-8.0.206-1.fc25.s390x
libX11-1.6.4-4.fc25.s390x
pulseaudio-libs-devel-10.0-2.fc25.s390x
dnf-yum-1.1.10-5.fc25.noarch
tzdata-java-2016j-2.fc25.noarch
ccache-3.3.3-1.fc25.s390x
gpg-pubkey-8e1431d5-53bcbac7
zlib-1.2.8-10.fc24.s390x
sed-4.2.2-15.fc24.s390x
p11-kit-0.23.2-2.fc24.s390x
psmisc-22.21-8.fc24.s390x
gpm-libs-1.20.7-9.fc24.s390x
zip-3.0-16.fc24.s390x
hostname-3.15-7.fc24.s390x
libyubikey-1.13-2.fc24.s390x
sg3_utils-libs-1.41-3.fc24.s390x
polkit-pkla-compat-0.1-7.fc24.s390x
passwd-0.79-8.fc24.s390x
trousers-0.3.13-6.fc24.s390x
grubby-8.40-3.fc24.s390x
rootfiles-8.1-19.fc24.noarch
python-rpm-macros-3-10.fc25.noarch
info-6.1-3.fc25.s390x
libuuid-2.28.2-1.fc25.s390x
iptables-libs-1.6.0-2.fc25.s390x
nettle-3.3-1.fc25.s390x
jansson-2.9-1.fc25.s390x
libksba-1.3.5-1.fc25.s390x
perl-Text-ParseWords-3.30-365.fc25.noarch
perl-PathTools-3.63-366.fc25.s390x
perl-File-Temp-0.23.04-365.fc25.noarch
fuse-libs-2.9.7-1.fc25.s390x
perl-Pod-Escapes-1.07-365.fc25.noarch
perl-Term-ANSIColor-4.05-2.fc25.noarch
perl-URI-1.71-5.fc25.noarch
libXfont-1.5.2-1.fc25.s390x
crypto-policies-20160921-2.git75b9b04.fc25.noarch
python-six-1.10.0-3.fc25.noarch
dbus-glib-0.108-1.fc25.s390x
gobject-introspection-1.50.0-1.fc25.s390x
libpwquality-1.3.0-6.fc25.s390x
python-gobject-base-3.22.0-1.fc25.s390x
python-html5lib-0.999-9.fc25.noarch
python3-dbus-1.2.4-2.fc25.s390x
python3-chardet-2.3.0-1.fc25.noarch
python3-urllib3-1.15.1-3.fc25.noarch
python-offtrac-0.1.0-7.fc25.noarch
python2-cryptography-1.5.3-3.fc25.s390x
python2-requests-kerberos-0.10.0-2.fc25.noarch
libserf-1.3.9-1.fc25.s390x
libdatrie-0.2.9-3.fc25.s390x
s390utils-base-1.36.0-1.fc25.s390x
kpartx-0.4.9-83.fc25.s390x
s390utils-cpuplugd-1.36.0-1.fc25.s390x
rpmconf-1.0.18-2.fc25.noarch
s390utils-osasnmpd-1.36.0-1.fc25.s390x
python-dnf-plugins-extras-common-0.0.12-4.fc25.noarch
pango-1.40.3-1.fc25.s390x
fpc-srpm-macros-1.0-1.fc25.noarch
kernel-core-4.8.8-300.fc25.s390x
fedora-upgrade-25.2-1.fc25.noarch
net-tools-2.0-0.38.20160329git.fc25.s390x
libuser-0.62-4.fc25.s390x
screen-4.4.0-4.fc25.s390x
man-db-2.7.5-3.fc25.s390x
sqlite-3.14.2-1.fc25.s390x
python-systemd-doc-232-1.fc25.s390x
pcre-8.40-1.fc25.s390x
libdb-5.3.28-16.fc25.s390x
lz4-1.7.5-1.fc25.s390x
tar-1.29-3.fc25.s390x
emacs-common-25.1-3.fc25.s390x
perl-threads-shared-1.54-1.fc25.s390x
unzip-6.0-31.fc25.s390x
mesa-libglapi-13.0.3-1.fc25.s390x
rpm-libs-4.13.0-6.fc25.s390x
selinux-policy-3.13.1-225.6.fc25.noarch
pcre-utf16-8.40-1.fc25.s390x
bodhi-client-0.9.12.2-6.fc25.noarch
rpmlint-1.9-5.fc25.noarch
glibc-headers-2.24-4.fc25.s390x
dbus-1.11.8-1.fc25.s390x
kernel-core-4.9.3-200.fc25.s390x
cairo-1.14.8-1.fc25.s390x
ca-certificates-2017.2.11-1.0.fc25.noarch
openssh-clients-7.4p1-1.fc25.s390x
python2-GitPython-2.1.1-2.fc25.noarch
mariadb-libs-10.1.20-1.fc25.s390x
NetworkManager-glib-1.4.4-3.fc25.s390x
gcc-go-6.3.1-1.fc25.s390x
cracklib-dicts-2.9.6-4.fc25.s390x
iproute-tc-4.6.0-6.fc25.s390x
libselinux-python3-2.5-13.fc25.s390x
strace-4.15-1.fc25.s390x
python2-enchant-1.6.8-1.fc25.noarch
boost-iostreams-1.60.0-10.fc25.s390x
bluez-libs-5.43-1.fc25.s390x
ghostscript-9.20-5.fc25.s390x
userspace-rcu-0.9.2-2.fc25.s390x
mesa-libwayland-egl-devel-13.0.3-1.fc25.s390x
libXext-devel-1.3.3-4.fc24.s390x
libXrandr-devel-1.5.1-1.fc25.s390x
perl-XML-XPath-1.39-1.fc25.noarch
python3-lxml-3.7.2-1.fc25.s390x
texlive-texlive.infra-bin-svn40312-30.20160520.fc25.s390x
texlive-ifxetex-svn19685.0.5-30.fc25.noarch
texlive-thumbpdf-bin-svn6898.0-30.20160520.fc25.noarch
texlive-babelbib-svn25245.1.31-30.fc25.noarch
texlive-index-svn24099.4.1beta-30.fc25.noarch
texlive-caption-svn41409-30.fc25.noarch
texlive-bibtex-bin-svn40473-30.20160520.fc25.s390x
texlive-mfware-bin-svn40473-30.20160520.fc25.s390x
texlive-texconfig-svn40768-30.fc25.noarch
texlive-footmisc-svn23330.5.5b-30.fc25.noarch
texlive-psfrag-svn15878.3.04-30.fc25.noarch
texlive-eurosym-svn17265.1.4_subrfix-30.fc25.noarch
texlive-symbol-svn31835.0-30.fc25.noarch
texlive-euenc-svn19795.0.1h-30.fc25.noarch
texlive-textcase-svn15878.0-30.fc25.noarch
texlive-charter-svn15878.0-30.fc25.noarch
texlive-wasysym-svn15878.2.0-30.fc25.noarch
texlive-mflogo-svn38628-30.fc25.noarch
texlive-soul-svn15878.2.4-30.fc25.noarch
texlive-marginnote-svn41382-30.fc25.noarch
texlive-filecontents-svn24250.1.3-30.fc25.noarch
texlive-tipa-svn29349.1.3-30.fc25.noarch
texlive-xcolor-svn41044-30.fc25.noarch
texlive-breakurl-svn29901.1.40-30.fc25.noarch
texlive-attachfile-svn38830-30.fc25.noarch
texlive-pst-coil-svn37377.1.07-30.fc25.noarch
texlive-auto-pst-pdf-svn23723.0.6-30.fc25.noarch
texlive-ctable-svn38672-30.fc25.noarch
texlive-extsizes-svn17263.1.4a-30.fc25.noarch
texlive-beamer-svn36461.3.36-30.fc25.noarch
texlive-dvipdfmx-bin-svn40273-30.20160520.fc25.s390x
netpbm-progs-10.76.00-2.fc25.s390x
vte-profile-0.46.1-1.fc25.s390x
krb5-devel-1.14.4-4.fc25.s390x
dbus-devel-1.11.8-1.fc25.s390x
sqlite-devel-3.14.2-1.fc25.s390x
libiscsi-1.15.0-2.fc24.s390x
fontconfig-devel-2.12.1-1.fc25.s390x
libfdt-devel-1.4.2-1.fc25.s390x
ceph-devel-compat-10.2.4-2.fc25.s390x
zlib-static-1.2.8-10.fc24.s390x
chrpath-0.16-3.fc24.s390x
python-2.7.13-1.fc25.s390x
nss-3.28.1-1.3.fc25.s390x
python2-hawkey-0.6.3-6.1.fc25.s390x
gdk-pixbuf2-modules-2.36.4-1.fc25.s390x
perl-Git-2.9.3-2.fc25.noarch
kernel-core-4.9.5-200.fc25.s390x
publicsuffix-list-dafsa-20170116-1.fc25.noarch
perl-SelfLoader-1.23-382.fc25.noarch
perl-open-1.10-382.fc25.noarch
gpgme-1.8.0-8.fc25.s390x
=== TEST BEGIN ===
Using CC: /home/fam/bin/cc
Install prefix /var/tmp/patchew-tester-tmp-_t3ms3un/src/install
BIOS directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/share/qemu
binary directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/bin
library directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/lib
module directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/lib/qemu
libexec directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/libexec
include directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/include
config directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/etc
local state directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/var
Manual directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/share/man
ELF interp prefix /usr/gnemul/qemu-%M
Source path /var/tmp/patchew-tester-tmp-_t3ms3un/src
C compiler /home/fam/bin/cc
Host C compiler cc
C++ compiler c++
Objective-C compiler /home/fam/bin/cc
ARFLAGS rv
CFLAGS -O2 -U_FORTIFY_SOURCE -D_FORTIFY_SOURCE=2 -g
QEMU_CFLAGS -I/usr/include/pixman-1 -Werror -DHAS_LIBSSH2_SFTP_FSYNC -pthread -I/usr/include/glib-2.0 -I/usr/lib64/glib-2.0/include -D_GNU_SOURCE -m64 -D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE -Wstrict-prototypes -Wredundant-decls -Wall -Wundef -Wwrite-strings -Wmissing-prototypes -fno-strict-aliasing -fno-common -fwrapv -Wendif-labels -Wno-shift-negative-value -Wno-missing-include-dirs -Wempty-body -Wnested-externs -Wformat-security -Wformat-y2k -Winit-self -Wignored-qualifiers -Wold-style-declaration -Wold-style-definition -Wtype-limits -fstack-protector-strong -I/usr/include/p11-kit-1 -I/usr/include/libpng16 -I/usr/include/cacard -I/usr/include/nss3 -I/usr/include/nspr4 -I/usr/include/glib-2.0 -I/usr/lib64/glib-2.0/include -I/usr/include/libusb-1.0
LDFLAGS -Wl,--warn-common -m64 -g
make make
install install
python python -B
smbd /usr/sbin/smbd
module support no
host CPU s390x
host big endian yes
target list aarch64-softmmu alpha-softmmu arm-softmmu cris-softmmu i386-softmmu lm32-softmmu m68k-softmmu microblazeel-softmmu microblaze-softmmu mips64el-softmmu mips64-softmmu mipsel-softmmu mips-softmmu moxie-softmmu nios2-softmmu or1k-softmmu ppc64-softmmu ppcemb-softmmu ppc-softmmu s390x-softmmu sh4eb-softmmu sh4-softmmu sparc64-softmmu sparc-softmmu tricore-softmmu unicore32-softmmu x86_64-softmmu xtensaeb-softmmu xtensa-softmmu aarch64-linux-user alpha-linux-user armeb-linux-user arm-linux-user cris-linux-user hppa-linux-user i386-linux-user m68k-linux-user microblazeel-linux-user microblaze-linux-user mips64el-linux-user mips64-linux-user mipsel-linux-user mips-linux-user mipsn32el-linux-user mipsn32-linux-user nios2-linux-user or1k-linux-user ppc64abi32-linux-user ppc64le-linux-user ppc64-linux-user ppc-linux-user s390x-linux-user sh4eb-linux-user sh4-linux-user sparc32plus-linux-user sparc64-linux-user sparc-linux-user tilegx-linux-user x86_64-linux-user
tcg debug enabled no
gprof enabled no
sparse enabled no
strip binaries yes
profiler no
static build no
pixman system
SDL support yes (2.0.5)
GTK support yes (3.22.7)
GTK GL support yes
VTE support yes (0.46.1)
TLS priority NORMAL
GNUTLS support yes
GNUTLS rnd yes
libgcrypt no
libgcrypt kdf no
nettle yes (3.3)
nettle kdf yes
libtasn1 yes
curses support yes
virgl support yes
curl support yes
mingw32 support no
Audio drivers oss
Block whitelist (rw)
Block whitelist (ro)
VirtFS support yes
VNC support yes
VNC SASL support yes
VNC JPEG support yes
VNC PNG support yes
xen support no
brlapi support yes
bluez support yes
Documentation yes
PIE no
vde support no
netmap support no
Linux AIO support yes
ATTR/XATTR support yes
Install blobs yes
KVM support yes
HAX support no
RDMA support no
TCG interpreter no
fdt support yes
preadv support yes
fdatasync yes
madvise yes
posix_madvise yes
libcap-ng support yes
vhost-net support yes
vhost-scsi support yes
vhost-vsock support yes
Trace backends log
spice support no
rbd support yes
xfsctl support no
smartcard support yes
libusb yes
usb net redir yes
OpenGL support yes
OpenGL dmabufs yes
libiscsi support yes
libnfs support yes
build guest agent yes
QGA VSS support no
QGA w32 disk info no
QGA MSI support no
seccomp support no
coroutine backend ucontext
coroutine pool yes
debug stack usage no
GlusterFS support yes
Archipelago support no
gcov gcov
gcov enabled no
TPM support yes
libssh2 support yes
TPM passthrough no
QOM debugging yes
lzo support yes
snappy support yes
bzip2 support yes
NUMA host support no
tcmalloc support no
jemalloc support no
avx2 optimization no
replication support yes
GEN aarch64-softmmu/config-devices.mak.tmp
GEN arm-softmmu/config-devices.mak.tmp
GEN alpha-softmmu/config-devices.mak.tmp
GEN cris-softmmu/config-devices.mak.tmp
GEN cris-softmmu/config-devices.mak
GEN i386-softmmu/config-devices.mak.tmp
GEN alpha-softmmu/config-devices.mak
GEN lm32-softmmu/config-devices.mak.tmp
GEN aarch64-softmmu/config-devices.mak
GEN m68k-softmmu/config-devices.mak.tmp
GEN arm-softmmu/config-devices.mak
GEN microblazeel-softmmu/config-devices.mak.tmp
GEN lm32-softmmu/config-devices.mak
GEN microblaze-softmmu/config-devices.mak.tmp
GEN i386-softmmu/config-devices.mak
GEN m68k-softmmu/config-devices.mak
GEN mips64el-softmmu/config-devices.mak.tmp
GEN microblazeel-softmmu/config-devices.mak
GEN microblaze-softmmu/config-devices.mak
GEN mips64-softmmu/config-devices.mak.tmp
GEN mips-softmmu/config-devices.mak.tmp
GEN mipsel-softmmu/config-devices.mak.tmp
GEN mips64el-softmmu/config-devices.mak
GEN moxie-softmmu/config-devices.mak.tmp
GEN mips-softmmu/config-devices.mak
GEN mipsel-softmmu/config-devices.mak
GEN mips64-softmmu/config-devices.mak
GEN nios2-softmmu/config-devices.mak.tmp
GEN or1k-softmmu/config-devices.mak.tmp
GEN ppc64-softmmu/config-devices.mak.tmp
GEN moxie-softmmu/config-devices.mak
GEN ppcemb-softmmu/config-devices.mak.tmp
GEN nios2-softmmu/config-devices.mak
GEN ppc-softmmu/config-devices.mak.tmp
GEN or1k-softmmu/config-devices.mak
GEN s390x-softmmu/config-devices.mak.tmp
GEN ppc64-softmmu/config-devices.mak
GEN ppcemb-softmmu/config-devices.mak
GEN sh4eb-softmmu/config-devices.mak.tmp
GEN s390x-softmmu/config-devices.mak
GEN sparc64-softmmu/config-devices.mak.tmp
GEN sh4-softmmu/config-devices.mak.tmp
GEN ppc-softmmu/config-devices.mak
GEN sh4eb-softmmu/config-devices.mak
GEN sparc-softmmu/config-devices.mak.tmp
GEN tricore-softmmu/config-devices.mak.tmp
GEN tricore-softmmu/config-devices.mak
GEN unicore32-softmmu/config-devices.mak.tmp
GEN sh4-softmmu/config-devices.mak
GEN sparc-softmmu/config-devices.mak
GEN sparc64-softmmu/config-devices.mak
GEN x86_64-softmmu/config-devices.mak.tmp
GEN unicore32-softmmu/config-devices.mak
GEN xtensa-softmmu/config-devices.mak.tmp
GEN aarch64-linux-user/config-devices.mak.tmp
GEN xtensaeb-softmmu/config-devices.mak.tmp
GEN aarch64-linux-user/config-devices.mak
GEN xtensa-softmmu/config-devices.mak
GEN alpha-linux-user/config-devices.mak.tmp
GEN armeb-linux-user/config-devices.mak.tmp
GEN xtensaeb-softmmu/config-devices.mak
GEN arm-linux-user/config-devices.mak.tmp
GEN alpha-linux-user/config-devices.mak
GEN cris-linux-user/config-devices.mak.tmp
GEN x86_64-softmmu/config-devices.mak
GEN armeb-linux-user/config-devices.mak
GEN hppa-linux-user/config-devices.mak.tmp
GEN i386-linux-user/config-devices.mak.tmp
GEN cris-linux-user/config-devices.mak
GEN hppa-linux-user/config-devices.mak
GEN arm-linux-user/config-devices.mak
GEN m68k-linux-user/config-devices.mak.tmp
GEN microblazeel-linux-user/config-devices.mak.tmp
GEN microblaze-linux-user/config-devices.mak.tmp
GEN i386-linux-user/config-devices.mak
GEN mips64el-linux-user/config-devices.mak.tmp
GEN m68k-linux-user/config-devices.mak
GEN mips64-linux-user/config-devices.mak.tmp
GEN microblaze-linux-user/config-devices.mak
GEN microblazeel-linux-user/config-devices.mak
GEN mips64el-linux-user/config-devices.mak
GEN mipsel-linux-user/config-devices.mak.tmp
GEN mips64-linux-user/config-devices.mak
GEN mips-linux-user/config-devices.mak.tmp
GEN mipsn32el-linux-user/config-devices.mak.tmp
GEN mipsn32-linux-user/config-devices.mak.tmp
GEN mipsel-linux-user/config-devices.mak
GEN nios2-linux-user/config-devices.mak.tmp
GEN mips-linux-user/config-devices.mak
GEN mipsn32el-linux-user/config-devices.mak
GEN or1k-linux-user/config-devices.mak.tmp
GEN mipsn32-linux-user/config-devices.mak
GEN ppc64abi32-linux-user/config-devices.mak.tmp
GEN nios2-linux-user/config-devices.mak
GEN ppc64le-linux-user/config-devices.mak.tmp
GEN ppc64-linux-user/config-devices.mak.tmp
GEN ppc64le-linux-user/config-devices.mak
GEN ppc64abi32-linux-user/config-devices.mak
GEN or1k-linux-user/config-devices.mak
GEN ppc-linux-user/config-devices.mak.tmp
GEN s390x-linux-user/config-devices.mak.tmp
GEN sh4eb-linux-user/config-devices.mak.tmp
GEN ppc64-linux-user/config-devices.mak
GEN sh4-linux-user/config-devices.mak.tmp
GEN s390x-linux-user/config-devices.mak
GEN sparc32plus-linux-user/config-devices.mak.tmp
GEN sh4eb-linux-user/config-devices.mak
GEN ppc-linux-user/config-devices.mak
GEN sparc64-linux-user/config-devices.mak.tmp
GEN sparc-linux-user/config-devices.mak.tmp
GEN sh4-linux-user/config-devices.mak
GEN sparc32plus-linux-user/config-devices.mak
GEN x86_64-linux-user/config-devices.mak.tmp
GEN sparc-linux-user/config-devices.mak
GEN tilegx-linux-user/config-devices.mak.tmp
GEN sparc64-linux-user/config-devices.mak
GEN config-host.h
GEN x86_64-linux-user/config-devices.mak
GEN qemu-options.def
GEN tilegx-linux-user/config-devices.mak
GEN qmp-commands.h
GEN qapi-types.h
GEN qapi-visit.h
GEN qapi-event.h
GEN qmp-introspect.h
GEN trace/generated-tcg-tracers.h
GEN trace/generated-helpers-wrappers.h
GEN trace/generated-helpers.h
GEN module_block.h
GEN tests/test-qapi-types.h
GEN tests/test-qapi-visit.h
GEN tests/test-qmp-commands.h
GEN tests/test-qapi-event.h
GEN tests/test-qmp-introspect.h
GEN trace-root.h
GEN util/trace.h
GEN crypto/trace.h
GEN io/trace.h
GEN migration/trace.h
GEN block/trace.h
GEN backends/trace.h
GEN hw/block/trace.h
GEN hw/block/dataplane/trace.h
GEN hw/char/trace.h
GEN hw/intc/trace.h
GEN hw/net/trace.h
GEN hw/virtio/trace.h
GEN hw/audio/trace.h
GEN hw/misc/trace.h
GEN hw/usb/trace.h
GEN hw/scsi/trace.h
GEN hw/nvram/trace.h
GEN hw/display/trace.h
GEN hw/input/trace.h
GEN hw/timer/trace.h
GEN hw/dma/trace.h
GEN hw/sparc/trace.h
GEN hw/sd/trace.h
GEN hw/isa/trace.h
GEN hw/i386/trace.h
GEN hw/mem/trace.h
GEN hw/9pfs/trace.h
GEN hw/i386/xen/trace.h
GEN hw/ppc/trace.h
GEN hw/pci/trace.h
GEN hw/s390x/trace.h
GEN hw/vfio/trace.h
GEN hw/acpi/trace.h
GEN hw/arm/trace.h
GEN hw/alpha/trace.h
GEN hw/xen/trace.h
GEN ui/trace.h
GEN audio/trace.h
GEN target/arm/trace.h
GEN net/trace.h
GEN target/sparc/trace.h
GEN target/i386/trace.h
GEN target/s390x/trace.h
GEN target/ppc/trace.h
GEN qom/trace.h
GEN linux-user/trace.h
GEN qapi/trace.h
GEN config-all-devices.mak
CC tests/qemu-iotests/socket_scm_helper.o
GEN version.texi
GEN qemu-img-cmds.texi
GEN qemu-options.texi
GEN qemu-monitor.texi
GEN qemu-monitor-info.texi
GEN qemu-img.1
GEN qemu-nbd.8
GEN qemu-ga.8
GEN qemu-qapi.texi
GEN qemu-ga-qapi.texi
GEN fsdev/virtfs-proxy-helper.1
GEN qga/qapi-generated/qga-qapi-types.h
GEN qga/qapi-generated/qga-qapi-visit.h
GEN qga/qapi-generated/qga-qapi-types.c
GEN qga/qapi-generated/qga-qmp-commands.h
GEN qga/qapi-generated/qga-qapi-visit.c
GEN qga/qapi-generated/qga-qmp-marshal.c
GEN trace-root.c
GEN util/trace.c
GEN crypto/trace.c
GEN io/trace.c
GEN migration/trace.c
GEN block/trace.c
GEN backends/trace.c
GEN hw/block/trace.c
GEN hw/block/dataplane/trace.c
GEN hw/char/trace.c
GEN hw/intc/trace.c
GEN hw/net/trace.c
GEN hw/virtio/trace.c
GEN hw/audio/trace.c
GEN hw/misc/trace.c
GEN hw/scsi/trace.c
GEN hw/usb/trace.c
GEN hw/nvram/trace.c
GEN hw/display/trace.c
GEN hw/input/trace.c
GEN hw/timer/trace.c
GEN hw/dma/trace.c
GEN hw/sparc/trace.c
GEN hw/sd/trace.c
GEN hw/isa/trace.c
GEN hw/mem/trace.c
GEN hw/i386/trace.c
GEN hw/i386/xen/trace.c
GEN hw/9pfs/trace.c
GEN hw/ppc/trace.c
GEN hw/pci/trace.c
GEN hw/s390x/trace.c
GEN hw/acpi/trace.c
GEN hw/vfio/trace.c
GEN hw/arm/trace.c
GEN hw/alpha/trace.c
GEN hw/xen/trace.c
GEN ui/trace.c
GEN audio/trace.c
GEN net/trace.c
GEN target/arm/trace.c
GEN target/sparc/trace.c
GEN target/i386/trace.c
GEN target/s390x/trace.c
GEN target/ppc/trace.c
GEN qom/trace.c
GEN linux-user/trace.c
GEN qapi/trace.c
GEN qmp-introspect.c
GEN qapi-types.c
GEN qapi-visit.c
GEN qapi-event.c
CC qapi/qapi-visit-core.o
CC qapi/qapi-dealloc-visitor.o
CC qapi/qobject-input-visitor.o
CC qapi/qobject-output-visitor.o
CC qapi/qmp-registry.o
CC qapi/string-input-visitor.o
CC qapi/qmp-dispatch.o
CC qapi/string-output-visitor.o
CC qapi/opts-visitor.o
CC qapi/qapi-clone-visitor.o
CC qapi/qmp-event.o
CC qapi/qapi-util.o
CC qobject/qnull.o
CC qobject/qint.o
CC qobject/qstring.o
CC qobject/qdict.o
CC qobject/qlist.o
CC qobject/qfloat.o
CC qobject/qbool.o
CC qobject/qjson.o
CC qobject/qobject.o
CC qobject/json-lexer.o
CC qobject/json-streamer.o
CC qobject/json-parser.o
CC trace/control.o
CC trace/qmp.o
CC util/osdep.o
CC util/cutils.o
CC util/unicode.o
CC util/qemu-timer-common.o
CC util/bufferiszero.o
CC util/lockcnt.o
CC util/aiocb.o
CC util/async.o
CC util/thread-pool.o
CC util/qemu-timer.o
CC util/main-loop.o
CC util/iohandler.o
CC util/aio-posix.o
CC util/compatfd.o
CC util/event_notifier-posix.o
CC util/mmap-alloc.o
CC util/oslib-posix.o
CC util/qemu-openpty.o
CC util/qemu-thread-posix.o
CC util/memfd.o
CC util/envlist.o
CC util/path.o
CC util/host-utils.o
CC util/module.o
CC util/bitmap.o
CC util/bitops.o
CC util/hbitmap.o
CC util/fifo8.o
CC util/acl.o
CC util/error.o
CC util/qemu-error.o
CC util/id.o
CC util/iov.o
CC util/qemu-config.o
CC util/qemu-sockets.o
CC util/uri.o
CC util/qemu-option.o
CC util/notify.o
CC util/qemu-progress.o
CC util/hexdump.o
CC util/crc32c.o
CC util/uuid.o
CC util/throttle.o
CC util/getauxval.o
CC util/readline.o
CC util/rcu.o
CC util/qemu-coroutine.o
CC util/qemu-coroutine-lock.o
CC util/qemu-coroutine-io.o
CC util/qemu-coroutine-sleep.o
CC util/coroutine-ucontext.o
CC util/timed-average.o
CC util/buffer.o
CC util/base64.o
CC util/log.o
CC util/qdist.o
CC util/qht.o
CC util/range.o
CC crypto/pbkdf-stub.o
CC stubs/arch-query-cpu-def.o
CC stubs/arch-query-cpu-model-expansion.o
CC stubs/arch-query-cpu-model-comparison.o
CC stubs/arch-query-cpu-model-baseline.o
CC stubs/bdrv-next-monitor-owned.o
CC stubs/blk-commit-all.o
CC stubs/blockdev-close-all-bdrv-states.o
CC stubs/cpu-get-clock.o
CC stubs/clock-warp.o
CC stubs/cpu-get-icount.o
CC stubs/dump.o
CC stubs/error-printf.o
CC stubs/fdset.o
CC stubs/gdbstub.o
CC stubs/get-vm-name.o
CC stubs/iothread.o
CC stubs/iothread-lock.o
CC stubs/is-daemonized.o
CC stubs/linux-aio.o
CC stubs/machine-init-done.o
CC stubs/migr-blocker.o
CC stubs/monitor.o
CC stubs/notify-event.o
CC stubs/qtest.o
CC stubs/replay.o
CC stubs/runstate-check.o
CC stubs/set-fd-handler.o
CC stubs/slirp.o
CC stubs/sysbus.o
CC stubs/trace-control.o
CC stubs/uuid.o
CC stubs/vm-stop.o
CC stubs/vmstate.o
CC stubs/qmp_pc_dimm_device_list.o
CC stubs/target-monitor-defs.o
CC stubs/target-get-monitor-def.o
CC stubs/pc_madt_cpu_entry.o
CC contrib/ivshmem-client/ivshmem-client.o
CC contrib/ivshmem-client/main.o
CC contrib/ivshmem-server/ivshmem-server.o
CC contrib/ivshmem-server/main.o
CC qemu-nbd.o
CC block.o
CC qemu-io-cmds.o
CC blockjob.o
CC replication.o
CC block/raw-format.o
CC block/qcow.o
CC block/vdi.o
CC block/vmdk.o
CC block/cloop.o
CC block/bochs.o
CC block/vpc.o
CC block/vvfat.o
CC block/dmg.o
CC block/qcow2.o
CC block/qcow2-refcount.o
CC block/qcow2-cluster.o
CC block/qcow2-snapshot.o
CC block/qcow2-cache.o
CC block/qed.o
CC block/qed-gencb.o
CC block/qed-l2-cache.o
CC block/qed-table.o
CC block/qed-cluster.o
CC block/qed-check.o
CC block/vhdx.o
CC block/vhdx-endian.o
CC block/vhdx-log.o
CC block/quorum.o
CC block/parallels.o
CC block/blkdebug.o
CC block/blkverify.o
CC block/blkreplay.o
CC block/block-backend.o
CC block/qapi.o
CC block/snapshot.o
CC block/file-posix.o
CC block/linux-aio.o
CC block/null.o
CC block/mirror.o
CC block/commit.o
CC block/io.o
CC block/throttle-groups.o
CC block/nbd.o
CC block/nbd-client.o
CC block/sheepdog.o
CC block/iscsi-opts.o
CC block/accounting.o
CC block/dirty-bitmap.o
CC block/write-threshold.o
CC block/backup.o
CC block/replication.o
CC block/crypto.o
CC nbd/server.o
CC nbd/client.o
CC nbd/common.o
CC block/iscsi.o
CC block/nfs.o
CC block/curl.o
CC block/rbd.o
CC block/gluster.o
CC block/ssh.o
CC block/dmg-bz2.o
CC crypto/init.o
CC crypto/hash.o
CC crypto/hash-nettle.o
CC crypto/hmac.o
CC crypto/hmac-nettle.o
CC crypto/aes.o
CC crypto/cipher.o
CC crypto/desrfb.o
CC crypto/tlscreds.o
CC crypto/tlscredsanon.o
CC crypto/tlscredsx509.o
CC crypto/tlssession.o
CC crypto/random-gnutls.o
CC crypto/secret.o
CC crypto/pbkdf.o
CC crypto/ivgen.o
CC crypto/pbkdf-nettle.o
CC crypto/ivgen-essiv.o
CC crypto/ivgen-plain.o
CC crypto/ivgen-plain64.o
CC crypto/afsplit.o
CC crypto/xts.o
CC crypto/block.o
CC crypto/block-qcow.o
CC crypto/block-luks.o
CC io/channel.o
CC io/channel-buffer.o
CC io/channel-command.o
CC io/channel-file.o
CC io/channel-socket.o
CC io/channel-watch.o
CC io/channel-websock.o
CC io/channel-tls.o
CC io/channel-util.o
CC io/dns-resolver.o
CC io/task.o
CC qom/object.o
CC qom/container.o
CC qom/qom-qobject.o
CC qom/object_interfaces.o
GEN qemu-img-cmds.h
CC qemu-io.o
CC fsdev/virtfs-proxy-helper.o
CC fsdev/9p-marshal.o
CC fsdev/9p-iov-marshal.o
CC qemu-bridge-helper.o
CC blockdev.o
CC blockdev-nbd.o
CC iothread.o
CC qdev-monitor.o
CC device-hotplug.o
CC os-posix.o
CC page_cache.o
CC accel.o
CC bt-host.o
CC bt-vhci.o
CC dma-helpers.o
CC vl.o
CC tpm.o
CC device_tree.o
GEN qmp-marshal.c
CC qmp.o
CC hmp.o
CC cpus-common.o
CC audio/audio.o
CC audio/noaudio.o
CC audio/mixeng.o
CC audio/wavaudio.o
CC audio/sdlaudio.o
CC audio/ossaudio.o
CC audio/wavcapture.o
CC backends/rng.o
CC backends/rng-egd.o
CC backends/msmouse.o
CC backends/rng-random.o
CC backends/wctablet.o
CC backends/testdev.o
CC backends/baum.o
CC backends/tpm.o
CC backends/hostmem.o
CC backends/hostmem-ram.o
CC backends/hostmem-file.o
CC backends/cryptodev.o
CC backends/cryptodev-builtin.o
CC block/stream.o
CC disas/alpha.o
CC disas/arm.o
CXX disas/arm-a64.o
CC disas/cris.o
CC disas/hppa.o
CC disas/i386.o
CC disas/m68k.o
CC disas/microblaze.o
CC disas/mips.o
CC disas/nios2.o
CC disas/moxie.o
CC disas/ppc.o
CC disas/s390.o
CC disas/sh4.o
CC disas/sparc.o
CC disas/lm32.o
CXX disas/libvixl/vixl/utils.o
CXX disas/libvixl/vixl/compiler-intrinsics.o
CXX disas/libvixl/vixl/a64/instructions-a64.o
CXX disas/libvixl/vixl/a64/decoder-a64.o
CXX disas/libvixl/vixl/a64/disasm-a64.o
CC fsdev/qemu-fsdev.o
CC fsdev/qemu-fsdev-opts.o
CC fsdev/qemu-fsdev-dummy.o
CC hw/9pfs/9p-local.o
CC hw/9pfs/9p.o
CC hw/9pfs/9p-xattr.o
CC hw/9pfs/9p-xattr-user.o
CC hw/9pfs/9p-posix-acl.o
CC hw/9pfs/coth.o
CC hw/9pfs/cofs.o
CC hw/9pfs/codir.o
CC hw/9pfs/cofile.o
CC hw/9pfs/coxattr.o
CC hw/9pfs/9p-synth.o
CC hw/9pfs/9p-handle.o
CC hw/9pfs/9p-proxy.o
CC hw/acpi/core.o
CC hw/acpi/piix4.o
CC hw/acpi/pcihp.o
CC hw/acpi/ich9.o
CC hw/acpi/tco.o
CC hw/acpi/cpu_hotplug.o
CC hw/acpi/memory_hotplug.o
CC hw/acpi/cpu.o
CC hw/acpi/nvdimm.o
CC hw/acpi/acpi_interface.o
CC hw/acpi/bios-linker-loader.o
CC hw/acpi/aml-build.o
CC hw/acpi/ipmi.o
CC hw/acpi/acpi-stub.o
CC hw/acpi/ipmi-stub.o
CC hw/audio/sb16.o
CC hw/audio/es1370.o
CC hw/audio/ac97.o
CC hw/audio/fmopl.o
CC hw/audio/adlib.o
CC hw/audio/gus.o
CC hw/audio/gusemu_hal.o
CC hw/audio/gusemu_mixer.o
CC hw/audio/cs4231a.o
CC hw/audio/intel-hda.o
CC hw/audio/hda-codec.o
CC hw/audio/pcspk.o
CC hw/audio/wm8750.o
CC hw/audio/pl041.o
CC hw/audio/lm4549.o
CC hw/audio/cs4231.o
CC hw/audio/marvell_88w8618.o
CC hw/audio/milkymist-ac97.o
CC hw/block/block.o
CC hw/block/cdrom.o
CC hw/block/fdc.o
CC hw/block/hd-geometry.o
CC hw/block/nand.o
CC hw/block/m25p80.o
CC hw/block/pflash_cfi01.o
CC hw/block/pflash_cfi02.o
CC hw/block/ecc.o
CC hw/block/onenand.o
CC hw/block/nvme.o
CC hw/bt/core.o
CC hw/bt/l2cap.o
CC hw/bt/sdp.o
CC hw/bt/hci.o
CC hw/bt/hid.o
CC hw/bt/hci-csr.o
CC hw/char/ipoctal232.o
CC hw/char/escc.o
CC hw/char/parallel.o
CC hw/char/pl011.o
CC hw/char/serial.o
CC hw/char/serial-isa.o
CC hw/char/serial-pci.o
CC hw/char/xilinx_uartlite.o
CC hw/char/virtio-console.o
CC hw/char/cadence_uart.o
CC hw/char/etraxfs_ser.o
CC hw/char/debugcon.o
CC hw/char/grlib_apbuart.o
CC hw/char/imx_serial.o
CC hw/char/lm32_juart.o
CC hw/char/lm32_uart.o
CC hw/char/milkymist-uart.o
CC hw/char/sclpconsole.o
CC hw/char/sclpconsole-lm.o
CC hw/core/qdev.o
CC hw/core/qdev-properties.o
CC hw/core/bus.o
CC hw/core/reset.o
CC hw/core/fw-path-provider.o
CC hw/core/irq.o
CC hw/core/hotplug.o
CC hw/core/empty_slot.o
CC hw/core/stream.o
CC hw/core/ptimer.o
CC hw/core/sysbus.o
CC hw/core/machine.o
CC hw/core/loader.o
CC hw/core/loader-fit.o
CC hw/core/qdev-properties-system.o
CC hw/core/register.o
CC hw/core/or-irq.o
CC hw/core/platform-bus.o
CC hw/display/ads7846.o
CC hw/display/cirrus_vga.o
CC hw/display/g364fb.o
CC hw/display/jazz_led.o
CC hw/display/pl110.o
CC hw/display/ssd0303.o
CC hw/display/ssd0323.o
CC hw/display/vga-pci.o
CC hw/display/vga-isa.o
CC hw/display/vga-isa-mm.o
CC hw/display/vmware_vga.o
CC hw/display/blizzard.o
CC hw/display/exynos4210_fimd.o
CC hw/display/framebuffer.o
CC hw/display/milkymist-vgafb.o
CC hw/display/tc6393xb.o
CC hw/dma/puv3_dma.o
CC hw/display/milkymist-tmu2.o
CC hw/dma/rc4030.o
CC hw/dma/pl080.o
CC hw/dma/pl330.o
CC hw/dma/i82374.o
CC hw/dma/i8257.o
CC hw/dma/xilinx_axidma.o
CC hw/dma/xlnx-zynq-devcfg.o
CC hw/dma/etraxfs_dma.o
CC hw/dma/sparc32_dma.o
CC hw/dma/sun4m_iommu.o
CC hw/gpio/pl061.o
CC hw/gpio/max7310.o
CC hw/gpio/puv3_gpio.o
CC hw/gpio/zaurus.o
CC hw/gpio/mpc8xxx.o
CC hw/gpio/gpio_key.o
CC hw/i2c/core.o
CC hw/i2c/smbus.o
CC hw/i2c/smbus_eeprom.o
CC hw/i2c/i2c-ddc.o
CC hw/i2c/versatile_i2c.o
CC hw/i2c/smbus_ich9.o
CC hw/i2c/pm_smbus.o
CC hw/i2c/bitbang_i2c.o
CC hw/i2c/exynos4210_i2c.o
CC hw/i2c/imx_i2c.o
CC hw/i2c/aspeed_i2c.o
CC hw/ide/core.o
CC hw/ide/atapi.o
CC hw/ide/qdev.o
CC hw/ide/pci.o
CC hw/ide/isa.o
CC hw/ide/piix.o
CC hw/ide/cmd646.o
CC hw/ide/macio.o
CC hw/ide/mmio.o
CC hw/ide/via.o
CC hw/ide/microdrive.o
CC hw/ide/ahci.o
CC hw/ide/ich.o
CC hw/input/adb.o
CC hw/input/hid.o
CC hw/input/lm832x.o
CC hw/input/pckbd.o
CC hw/input/pl050.o
CC hw/input/stellaris_input.o
CC hw/input/ps2.o
CC hw/input/tsc2005.o
CC hw/input/vmmouse.o
CC hw/input/virtio-input.o
CC hw/input/virtio-input-hid.o
CC hw/input/virtio-input-host.o
CC hw/intc/heathrow_pic.o
CC hw/intc/i8259_common.o
CC hw/intc/i8259.o
CC hw/intc/pl190.o
CC hw/intc/puv3_intc.o
CC hw/intc/xilinx_intc.o
CC hw/intc/imx_avic.o
CC hw/intc/etraxfs_pic.o
CC hw/intc/lm32_pic.o
CC hw/intc/realview_gic.o
CC hw/intc/slavio_intctl.o
CC hw/intc/ioapic_common.o
CC hw/intc/arm_gic_common.o
CC hw/intc/arm_gic.o
CC hw/intc/arm_gicv2m.o
CC hw/intc/arm_gicv3_common.o
CC hw/intc/arm_gicv3.o
CC hw/intc/arm_gicv3_redist.o
CC hw/intc/arm_gicv3_dist.o
CC hw/intc/arm_gicv3_its_common.o
CC hw/intc/openpic.o
CC hw/intc/intc.o
CC hw/ipack/ipack.o
CC hw/ipack/tpci200.o
CC hw/ipmi/ipmi.o
CC hw/ipmi/ipmi_bmc_sim.o
CC hw/ipmi/ipmi_bmc_extern.o
CC hw/ipmi/isa_ipmi_kcs.o
CC hw/ipmi/isa_ipmi_bt.o
CC hw/isa/isa-bus.o
CC hw/isa/apm.o
CC hw/isa/i82378.o
CC hw/isa/pc87312.o
CC hw/isa/piix4.o
CC hw/mem/pc-dimm.o
CC hw/isa/vt82c686.o
CC hw/mem/nvdimm.o
CC hw/misc/applesmc.o
CC hw/misc/max111x.o
CC hw/misc/tmp105.o
CC hw/misc/debugexit.o
CC hw/misc/sga.o
CC hw/misc/pci-testdev.o
CC hw/misc/pc-testdev.o
CC hw/misc/unimp.o
CC hw/misc/arm_l2x0.o
CC hw/misc/arm_integrator_debug.o
CC hw/misc/a9scu.o
CC hw/misc/arm11scu.o
CC hw/misc/puv3_pm.o
CC hw/misc/macio/macio.o
CC hw/misc/macio/cuda.o
CC hw/misc/macio/mac_dbdma.o
CC hw/net/dp8393x.o
CC hw/net/ne2000.o
CC hw/net/eepro100.o
CC hw/net/pcnet-pci.o
CC hw/net/pcnet.o
CC hw/net/e1000.o
CC hw/net/e1000x_common.o
CC hw/net/net_tx_pkt.o
CC hw/net/net_rx_pkt.o
CC hw/net/e1000e.o
CC hw/net/e1000e_core.o
CC hw/net/rtl8139.o
CC hw/net/vmxnet3.o
CC hw/net/smc91c111.o
CC hw/net/lan9118.o
CC hw/net/ne2000-isa.o
CC hw/net/opencores_eth.o
CC hw/net/xgmac.o
CC hw/net/mipsnet.o
CC hw/net/xilinx_axienet.o
CC hw/net/allwinner_emac.o
CC hw/net/imx_fec.o
CC hw/net/cadence_gem.o
CC hw/net/stellaris_enet.o
CC hw/net/lance.o
CC hw/net/rocker/rocker.o
CC hw/net/rocker/rocker_fp.o
CC hw/net/rocker/rocker_desc.o
CC hw/net/rocker/rocker_world.o
CC hw/net/rocker/rocker_of_dpa.o
CC hw/nvram/ds1225y.o
CC hw/nvram/eeprom93xx.o
CC hw/nvram/fw_cfg.o
CC hw/nvram/chrp_nvram.o
CC hw/nvram/mac_nvram.o
CC hw/pci-bridge/pci_bridge_dev.o
CC hw/pci-bridge/pcie_root_port.o
CC hw/pci-bridge/gen_pcie_root_port.o
CC hw/pci-bridge/pci_expander_bridge.o
CC hw/pci-bridge/xio3130_upstream.o
CC hw/pci-bridge/xio3130_downstream.o
CC hw/pci-bridge/ioh3420.o
CC hw/pci-bridge/dec.o
CC hw/pci-bridge/i82801b11.o
CC hw/pci-host/pam.o
CC hw/pci-host/prep.o
CC hw/pci-host/grackle.o
CC hw/pci-host/uninorth.o
CC hw/pci-host/ppce500.o
CC hw/pci-host/apb.o
CC hw/pci-host/versatile.o
CC hw/pci-host/bonito.o
CC hw/pci-host/piix.o
CC hw/pci-host/q35.o
CC hw/pci-host/gpex.o
CC hw/pci-host/xilinx-pcie.o
CC hw/pci/pci.o
CC hw/pci/pci_bridge.o
CC hw/pci/msix.o
CC hw/pci/msi.o
CC hw/pci/shpc.o
CC hw/pci/slotid_cap.o
CC hw/pci/pci_host.o
CC hw/pci/pcie_host.o
CC hw/pci/pcie.o
CC hw/pci/pcie_aer.o
CC hw/pci/pcie_port.o
CC hw/pci/pci-stub.o
CC hw/pcmcia/pcmcia.o
CC hw/scsi/scsi-disk.o
CC hw/scsi/scsi-generic.o
CC hw/scsi/scsi-bus.o
CC hw/scsi/lsi53c895a.o
CC hw/scsi/mptsas.o
CC hw/scsi/mptconfig.o
CC hw/scsi/mptendian.o
CC hw/scsi/megasas.o
CC hw/scsi/vmw_pvscsi.o
CC hw/scsi/esp.o
CC hw/scsi/esp-pci.o
CC hw/sd/pl181.o
CC hw/sd/ssi-sd.o
CC hw/sd/sd.o
CC hw/sd/core.o
CC hw/smbios/smbios.o
CC hw/sd/sdhci.o
CC hw/smbios/smbios_type_38.o
CC hw/smbios/smbios-stub.o
CC hw/smbios/smbios_type_38-stub.o
CC hw/ssi/pl022.o
CC hw/ssi/xilinx_spi.o
CC hw/ssi/ssi.o
CC hw/ssi/xilinx_spips.o
CC hw/ssi/aspeed_smc.o
CC hw/ssi/stm32f2xx_spi.o
CC hw/timer/arm_timer.o
CC hw/timer/arm_mptimer.o
CC hw/timer/a9gtimer.o
CC hw/timer/cadence_ttc.o
CC hw/timer/ds1338.o
CC hw/timer/hpet.o
CC hw/timer/i8254_common.o
CC hw/timer/i8254.o
CC hw/timer/m48t59.o
CC hw/timer/m48t59-isa.o
CC hw/timer/pl031.o
CC hw/timer/puv3_ost.o
CC hw/timer/twl92230.o
CC hw/timer/xilinx_timer.o
CC hw/timer/slavio_timer.o
CC hw/timer/etraxfs_timer.o
CC hw/timer/grlib_gptimer.o
CC hw/timer/imx_epit.o
CC hw/timer/imx_gpt.o
CC hw/timer/lm32_timer.o
CC hw/timer/milkymist-sysctl.o
CC hw/timer/stm32f2xx_timer.o
CC hw/timer/aspeed_timer.o
CC hw/timer/sun4v-rtc.o
CC hw/tpm/tpm_tis.o
CC hw/usb/core.o
CC hw/usb/combined-packet.o
CC hw/usb/bus.o
CC hw/usb/libhw.o
CC hw/usb/desc.o
CC hw/usb/desc-msos.o
CC hw/usb/hcd-uhci.o
CC hw/usb/hcd-ohci.o
CC hw/usb/hcd-ehci.o
CC hw/usb/hcd-ehci-pci.o
CC hw/usb/hcd-ehci-sysbus.o
CC hw/usb/hcd-xhci.o
CC hw/usb/hcd-musb.o
CC hw/usb/dev-hub.o
CC hw/usb/dev-hid.o
CC hw/usb/dev-wacom.o
CC hw/usb/dev-storage.o
CC hw/usb/dev-uas.o
CC hw/usb/dev-audio.o
CC hw/usb/dev-serial.o
CC hw/usb/dev-bluetooth.o
CC hw/usb/dev-network.o
CC hw/usb/dev-smartcard-reader.o
CC hw/usb/ccid-card-passthru.o
CC hw/usb/ccid-card-emulated.o
CC hw/usb/dev-mtp.o
CC hw/usb/redirect.o
CC hw/usb/quirks.o
CC hw/usb/host-libusb.o
CC hw/usb/host-legacy.o
CC hw/virtio/virtio-rng.o
CC hw/virtio/virtio-pci.o
CC hw/virtio/virtio-bus.o
CC hw/virtio/virtio-mmio.o
CC hw/virtio/vhost-stub.o
CC hw/watchdog/watchdog.o
CC hw/watchdog/wdt_i6300esb.o
CC hw/watchdog/wdt_ib700.o
CC hw/watchdog/wdt_diag288.o
CC hw/watchdog/wdt_aspeed.o
CC migration/migration.o
CC migration/fd.o
CC migration/socket.o
CC migration/exec.o
CC migration/tls.o
CC migration/colo-comm.o
CC migration/colo.o
CC migration/colo-failover.o
CC migration/vmstate.o
CC migration/qemu-file.o
CC migration/qemu-file-channel.o
CC migration/xbzrle.o
CC migration/postcopy-ram.o
CC migration/qjson.o
CC migration/block.o
CC net/net.o
CC net/queue.o
CC net/checksum.o
CC net/util.o
CC net/hub.o
CC net/socket.o
CC net/dump.o
CC net/eth.o
CC net/l2tpv3.o
CC net/tap.o
CC net/vhost-user.o
CC net/tap-linux.o
CC net/slirp.o
CC net/filter.o
CC net/filter-buffer.o
CC net/filter-mirror.o
CC net/colo-compare.o
CC net/colo.o
CC net/filter-rewriter.o
CC net/filter-replay.o
CC qom/cpu.o
CC replay/replay.o
CC replay/replay-events.o
CC replay/replay-internal.o
CC replay/replay-time.o
CC replay/replay-input.o
CC replay/replay-char.o
CC replay/replay-snapshot.o
CC replay/replay-net.o
CC slirp/cksum.o
CC slirp/if.o
CC slirp/ip_icmp.o
CC slirp/ip6_icmp.o
CC slirp/ip6_input.o
CC slirp/ip6_output.o
CC slirp/ip_input.o
CC slirp/ip_output.o
CC slirp/dnssearch.o
CC slirp/dhcpv6.o
CC slirp/slirp.o
CC slirp/mbuf.o
CC slirp/misc.o
CC slirp/sbuf.o
CC slirp/socket.o
CC slirp/tcp_input.o
CC slirp/tcp_output.o
CC slirp/tcp_subr.o
CC slirp/tcp_timer.o
CC slirp/udp.o
CC slirp/udp6.o
CC slirp/bootp.o
CC slirp/tftp.o
CC slirp/arp_table.o
CC slirp/ndp_table.o
CC ui/keymaps.o
CC ui/console.o
CC ui/cursor.o
CC ui/qemu-pixman.o
CC ui/input.o
CC ui/input-keymap.o
CC ui/input-legacy.o
CC ui/input-linux.o
CC ui/sdl2-input.o
CC ui/sdl2.o
CC ui/sdl2-2d.o
CC ui/sdl2-gl.o
CC ui/x_keymap.o
CC ui/curses.o
CC ui/vnc.o
CC ui/vnc-enc-zlib.o
CC ui/vnc-enc-hextile.o
CC ui/vnc-enc-tight.o
CC ui/vnc-palette.o
CC ui/vnc-enc-zrle.o
CC ui/vnc-auth-vencrypt.o
CC ui/vnc-auth-sasl.o
CC ui/vnc-ws.o
CC ui/vnc-jobs.o
CC ui/gtk.o
CC ui/shader.o
VERT ui/shader/texture-blit-vert.h
FRAG ui/shader/texture-blit-frag.h
CC ui/egl-helpers.o
CC ui/egl-context.o
CC ui/gtk-gl-area.o
CC chardev/char.o
CC chardev/char-fd.o
CC chardev/char-file.o
CC chardev/char-io.o
CC chardev/char-mux.o
CC chardev/char-null.o
CC chardev/char-parallel.o
CC chardev/char-pipe.o
CC chardev/char-pty.o
CC chardev/char-ringbuf.o
CC chardev/char-serial.o
CC chardev/char-socket.o
CC chardev/char-stdio.o
CC chardev/char-udp.o
CCAS s390-ccw/start.o
LINK tests/qemu-iotests/socket_scm_helper
GEN qemu-doc.html
CC s390-ccw/main.o
GEN qemu-doc.txt
GEN qemu.1
CC s390-ccw/bootmap.o
CC s390-ccw/sclp-ascii.o
CC s390-ccw/virtio.o
GEN docs/qemu-qmp-ref.html
CC s390-ccw/virtio-scsi.o
BUILD s390-ccw/s390-ccw.elf
STRIP s390-ccw/s390-ccw.img
GEN docs/qemu-qmp-ref.txt
GEN docs/qemu-qmp-ref.7
GEN docs/qemu-ga-ref.html
GEN docs/qemu-ga-ref.txt
GEN docs/qemu-ga-ref.7
CC qga/commands.o
CC qga/guest-agent-command-state.o
CC qga/main.o
CC qga/commands-posix.o
CC qga/channel-posix.o
CC qga/qapi-generated/qga-qapi-types.o
CC qga/qapi-generated/qga-qapi-visit.o
CC qga/qapi-generated/qga-qmp-marshal.o
CC qmp-introspect.o
CC qapi-types.o
CC qapi-visit.o
CC qapi-event.o
AR libqemustub.a
CC qemu-img.o
CC qmp-marshal.o
CC ui/console-gl.o
CC trace-root.o
CC util/trace.o
CC crypto/trace.o
CC io/trace.o
CC migration/trace.o
CC block/trace.o
CC backends/trace.o
CC hw/block/trace.o
CC hw/block/dataplane/trace.o
CC hw/intc/trace.o
CC hw/char/trace.o
CC hw/net/trace.o
CC hw/virtio/trace.o
CC hw/audio/trace.o
CC hw/misc/trace.o
CC hw/usb/trace.o
CC hw/scsi/trace.o
CC hw/nvram/trace.o
CC hw/display/trace.o
CC hw/input/trace.o
CC hw/timer/trace.o
CC hw/dma/trace.o
CC hw/sparc/trace.o
CC hw/sd/trace.o
CC hw/isa/trace.o
CC hw/mem/trace.o
CC hw/i386/trace.o
CC hw/i386/xen/trace.o
CC hw/9pfs/trace.o
CC hw/ppc/trace.o
CC hw/pci/trace.o
CC hw/s390x/trace.o
CC hw/vfio/trace.o
CC hw/acpi/trace.o
CC hw/arm/trace.o
CC hw/alpha/trace.o
CC hw/xen/trace.o
CC ui/trace.o
CC audio/trace.o
CC net/trace.o
CC target/arm/trace.o
CC target/i386/trace.o
CC target/sparc/trace.o
CC target/s390x/trace.o
CC target/ppc/trace.o
CC qom/trace.o
CC linux-user/trace.o
CC qapi/trace.o
AR libqemuutil.a
LINK qemu-ga
LINK ivshmem-client
LINK ivshmem-server
LINK qemu-nbd
LINK qemu-img
LINK qemu-io
LINK fsdev/virtfs-proxy-helper
LINK qemu-bridge-helper
GEN alpha-softmmu/hmp-commands.h
GEN cris-softmmu/hmp-commands.h
GEN cris-softmmu/hmp-commands-info.h
GEN cris-softmmu/config-target.h
CC cris-softmmu/exec.o
GEN alpha-softmmu/hmp-commands-info.h
GEN alpha-softmmu/config-target.h
GEN arm-softmmu/hmp-commands.h
GEN aarch64-softmmu/hmp-commands.h
GEN arm-softmmu/hmp-commands-info.h
CC alpha-softmmu/exec.o
GEN aarch64-softmmu/hmp-commands-info.h
GEN arm-softmmu/config-target.h
GEN aarch64-softmmu/config-target.h
CC arm-softmmu/exec.o
CC aarch64-softmmu/exec.o
CC cris-softmmu/translate-all.o
CC alpha-softmmu/translate-all.o
CC aarch64-softmmu/translate-all.o
CC cris-softmmu/cpu-exec.o
CC arm-softmmu/translate-all.o
CC alpha-softmmu/cpu-exec.o
CC cris-softmmu/translate-common.o
CC aarch64-softmmu/cpu-exec.o
CC alpha-softmmu/translate-common.o
CC cris-softmmu/cpu-exec-common.o
CC arm-softmmu/cpu-exec.o
CC alpha-softmmu/cpu-exec-common.o
CC cris-softmmu/tcg/tcg.o
CC alpha-softmmu/tcg/tcg.o
CC aarch64-softmmu/translate-common.o
CC arm-softmmu/translate-common.o
CC aarch64-softmmu/cpu-exec-common.o
CC arm-softmmu/cpu-exec-common.o
CC aarch64-softmmu/tcg/tcg.o
CC arm-softmmu/tcg/tcg.o
CC cris-softmmu/tcg/tcg-op.o
CC alpha-softmmu/tcg/tcg-op.o
CC arm-softmmu/tcg/tcg-op.o
CC aarch64-softmmu/tcg/tcg-op.o
CC cris-softmmu/tcg/optimize.o
CC alpha-softmmu/tcg/optimize.o
CC cris-softmmu/tcg/tcg-common.o
CC cris-softmmu/fpu/softfloat.o
CC alpha-softmmu/tcg/tcg-common.o
CC alpha-softmmu/fpu/softfloat.o
CC arm-softmmu/tcg/optimize.o
CC aarch64-softmmu/tcg/optimize.o
CC arm-softmmu/tcg/tcg-common.o
CC aarch64-softmmu/tcg/tcg-common.o
CC arm-softmmu/fpu/softfloat.o
CC aarch64-softmmu/fpu/softfloat.o
CC cris-softmmu/disas.o
CC alpha-softmmu/disas.o
CC cris-softmmu/tcg-runtime.o
CC alpha-softmmu/tcg-runtime.o
CC alpha-softmmu/hax-stub.o
CC cris-softmmu/hax-stub.o
CC alpha-softmmu/kvm-stub.o
CC cris-softmmu/kvm-stub.o
CC alpha-softmmu/arch_init.o
CC cris-softmmu/arch_init.o
CC arm-softmmu/disas.o
CC cris-softmmu/cpus.o
CC alpha-softmmu/cpus.o
CC arm-softmmu/tcg-runtime.o
CC cris-softmmu/monitor.o
GEN arm-softmmu/gdbstub-xml.c
CC alpha-softmmu/monitor.o
CC aarch64-softmmu/disas.o
CC aarch64-softmmu/tcg-runtime.o
CC arm-softmmu/hax-stub.o
GEN aarch64-softmmu/gdbstub-xml.c
CC arm-softmmu/kvm-stub.o
CC cris-softmmu/gdbstub.o
CC alpha-softmmu/gdbstub.o
CC arm-softmmu/arch_init.o
CC cris-softmmu/balloon.o
CC alpha-softmmu/balloon.o
CC arm-softmmu/cpus.o
CC cris-softmmu/ioport.o
CC aarch64-softmmu/hax-stub.o
CC alpha-softmmu/ioport.o
CC cris-softmmu/numa.o
CC aarch64-softmmu/kvm-stub.o
CC arm-softmmu/monitor.o
CC alpha-softmmu/numa.o
CC aarch64-softmmu/arch_init.o
CC cris-softmmu/qtest.o
CC aarch64-softmmu/cpus.o
CC alpha-softmmu/qtest.o
CC cris-softmmu/bootdevice.o
CC cris-softmmu/memory.o
CC alpha-softmmu/bootdevice.o
CC aarch64-softmmu/monitor.o
CC alpha-softmmu/memory.o
CC arm-softmmu/gdbstub.o
CC cris-softmmu/cputlb.o
CC arm-softmmu/balloon.o
CC alpha-softmmu/cputlb.o
CC arm-softmmu/ioport.o
CC aarch64-softmmu/gdbstub.o
CC arm-softmmu/numa.o
CC cris-softmmu/memory_mapping.o
CC cris-softmmu/dump.o
CC aarch64-softmmu/balloon.o
CC arm-softmmu/qtest.o
CC aarch64-softmmu/ioport.o
CC arm-softmmu/bootdevice.o
CC alpha-softmmu/memory_mapping.o
CC cris-softmmu/migration/ram.o
CC arm-softmmu/memory.o
CC alpha-softmmu/dump.o
CC aarch64-softmmu/numa.o
CC cris-softmmu/migration/savevm.o
CC aarch64-softmmu/qtest.o
CC alpha-softmmu/migration/ram.o
CC arm-softmmu/cputlb.o
CC aarch64-softmmu/bootdevice.o
CC cris-softmmu/xen-common-stub.o
CC aarch64-softmmu/memory.o
CC cris-softmmu/xen-hvm-stub.o
CC alpha-softmmu/migration/savevm.o
CC cris-softmmu/hw/core/nmi.o
CC cris-softmmu/hw/core/generic-loader.o
CC cris-softmmu/hw/core/null-machine.o
CC aarch64-softmmu/cputlb.o
CC arm-softmmu/memory_mapping.o
CC cris-softmmu/hw/cpu/core.o
CC arm-softmmu/dump.o
CC cris-softmmu/hw/net/etraxfs_eth.o
CC alpha-softmmu/xen-common-stub.o
CC cris-softmmu/hw/net/vhost_net.o
CC alpha-softmmu/xen-hvm-stub.o
CC cris-softmmu/hw/net/rocker/qmp-norocker.o
CC cris-softmmu/hw/vfio/common.o
CC alpha-softmmu/hw/9pfs/virtio-9p-device.o
CC arm-softmmu/migration/ram.o
CC alpha-softmmu/hw/block/virtio-blk.o
CC aarch64-softmmu/memory_mapping.o
CC cris-softmmu/hw/vfio/platform.o
CC aarch64-softmmu/dump.o
CC cris-softmmu/hw/vfio/spapr.o
CC arm-softmmu/migration/savevm.o
CC alpha-softmmu/hw/block/dataplane/virtio-blk.o
CC cris-softmmu/hw/cris/boot.o
CC aarch64-softmmu/migration/ram.o
CC alpha-softmmu/hw/char/virtio-serial-bus.o
CC cris-softmmu/hw/cris/axis_dev88.o
CC alpha-softmmu/hw/core/nmi.o
CC arm-softmmu/xen-common-stub.o
CC cris-softmmu/target/cris/translate.o
CC alpha-softmmu/hw/core/generic-loader.o
CC arm-softmmu/xen-hvm-stub.o
CC alpha-softmmu/hw/core/null-machine.o
CC arm-softmmu/hw/9pfs/virtio-9p-device.o
CC aarch64-softmmu/migration/savevm.o
CC arm-softmmu/hw/adc/stm32f2xx_adc.o
CC alpha-softmmu/hw/cpu/core.o
CC arm-softmmu/hw/block/virtio-blk.o
CC alpha-softmmu/hw/display/vga.o
CC aarch64-softmmu/xen-common-stub.o
CC arm-softmmu/hw/block/dataplane/virtio-blk.o
CC aarch64-softmmu/xen-hvm-stub.o
CC cris-softmmu/target/cris/op_helper.o
CC arm-softmmu/hw/char/exynos4210_uart.o
CC alpha-softmmu/hw/display/virtio-gpu.o
CC aarch64-softmmu/hw/9pfs/virtio-9p-device.o
CC arm-softmmu/hw/char/omap_uart.o
CC arm-softmmu/hw/char/digic-uart.o
CC cris-softmmu/target/cris/helper.o
CC aarch64-softmmu/hw/adc/stm32f2xx_adc.o
CC arm-softmmu/hw/char/stm32f2xx_usart.o
CC alpha-softmmu/hw/display/virtio-gpu-3d.o
CC cris-softmmu/target/cris/cpu.o
CC aarch64-softmmu/hw/block/virtio-blk.o
CC arm-softmmu/hw/char/bcm2835_aux.o
CC cris-softmmu/target/cris/gdbstub.o
CC aarch64-softmmu/hw/block/dataplane/virtio-blk.o
CC alpha-softmmu/hw/display/virtio-gpu-pci.o
CC arm-softmmu/hw/char/virtio-serial-bus.o
CC cris-softmmu/target/cris/mmu.o
CC aarch64-softmmu/hw/char/exynos4210_uart.o
CC cris-softmmu/target/cris/machine.o
CC alpha-softmmu/hw/misc/ivshmem.o
CC arm-softmmu/hw/core/nmi.o
CC aarch64-softmmu/hw/char/omap_uart.o
GEN trace/generated-helpers.c
CC cris-softmmu/trace/control-target.o
CC arm-softmmu/hw/core/generic-loader.o
CC aarch64-softmmu/hw/char/digic-uart.o
CC alpha-softmmu/hw/misc/edu.o
CC arm-softmmu/hw/core/null-machine.o
CC cris-softmmu/trace/generated-helpers.o
CC aarch64-softmmu/hw/char/stm32f2xx_usart.o
CC alpha-softmmu/hw/net/virtio-net.o
LINK cris-softmmu/qemu-system-cris
CC arm-softmmu/hw/cpu/arm11mpcore.o
CC aarch64-softmmu/hw/char/bcm2835_aux.o
CC arm-softmmu/hw/cpu/realview_mpcore.o
CC arm-softmmu/hw/cpu/a9mpcore.o
CC aarch64-softmmu/hw/char/virtio-serial-bus.o
CC alpha-softmmu/hw/net/vhost_net.o
CC arm-softmmu/hw/cpu/a15mpcore.o
CC alpha-softmmu/hw/scsi/virtio-scsi.o
CC arm-softmmu/hw/cpu/core.o
CC aarch64-softmmu/hw/core/nmi.o
CC arm-softmmu/hw/display/omap_dss.o
CC aarch64-softmmu/hw/core/generic-loader.o
CC alpha-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC aarch64-softmmu/hw/core/null-machine.o
CC aarch64-softmmu/hw/cpu/arm11mpcore.o
CC arm-softmmu/hw/display/omap_lcdc.o
CC alpha-softmmu/hw/scsi/vhost-scsi.o
CC arm-softmmu/hw/display/pxa2xx_lcd.o
CC aarch64-softmmu/hw/cpu/realview_mpcore.o
CC aarch64-softmmu/hw/cpu/a9mpcore.o
CC alpha-softmmu/hw/timer/mc146818rtc.o
CC aarch64-softmmu/hw/cpu/a15mpcore.o
CC aarch64-softmmu/hw/cpu/core.o
CC alpha-softmmu/hw/vfio/common.o
CC aarch64-softmmu/hw/display/omap_dss.o
CC arm-softmmu/hw/display/bcm2835_fb.o
GEN i386-softmmu/hmp-commands.h
GEN i386-softmmu/hmp-commands-info.h
CC aarch64-softmmu/hw/display/omap_lcdc.o
GEN i386-softmmu/config-target.h
CC i386-softmmu/exec.o
CC alpha-softmmu/hw/vfio/pci.o
CC arm-softmmu/hw/display/vga.o
CC aarch64-softmmu/hw/display/pxa2xx_lcd.o
CC arm-softmmu/hw/display/virtio-gpu.o
CC alpha-softmmu/hw/vfio/pci-quirks.o
CC aarch64-softmmu/hw/display/bcm2835_fb.o
CC i386-softmmu/translate-all.o
CC arm-softmmu/hw/display/virtio-gpu-3d.o
CC alpha-softmmu/hw/vfio/platform.o
CC aarch64-softmmu/hw/display/vga.o
CC i386-softmmu/cpu-exec.o
CC alpha-softmmu/hw/vfio/spapr.o
CC arm-softmmu/hw/display/virtio-gpu-pci.o
CC alpha-softmmu/hw/virtio/virtio.o
CC i386-softmmu/translate-common.o
CC arm-softmmu/hw/dma/omap_dma.o
CC i386-softmmu/cpu-exec-common.o
CC aarch64-softmmu/hw/display/virtio-gpu.o
CC alpha-softmmu/hw/virtio/virtio-balloon.o
CC i386-softmmu/tcg/tcg.o
CC arm-softmmu/hw/dma/soc_dma.o
CC alpha-softmmu/hw/virtio/vhost.o
CC aarch64-softmmu/hw/display/virtio-gpu-3d.o
CC arm-softmmu/hw/dma/pxa2xx_dma.o
CC arm-softmmu/hw/dma/bcm2835_dma.o
CC aarch64-softmmu/hw/display/virtio-gpu-pci.o
CC alpha-softmmu/hw/virtio/vhost-backend.o
CC arm-softmmu/hw/gpio/omap_gpio.o
CC aarch64-softmmu/hw/display/dpcd.o
CC alpha-softmmu/hw/virtio/vhost-user.o
CC arm-softmmu/hw/gpio/imx_gpio.o
CC aarch64-softmmu/hw/display/xlnx_dp.o
CC alpha-softmmu/hw/virtio/vhost-vsock.o
CC i386-softmmu/tcg/tcg-op.o
CC arm-softmmu/hw/gpio/bcm2835_gpio.o
CC alpha-softmmu/hw/virtio/virtio-crypto.o
CC aarch64-softmmu/hw/dma/xlnx_dpdma.o
CC arm-softmmu/hw/i2c/omap_i2c.o
CC alpha-softmmu/hw/virtio/virtio-crypto-pci.o
CC alpha-softmmu/hw/alpha/dp264.o
CC arm-softmmu/hw/input/pxa2xx_keypad.o
CC aarch64-softmmu/hw/dma/omap_dma.o
CC alpha-softmmu/hw/alpha/pci.o
CC arm-softmmu/hw/input/tsc210x.o
CC alpha-softmmu/hw/alpha/typhoon.o
CC aarch64-softmmu/hw/dma/soc_dma.o
CC alpha-softmmu/target/alpha/machine.o
CC arm-softmmu/hw/intc/armv7m_nvic.o
CC alpha-softmmu/target/alpha/translate.o
CC aarch64-softmmu/hw/dma/pxa2xx_dma.o
CC i386-softmmu/tcg/optimize.o
CC aarch64-softmmu/hw/dma/bcm2835_dma.o
CC arm-softmmu/hw/intc/exynos4210_gic.o
CC aarch64-softmmu/hw/gpio/omap_gpio.o
CC arm-softmmu/hw/intc/exynos4210_combiner.o
CC alpha-softmmu/target/alpha/helper.o
CC arm-softmmu/hw/intc/omap_intc.o
CC aarch64-softmmu/hw/gpio/imx_gpio.o
CC alpha-softmmu/target/alpha/cpu.o
CC i386-softmmu/tcg/tcg-common.o
CC aarch64-softmmu/hw/gpio/bcm2835_gpio.o
CC alpha-softmmu/target/alpha/int_helper.o
CC i386-softmmu/fpu/softfloat.o
CC arm-softmmu/hw/intc/bcm2835_ic.o
CC aarch64-softmmu/hw/i2c/omap_i2c.o
CC alpha-softmmu/target/alpha/fpu_helper.o
CC arm-softmmu/hw/intc/bcm2836_control.o
CC aarch64-softmmu/hw/input/pxa2xx_keypad.o
CC arm-softmmu/hw/intc/allwinner-a10-pic.o
CC aarch64-softmmu/hw/input/tsc210x.o
CC alpha-softmmu/target/alpha/vax_helper.o
CC arm-softmmu/hw/intc/aspeed_vic.o
CC alpha-softmmu/target/alpha/sys_helper.o
CC arm-softmmu/hw/intc/arm_gicv3_cpuif.o
CC aarch64-softmmu/hw/intc/armv7m_nvic.o
CC alpha-softmmu/target/alpha/mem_helper.o
CC alpha-softmmu/target/alpha/gdbstub.o
CC aarch64-softmmu/hw/intc/exynos4210_gic.o
CC arm-softmmu/hw/misc/ivshmem.o
CC i386-softmmu/disas.o
GEN trace/generated-helpers.c
CC aarch64-softmmu/hw/intc/exynos4210_combiner.o
CC alpha-softmmu/trace/control-target.o
CC aarch64-softmmu/hw/intc/omap_intc.o
CC alpha-softmmu/trace/generated-helpers.o
CC i386-softmmu/tcg-runtime.o
CC arm-softmmu/hw/misc/arm_sysctl.o
LINK alpha-softmmu/qemu-system-alpha
CC i386-softmmu/hax-stub.o
CC arm-softmmu/hw/misc/cbus.o
CC aarch64-softmmu/hw/intc/bcm2835_ic.o
CC i386-softmmu/kvm-stub.o
CC i386-softmmu/arch_init.o
CC arm-softmmu/hw/misc/exynos4210_pmu.o
CC aarch64-softmmu/hw/intc/bcm2836_control.o
CC i386-softmmu/cpus.o
CC arm-softmmu/hw/misc/exynos4210_clk.o
CC aarch64-softmmu/hw/intc/allwinner-a10-pic.o
CC i386-softmmu/monitor.o
CC arm-softmmu/hw/misc/imx_ccm.o
CC aarch64-softmmu/hw/intc/aspeed_vic.o
CC arm-softmmu/hw/misc/imx31_ccm.o
CC arm-softmmu/hw/misc/imx25_ccm.o
CC aarch64-softmmu/hw/intc/arm_gicv3_cpuif.o
CC arm-softmmu/hw/misc/imx6_ccm.o
CC arm-softmmu/hw/misc/imx6_src.o
CC arm-softmmu/hw/misc/mst_fpga.o
CC i386-softmmu/gdbstub.o
CC arm-softmmu/hw/misc/omap_clk.o
CC aarch64-softmmu/hw/misc/ivshmem.o
GEN lm32-softmmu/hmp-commands.h
GEN lm32-softmmu/hmp-commands-info.h
GEN lm32-softmmu/config-target.h
CC arm-softmmu/hw/misc/omap_gpmc.o
CC aarch64-softmmu/hw/misc/arm_sysctl.o
CC lm32-softmmu/exec.o
CC i386-softmmu/balloon.o
CC arm-softmmu/hw/misc/omap_l4.o
CC aarch64-softmmu/hw/misc/cbus.o
CC i386-softmmu/ioport.o
CC arm-softmmu/hw/misc/omap_sdrc.o
CC aarch64-softmmu/hw/misc/exynos4210_pmu.o
CC i386-softmmu/numa.o
CC arm-softmmu/hw/misc/omap_tap.o
CC aarch64-softmmu/hw/misc/exynos4210_clk.o
CC arm-softmmu/hw/misc/bcm2835_mbox.o
CC i386-softmmu/qtest.o
CC aarch64-softmmu/hw/misc/imx_ccm.o
CC arm-softmmu/hw/misc/bcm2835_property.o
CC aarch64-softmmu/hw/misc/imx31_ccm.o
CC lm32-softmmu/translate-all.o
CC i386-softmmu/bootdevice.o
CC arm-softmmu/hw/misc/bcm2835_rng.o
CC i386-softmmu/memory.o
CC aarch64-softmmu/hw/misc/imx25_ccm.o
CC arm-softmmu/hw/misc/zynq_slcr.o
CC aarch64-softmmu/hw/misc/imx6_ccm.o
CC lm32-softmmu/cpu-exec.o
CC arm-softmmu/hw/misc/zynq-xadc.o
CC aarch64-softmmu/hw/misc/imx6_src.o
CC aarch64-softmmu/hw/misc/mst_fpga.o
CC arm-softmmu/hw/misc/stm32f2xx_syscfg.o
CC lm32-softmmu/translate-common.o
CC aarch64-softmmu/hw/misc/omap_clk.o
CC i386-softmmu/cputlb.o
CC arm-softmmu/hw/misc/edu.o
CC lm32-softmmu/cpu-exec-common.o
CC aarch64-softmmu/hw/misc/omap_gpmc.o
CC lm32-softmmu/tcg/tcg.o
CC arm-softmmu/hw/misc/aspeed_scu.o
CC aarch64-softmmu/hw/misc/omap_l4.o
CC arm-softmmu/hw/misc/aspeed_sdmc.o
CC i386-softmmu/memory_mapping.o
CC aarch64-softmmu/hw/misc/omap_sdrc.o
CC arm-softmmu/hw/net/virtio-net.o
CC i386-softmmu/dump.o
CC aarch64-softmmu/hw/misc/omap_tap.o
CC aarch64-softmmu/hw/misc/bcm2835_mbox.o
CC lm32-softmmu/tcg/tcg-op.o
CC i386-softmmu/migration/ram.o
CC aarch64-softmmu/hw/misc/bcm2835_property.o
CC arm-softmmu/hw/net/vhost_net.o
CC aarch64-softmmu/hw/misc/bcm2835_rng.o
CC arm-softmmu/hw/pcmcia/pxa2xx.o
CC aarch64-softmmu/hw/misc/zynq_slcr.o
CC arm-softmmu/hw/scsi/virtio-scsi.o
CC i386-softmmu/migration/savevm.o
CC aarch64-softmmu/hw/misc/zynq-xadc.o
CC arm-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC aarch64-softmmu/hw/misc/stm32f2xx_syscfg.o
CC aarch64-softmmu/hw/misc/edu.o
CC arm-softmmu/hw/scsi/vhost-scsi.o
CC i386-softmmu/xen-common-stub.o
CC aarch64-softmmu/hw/misc/auxbus.o
CC lm32-softmmu/tcg/optimize.o
CC arm-softmmu/hw/sd/omap_mmc.o
CC i386-softmmu/xen-hvm-stub.o
CC aarch64-softmmu/hw/misc/aspeed_scu.o
CC arm-softmmu/hw/sd/pxa2xx_mmci.o
CC i386-softmmu/hw/9pfs/virtio-9p-device.o
CC aarch64-softmmu/hw/misc/aspeed_sdmc.o
CC lm32-softmmu/tcg/tcg-common.o
CC i386-softmmu/hw/block/virtio-blk.o
CC arm-softmmu/hw/sd/bcm2835_sdhost.o
CC lm32-softmmu/fpu/softfloat.o
CC aarch64-softmmu/hw/net/virtio-net.o
CC arm-softmmu/hw/ssi/omap_spi.o
CC i386-softmmu/hw/block/dataplane/virtio-blk.o
CC arm-softmmu/hw/ssi/imx_spi.o
CC i386-softmmu/hw/char/virtio-serial-bus.o
CC aarch64-softmmu/hw/net/vhost_net.o
CC arm-softmmu/hw/timer/exynos4210_mct.o
CC aarch64-softmmu/hw/pcmcia/pxa2xx.o
CC arm-softmmu/hw/timer/exynos4210_pwm.o
CC i386-softmmu/hw/core/nmi.o
CC aarch64-softmmu/hw/scsi/virtio-scsi.o
CC arm-softmmu/hw/timer/exynos4210_rtc.o
CC i386-softmmu/hw/core/generic-loader.o
CC aarch64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC i386-softmmu/hw/core/null-machine.o
CC arm-softmmu/hw/timer/omap_gptimer.o
CC aarch64-softmmu/hw/scsi/vhost-scsi.o
CC i386-softmmu/hw/cpu/core.o
CC arm-softmmu/hw/timer/omap_synctimer.o
CC lm32-softmmu/disas.o
CC i386-softmmu/hw/display/vga.o
CC aarch64-softmmu/hw/sd/omap_mmc.o
CC arm-softmmu/hw/timer/pxa2xx_timer.o
CC lm32-softmmu/tcg-runtime.o
CC aarch64-softmmu/hw/sd/pxa2xx_mmci.o
CC arm-softmmu/hw/timer/digic-timer.o
CC aarch64-softmmu/hw/sd/bcm2835_sdhost.o
CC lm32-softmmu/hax-stub.o
CC arm-softmmu/hw/timer/allwinner-a10-pit.o
CC i386-softmmu/hw/display/virtio-gpu.o
CC aarch64-softmmu/hw/ssi/omap_spi.o
CC arm-softmmu/hw/usb/tusb6010.o
CC lm32-softmmu/kvm-stub.o
CC lm32-softmmu/arch_init.o
CC arm-softmmu/hw/vfio/common.o
CC aarch64-softmmu/hw/ssi/imx_spi.o
CC lm32-softmmu/cpus.o
CC aarch64-softmmu/hw/timer/exynos4210_mct.o
CC i386-softmmu/hw/display/virtio-gpu-3d.o
CC arm-softmmu/hw/vfio/pci.o
CC aarch64-softmmu/hw/timer/exynos4210_pwm.o
CC i386-softmmu/hw/display/virtio-gpu-pci.o
CC lm32-softmmu/monitor.o
CC i386-softmmu/hw/display/virtio-vga.o
CC aarch64-softmmu/hw/timer/exynos4210_rtc.o
CC aarch64-softmmu/hw/timer/omap_gptimer.o
CC arm-softmmu/hw/vfio/pci-quirks.o
CC i386-softmmu/hw/intc/apic.o
CC aarch64-softmmu/hw/timer/omap_synctimer.o
CC aarch64-softmmu/hw/timer/pxa2xx_timer.o
CC lm32-softmmu/gdbstub.o
CC i386-softmmu/hw/intc/apic_common.o
CC arm-softmmu/hw/vfio/platform.o
CC aarch64-softmmu/hw/timer/digic-timer.o
CC aarch64-softmmu/hw/timer/allwinner-a10-pit.o
CC i386-softmmu/hw/intc/ioapic.o
CC arm-softmmu/hw/vfio/calxeda-xgmac.o
CC lm32-softmmu/balloon.o
CC arm-softmmu/hw/vfio/amd-xgbe.o
CC aarch64-softmmu/hw/usb/tusb6010.o
CC lm32-softmmu/ioport.o
CC i386-softmmu/hw/isa/lpc_ich9.o
CC arm-softmmu/hw/vfio/spapr.o
CC aarch64-softmmu/hw/vfio/common.o
CC lm32-softmmu/numa.o
CC i386-softmmu/hw/misc/vmport.o
CC arm-softmmu/hw/virtio/virtio.o
CC aarch64-softmmu/hw/vfio/pci.o
CC i386-softmmu/hw/misc/ivshmem.o
CC lm32-softmmu/qtest.o
CC i386-softmmu/hw/misc/pvpanic.o
CC arm-softmmu/hw/virtio/virtio-balloon.o
CC i386-softmmu/hw/misc/edu.o
CC lm32-softmmu/bootdevice.o
CC arm-softmmu/hw/virtio/vhost.o
CC aarch64-softmmu/hw/vfio/pci-quirks.o
CC lm32-softmmu/memory.o
CC i386-softmmu/hw/net/virtio-net.o
CC arm-softmmu/hw/virtio/vhost-backend.o
CC aarch64-softmmu/hw/vfio/platform.o
CC aarch64-softmmu/hw/vfio/calxeda-xgmac.o
CC arm-softmmu/hw/virtio/vhost-user.o
CC aarch64-softmmu/hw/vfio/amd-xgbe.o
CC i386-softmmu/hw/net/vhost_net.o
CC arm-softmmu/hw/virtio/vhost-vsock.o
CC aarch64-softmmu/hw/vfio/spapr.o
CC i386-softmmu/hw/scsi/virtio-scsi.o
CC lm32-softmmu/cputlb.o
CC arm-softmmu/hw/virtio/virtio-crypto.o
CC aarch64-softmmu/hw/virtio/virtio.o
CC arm-softmmu/hw/virtio/virtio-crypto-pci.o
CC i386-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC arm-softmmu/hw/arm/boot.o
CC i386-softmmu/hw/scsi/vhost-scsi.o
CC arm-softmmu/hw/arm/collie.o
CC i386-softmmu/hw/timer/mc146818rtc.o
CC aarch64-softmmu/hw/virtio/virtio-balloon.o
CC lm32-softmmu/memory_mapping.o
CC lm32-softmmu/dump.o
CC arm-softmmu/hw/arm/exynos4_boards.o
CC aarch64-softmmu/hw/virtio/vhost.o
CC i386-softmmu/hw/vfio/common.o
CC arm-softmmu/hw/arm/gumstix.o
CC arm-softmmu/hw/arm/highbank.o
CC lm32-softmmu/migration/ram.o
CC i386-softmmu/hw/vfio/pci.o
CC aarch64-softmmu/hw/virtio/vhost-backend.o
CC arm-softmmu/hw/arm/digic_boards.o
CC i386-softmmu/hw/vfio/pci-quirks.o
CC arm-softmmu/hw/arm/integratorcp.o
CC aarch64-softmmu/hw/virtio/vhost-user.o
CC lm32-softmmu/migration/savevm.o
CC aarch64-softmmu/hw/virtio/vhost-vsock.o
CC i386-softmmu/hw/vfio/platform.o
CC arm-softmmu/hw/arm/mainstone.o
CC aarch64-softmmu/hw/virtio/virtio-crypto.o
CC arm-softmmu/hw/arm/musicpal.o
CC aarch64-softmmu/hw/virtio/virtio-crypto-pci.o
CC i386-softmmu/hw/vfio/spapr.o
CC lm32-softmmu/xen-common-stub.o
CC aarch64-softmmu/hw/arm/boot.o
CC lm32-softmmu/xen-hvm-stub.o
CC i386-softmmu/hw/virtio/virtio.o
CC lm32-softmmu/hw/core/nmi.o
CC arm-softmmu/hw/arm/nseries.o
CC aarch64-softmmu/hw/arm/collie.o
CC lm32-softmmu/hw/core/generic-loader.o
CC aarch64-softmmu/hw/arm/exynos4_boards.o
CC lm32-softmmu/hw/core/null-machine.o
CC arm-softmmu/hw/arm/omap_sx1.o
CC i386-softmmu/hw/virtio/virtio-balloon.o
CC aarch64-softmmu/hw/arm/gumstix.o
CC lm32-softmmu/hw/cpu/core.o
CC aarch64-softmmu/hw/arm/highbank.o
CC i386-softmmu/hw/virtio/vhost.o
CC arm-softmmu/hw/arm/palm.o
CC lm32-softmmu/hw/input/milkymist-softusb.o
CC arm-softmmu/hw/arm/realview.o
CC aarch64-softmmu/hw/arm/digic_boards.o
CC i386-softmmu/hw/virtio/vhost-backend.o
CC arm-softmmu/hw/arm/spitz.o
CC lm32-softmmu/hw/misc/milkymist-hpdmc.o
CC aarch64-softmmu/hw/arm/integratorcp.o
CC i386-softmmu/hw/virtio/vhost-user.o
CC aarch64-softmmu/hw/arm/mainstone.o
CC lm32-softmmu/hw/misc/milkymist-pfpu.o
CC arm-softmmu/hw/arm/stellaris.o
CC aarch64-softmmu/hw/arm/musicpal.o
CC i386-softmmu/hw/virtio/vhost-vsock.o
CC lm32-softmmu/hw/net/milkymist-minimac2.o
CC i386-softmmu/hw/virtio/virtio-crypto.o
CC arm-softmmu/hw/arm/tosa.o
CC lm32-softmmu/hw/net/vhost_net.o
CC aarch64-softmmu/hw/arm/nseries.o
CC lm32-softmmu/hw/net/rocker/qmp-norocker.o
CC arm-softmmu/hw/arm/versatilepb.o
CC i386-softmmu/hw/virtio/virtio-crypto-pci.o
CC lm32-softmmu/hw/sd/milkymist-memcard.o
CC arm-softmmu/hw/arm/vexpress.o
CC aarch64-softmmu/hw/arm/omap_sx1.o
CC i386-softmmu/hw/i386/multiboot.o
CC lm32-softmmu/hw/vfio/common.o
CC arm-softmmu/hw/arm/virt.o
CC i386-softmmu/hw/i386/pc.o
CC aarch64-softmmu/hw/arm/palm.o
CC lm32-softmmu/hw/vfio/platform.o
CC arm-softmmu/hw/arm/xilinx_zynq.o
CC aarch64-softmmu/hw/arm/realview.o
CC arm-softmmu/hw/arm/z2.o
CC lm32-softmmu/hw/vfio/spapr.o
CC i386-softmmu/hw/i386/pc_piix.o
CC aarch64-softmmu/hw/arm/spitz.o
CC lm32-softmmu/hw/lm32/lm32_boards.o
CC arm-softmmu/hw/arm/virt-acpi-build.o
CC aarch64-softmmu/hw/arm/stellaris.o
CC i386-softmmu/hw/i386/pc_q35.o
CC lm32-softmmu/hw/lm32/milkymist.o
CC arm-softmmu/hw/arm/netduino2.o
CC aarch64-softmmu/hw/arm/tosa.o
CC arm-softmmu/hw/arm/sysbus-fdt.o
CC i386-softmmu/hw/i386/pc_sysfw.o
CC aarch64-softmmu/hw/arm/versatilepb.o
CC lm32-softmmu/target/lm32/translate.o
CC arm-softmmu/hw/arm/armv7m.o
CC i386-softmmu/hw/i386/x86-iommu.o
CC aarch64-softmmu/hw/arm/vexpress.o
CC i386-softmmu/hw/i386/intel_iommu.o
CC arm-softmmu/hw/arm/exynos4210.o
CC aarch64-softmmu/hw/arm/virt.o
CC lm32-softmmu/target/lm32/op_helper.o
CC arm-softmmu/hw/arm/pxa2xx.o
CC lm32-softmmu/target/lm32/helper.o
CC aarch64-softmmu/hw/arm/xilinx_zynq.o
CC lm32-softmmu/target/lm32/cpu.o
CC i386-softmmu/hw/i386/amd_iommu.o
CC aarch64-softmmu/hw/arm/z2.o
CC lm32-softmmu/target/lm32/gdbstub.o
CC lm32-softmmu/target/lm32/lm32-semi.o
CC arm-softmmu/hw/arm/pxa2xx_gpio.o
CC i386-softmmu/hw/i386/kvmvapic.o
CC aarch64-softmmu/hw/arm/virt-acpi-build.o
CC lm32-softmmu/target/lm32/machine.o
CC arm-softmmu/hw/arm/pxa2xx_pic.o
CC i386-softmmu/hw/i386/acpi-build.o
GEN trace/generated-helpers.c
CC aarch64-softmmu/hw/arm/netduino2.o
CC lm32-softmmu/trace/control-target.o
CC arm-softmmu/hw/arm/digic.o
CC aarch64-softmmu/hw/arm/sysbus-fdt.o
CC lm32-softmmu/trace/generated-helpers.o
CC arm-softmmu/hw/arm/omap1.o
LINK lm32-softmmu/qemu-system-lm32
CC aarch64-softmmu/hw/arm/armv7m.o
CC i386-softmmu/hw/i386/pci-assign-load-rom.o
CC aarch64-softmmu/hw/arm/exynos4210.o
CC arm-softmmu/hw/arm/omap2.o
CC i386-softmmu/target/i386/translate.o
CC aarch64-softmmu/hw/arm/pxa2xx.o
CC arm-softmmu/hw/arm/strongarm.o
GEN m68k-softmmu/hmp-commands.h
GEN m68k-softmmu/hmp-commands-info.h
CC aarch64-softmmu/hw/arm/pxa2xx_gpio.o
GEN m68k-softmmu/config-target.h
CC m68k-softmmu/exec.o
CC aarch64-softmmu/hw/arm/pxa2xx_pic.o
CC arm-softmmu/hw/arm/allwinner-a10.o
CC aarch64-softmmu/hw/arm/digic.o
CC arm-softmmu/hw/arm/cubieboard.o
CC aarch64-softmmu/hw/arm/omap1.o
CC arm-softmmu/hw/arm/bcm2835_peripherals.o
CC arm-softmmu/hw/arm/bcm2836.o
CC m68k-softmmu/translate-all.o
CC arm-softmmu/hw/arm/raspi.o
CC aarch64-softmmu/hw/arm/omap2.o
CC m68k-softmmu/cpu-exec.o
CC arm-softmmu/hw/arm/stm32f205_soc.o
CC m68k-softmmu/translate-common.o
CC aarch64-softmmu/hw/arm/strongarm.o
CC arm-softmmu/hw/arm/fsl-imx25.o
CC m68k-softmmu/cpu-exec-common.o
CC arm-softmmu/hw/arm/imx25_pdk.o
CC m68k-softmmu/tcg/tcg.o
CC aarch64-softmmu/hw/arm/allwinner-a10.o
CC arm-softmmu/hw/arm/fsl-imx31.o
CC arm-softmmu/hw/arm/kzm.o
CC aarch64-softmmu/hw/arm/cubieboard.o
CC arm-softmmu/hw/arm/fsl-imx6.o
CC aarch64-softmmu/hw/arm/bcm2835_peripherals.o
CC i386-softmmu/target/i386/helper.o
CC arm-softmmu/hw/arm/sabrelite.o
CC aarch64-softmmu/hw/arm/bcm2836.o
CC m68k-softmmu/tcg/tcg-op.o
CC i386-softmmu/target/i386/cpu.o
CC arm-softmmu/hw/arm/aspeed_soc.o
CC aarch64-softmmu/hw/arm/raspi.o
CC arm-softmmu/hw/arm/aspeed.o
CC i386-softmmu/target/i386/bpt_helper.o
CC arm-softmmu/target/arm/arm-semi.o
CC aarch64-softmmu/hw/arm/stm32f205_soc.o
CC i386-softmmu/target/i386/excp_helper.o
CC arm-softmmu/target/arm/machine.o
CC aarch64-softmmu/hw/arm/xlnx-zynqmp.o
CC arm-softmmu/target/arm/psci.o
CC i386-softmmu/target/i386/fpu_helper.o
CC aarch64-softmmu/hw/arm/xlnx-ep108.o
CC arm-softmmu/target/arm/arch_dump.o
CC m68k-softmmu/tcg/optimize.o
CC arm-softmmu/target/arm/monitor.o
CC aarch64-softmmu/hw/arm/fsl-imx25.o
CC arm-softmmu/target/arm/kvm-stub.o
CC aarch64-softmmu/hw/arm/imx25_pdk.o
CC arm-softmmu/target/arm/translate.o
CC aarch64-softmmu/hw/arm/fsl-imx31.o
CC m68k-softmmu/tcg/tcg-common.o
CC aarch64-softmmu/hw/arm/kzm.o
CC m68k-softmmu/fpu/softfloat.o
CC aarch64-softmmu/hw/arm/fsl-imx6.o
CC aarch64-softmmu/hw/arm/sabrelite.o
CC aarch64-softmmu/hw/arm/aspeed_soc.o
CC i386-softmmu/target/i386/cc_helper.o
CC aarch64-softmmu/hw/arm/aspeed.o
CC i386-softmmu/target/i386/int_helper.o
CC aarch64-softmmu/target/arm/arm-semi.o
CC i386-softmmu/target/i386/svm_helper.o
CC aarch64-softmmu/target/arm/machine.o
CC m68k-softmmu/disas.o
CC i386-softmmu/target/i386/smm_helper.o
CC aarch64-softmmu/target/arm/psci.o
CC m68k-softmmu/tcg-runtime.o
CC i386-softmmu/target/i386/misc_helper.o
GEN m68k-softmmu/gdbstub-xml.c
CC aarch64-softmmu/target/arm/arch_dump.o
CC i386-softmmu/target/i386/mem_helper.o
CC m68k-softmmu/hax-stub.o
CC aarch64-softmmu/target/arm/monitor.o
CC m68k-softmmu/kvm-stub.o
CC i386-softmmu/target/i386/seg_helper.o
CC aarch64-softmmu/target/arm/kvm-stub.o
CC m68k-softmmu/arch_init.o
CC aarch64-softmmu/target/arm/translate.o
CC m68k-softmmu/cpus.o
CC arm-softmmu/target/arm/op_helper.o
CC m68k-softmmu/monitor.o
CC arm-softmmu/target/arm/helper.o
CC i386-softmmu/target/i386/mpx_helper.o
CC m68k-softmmu/gdbstub.o
CC i386-softmmu/target/i386/gdbstub.o
CC i386-softmmu/target/i386/machine.o
CC m68k-softmmu/balloon.o
CC m68k-softmmu/ioport.o
CC i386-softmmu/target/i386/arch_memory_mapping.o
CC m68k-softmmu/numa.o
CC i386-softmmu/target/i386/arch_dump.o
CC m68k-softmmu/qtest.o
CC i386-softmmu/target/i386/monitor.o
CC arm-softmmu/target/arm/cpu.o
CC m68k-softmmu/bootdevice.o
CC i386-softmmu/target/i386/kvm-stub.o
CC arm-softmmu/target/arm/neon_helper.o
CC m68k-softmmu/memory.o
GEN trace/generated-helpers.c
CC i386-softmmu/trace/control-target.o
CC aarch64-softmmu/target/arm/op_helper.o
CC i386-softmmu/trace/generated-helpers.o
LINK i386-softmmu/qemu-system-i386
CC arm-softmmu/target/arm/iwmmxt_helper.o
CC m68k-softmmu/cputlb.o
CC aarch64-softmmu/target/arm/helper.o
CC arm-softmmu/target/arm/gdbstub.o
CC arm-softmmu/target/arm/crypto_helper.o
CC m68k-softmmu/memory_mapping.o
GEN microblazeel-softmmu/hmp-commands.h
GEN microblazeel-softmmu/hmp-commands-info.h
CC arm-softmmu/target/arm/arm-powerctl.o
GEN microblazeel-softmmu/config-target.h
CC microblazeel-softmmu/exec.o
CC m68k-softmmu/dump.o
GEN trace/generated-helpers.c
CC arm-softmmu/trace/control-target.o
CC arm-softmmu/gdbstub-xml.o
CC m68k-softmmu/migration/ram.o
CC arm-softmmu/trace/generated-helpers.o
CC aarch64-softmmu/target/arm/cpu.o
CC m68k-softmmu/migration/savevm.o
LINK arm-softmmu/qemu-system-arm
CC microblazeel-softmmu/translate-all.o
CC aarch64-softmmu/target/arm/neon_helper.o
CC microblazeel-softmmu/cpu-exec.o
CC m68k-softmmu/xen-common-stub.o
CC microblazeel-softmmu/translate-common.o
CC m68k-softmmu/xen-hvm-stub.o
CC m68k-softmmu/hw/char/mcf_uart.o
CC microblazeel-softmmu/cpu-exec-common.o
CC aarch64-softmmu/target/arm/iwmmxt_helper.o
CC microblazeel-softmmu/tcg/tcg.o
CC m68k-softmmu/hw/core/nmi.o
CC m68k-softmmu/hw/core/generic-loader.o
CC aarch64-softmmu/target/arm/gdbstub.o
CC m68k-softmmu/hw/core/null-machine.o
GEN microblaze-softmmu/hmp-commands.h
CC m68k-softmmu/hw/cpu/core.o
GEN microblaze-softmmu/hmp-commands-info.h
CC aarch64-softmmu/target/arm/cpu64.o
GEN microblaze-softmmu/config-target.h
CC microblaze-softmmu/exec.o
CC m68k-softmmu/hw/net/mcf_fec.o
CC aarch64-softmmu/target/arm/translate-a64.o
CC m68k-softmmu/hw/net/vhost_net.o
CC microblazeel-softmmu/tcg/tcg-op.o
CC m68k-softmmu/hw/net/rocker/qmp-norocker.o
CC m68k-softmmu/hw/vfio/common.o
CC microblaze-softmmu/translate-all.o
CC m68k-softmmu/hw/vfio/platform.o
CC microblazeel-softmmu/tcg/optimize.o
CC m68k-softmmu/hw/vfio/spapr.o
CC microblaze-softmmu/cpu-exec.o
CC m68k-softmmu/hw/m68k/an5206.o
CC microblaze-softmmu/translate-common.o
CC m68k-softmmu/hw/m68k/mcf5208.o
CC microblaze-softmmu/cpu-exec-common.o
CC microblaze-softmmu/tcg/tcg.o
CC m68k-softmmu/hw/m68k/mcf5206.o
CC microblazeel-softmmu/tcg/tcg-common.o
CC microblazeel-softmmu/fpu/softfloat.o
CC m68k-softmmu/hw/m68k/mcf_intc.o
CC aarch64-softmmu/target/arm/helper-a64.o
CC m68k-softmmu/target/m68k/m68k-semi.o
CC aarch64-softmmu/target/arm/gdbstub64.o
CC m68k-softmmu/target/m68k/translate.o
CC aarch64-softmmu/target/arm/crypto_helper.o
CC microblaze-softmmu/tcg/tcg-op.o
CC aarch64-softmmu/target/arm/arm-powerctl.o
GEN trace/generated-helpers.c
CC aarch64-softmmu/trace/control-target.o
CC aarch64-softmmu/gdbstub-xml.o
CC microblazeel-softmmu/disas.o
CC aarch64-softmmu/trace/generated-helpers.o
CC m68k-softmmu/target/m68k/op_helper.o
CC microblazeel-softmmu/tcg-runtime.o
LINK aarch64-softmmu/qemu-system-aarch64
CC microblazeel-softmmu/hax-stub.o
CC microblaze-softmmu/tcg/optimize.o
CC m68k-softmmu/target/m68k/helper.o
CC microblazeel-softmmu/kvm-stub.o
CC microblazeel-softmmu/arch_init.o
CC m68k-softmmu/target/m68k/cpu.o
CC microblazeel-softmmu/cpus.o
CC microblaze-softmmu/tcg/tcg-common.o
CC m68k-softmmu/target/m68k/gdbstub.o
CC microblaze-softmmu/fpu/softfloat.o
GEN trace/generated-helpers.c
CC m68k-softmmu/trace/control-target.o
CC microblazeel-softmmu/monitor.o
CC m68k-softmmu/gdbstub-xml.o
CC m68k-softmmu/trace/generated-helpers.o
LINK m68k-softmmu/qemu-system-m68k
GEN mips64el-softmmu/hmp-commands.h
CC microblazeel-softmmu/gdbstub.o
GEN mips64el-softmmu/hmp-commands-info.h
GEN mips64el-softmmu/config-target.h
CC mips64el-softmmu/exec.o
CC microblazeel-softmmu/balloon.o
CC microblazeel-softmmu/ioport.o
CC microblaze-softmmu/disas.o
CC microblazeel-softmmu/numa.o
CC microblaze-softmmu/tcg-runtime.o
CC microblazeel-softmmu/qtest.o
CC microblaze-softmmu/hax-stub.o
CC mips64el-softmmu/translate-all.o
CC microblaze-softmmu/kvm-stub.o
CC microblazeel-softmmu/bootdevice.o
CC microblaze-softmmu/arch_init.o
CC microblazeel-softmmu/memory.o
CC mips64el-softmmu/cpu-exec.o
CC microblaze-softmmu/cpus.o
CC mips64el-softmmu/translate-common.o
CC mips64el-softmmu/cpu-exec-common.o
GEN mips64-softmmu/hmp-commands.h
GEN mips64-softmmu/hmp-commands-info.h
GEN mips64-softmmu/config-target.h
CC mips64-softmmu/exec.o
CC microblaze-softmmu/monitor.o
CC mips64el-softmmu/tcg/tcg.o
CC microblazeel-softmmu/cputlb.o
CC microblaze-softmmu/gdbstub.o
CC mips64-softmmu/translate-all.o
CC microblazeel-softmmu/memory_mapping.o
CC microblaze-softmmu/balloon.o
CC mips64el-softmmu/tcg/tcg-op.o
CC microblazeel-softmmu/dump.o
CC mips64-softmmu/cpu-exec.o
CC microblaze-softmmu/ioport.o
CC mips64-softmmu/translate-common.o
CC microblaze-softmmu/numa.o
CC microblazeel-softmmu/migration/ram.o
CC mips64-softmmu/cpu-exec-common.o
CC microblaze-softmmu/qtest.o
CC mips64-softmmu/tcg/tcg.o
CC microblaze-softmmu/bootdevice.o
CC microblaze-softmmu/memory.o
CC microblazeel-softmmu/migration/savevm.o
CC mips64el-softmmu/tcg/optimize.o
CC microblazeel-softmmu/xen-common-stub.o
CC microblaze-softmmu/cputlb.o
CC microblazeel-softmmu/xen-hvm-stub.o
CC mips64-softmmu/tcg/tcg-op.o
CC microblazeel-softmmu/hw/core/nmi.o
CC microblazeel-softmmu/hw/core/generic-loader.o
CC microblazeel-softmmu/hw/core/null-machine.o
CC mips64el-softmmu/tcg/tcg-common.o
CC microblazeel-softmmu/hw/cpu/core.o
CC mips64el-softmmu/fpu/softfloat.o
CC microblazeel-softmmu/hw/net/xilinx_ethlite.o
CC microblaze-softmmu/memory_mapping.o
CC microblaze-softmmu/dump.o
CC microblazeel-softmmu/hw/net/vhost_net.o
CC microblazeel-softmmu/hw/net/rocker/qmp-norocker.o
CC microblaze-softmmu/migration/ram.o
CC microblazeel-softmmu/hw/vfio/common.o
CC mips64-softmmu/tcg/optimize.o
CC microblazeel-softmmu/hw/vfio/platform.o
CC microblaze-softmmu/migration/savevm.o
CC microblazeel-softmmu/hw/vfio/spapr.o
CC mips64el-softmmu/disas.o
CC microblazeel-softmmu/hw/microblaze/petalogix_s3adsp1800_mmu.o
CC mips64-softmmu/tcg/tcg-common.o
CC mips64el-softmmu/tcg-runtime.o
CC microblaze-softmmu/xen-common-stub.o
CC microblazeel-softmmu/hw/microblaze/petalogix_ml605_mmu.o
CC mips64-softmmu/fpu/softfloat.o
CC microblaze-softmmu/xen-hvm-stub.o
CC mips64el-softmmu/hax-stub.o
CC microblaze-softmmu/hw/core/nmi.o
CC microblazeel-softmmu/hw/microblaze/boot.o
CC microblaze-softmmu/hw/core/generic-loader.o
CC mips64el-softmmu/kvm-stub.o
CC microblazeel-softmmu/target/microblaze/translate.o
CC microblaze-softmmu/hw/core/null-machine.o
CC mips64el-softmmu/arch_init.o
CC microblaze-softmmu/hw/cpu/core.o
CC mips64el-softmmu/cpus.o
CC microblaze-softmmu/hw/net/xilinx_ethlite.o
CC microblazeel-softmmu/target/microblaze/op_helper.o
CC microblaze-softmmu/hw/net/vhost_net.o
CC mips64el-softmmu/monitor.o
CC microblaze-softmmu/hw/net/rocker/qmp-norocker.o
CC microblazeel-softmmu/target/microblaze/helper.o
CC microblaze-softmmu/hw/vfio/common.o
CC mips64-softmmu/disas.o
CC microblazeel-softmmu/target/microblaze/cpu.o
CC mips64-softmmu/tcg-runtime.o
CC microblazeel-softmmu/target/microblaze/gdbstub.o
CC microblaze-softmmu/hw/vfio/platform.o
CC mips64-softmmu/hax-stub.o
CC mips64el-softmmu/gdbstub.o
CC microblazeel-softmmu/target/microblaze/mmu.o
CC mips64-softmmu/kvm-stub.o
CC microblaze-softmmu/hw/vfio/spapr.o
GEN trace/generated-helpers.c
CC microblazeel-softmmu/trace/control-target.o
CC mips64el-softmmu/balloon.o
CC microblaze-softmmu/hw/microblaze/petalogix_s3adsp1800_mmu.o
CC mips64-softmmu/arch_init.o
CC microblazeel-softmmu/trace/generated-helpers.o
CC mips64el-softmmu/ioport.o
CC microblaze-softmmu/hw/microblaze/petalogix_ml605_mmu.o
CC mips64-softmmu/cpus.o
LINK microblazeel-softmmu/qemu-system-microblazeel
CC microblaze-softmmu/hw/microblaze/boot.o
CC mips64el-softmmu/numa.o
CC microblaze-softmmu/target/microblaze/translate.o
CC mips64-softmmu/monitor.o
CC mips64el-softmmu/qtest.o
CC mips64el-softmmu/bootdevice.o
CC microblaze-softmmu/target/microblaze/op_helper.o
CC microblaze-softmmu/target/microblaze/helper.o
CC mips64el-softmmu/memory.o
CC microblaze-softmmu/target/microblaze/cpu.o
CC microblaze-softmmu/target/microblaze/gdbstub.o
CC mips64-softmmu/gdbstub.o
CC microblaze-softmmu/target/microblaze/mmu.o
CC mips64el-softmmu/cputlb.o
GEN mipsel-softmmu/hmp-commands.h
GEN trace/generated-helpers.c
CC microblaze-softmmu/trace/control-target.o
GEN mipsel-softmmu/hmp-commands-info.h
GEN mipsel-softmmu/config-target.h
CC mips64-softmmu/balloon.o
CC mipsel-softmmu/exec.o
CC mips64-softmmu/ioport.o
CC microblaze-softmmu/trace/generated-helpers.o
LINK microblaze-softmmu/qemu-system-microblaze
CC mips64-softmmu/numa.o
CC mips64el-softmmu/memory_mapping.o
CC mips64-softmmu/qtest.o
CC mips64el-softmmu/dump.o
CC mips64-softmmu/bootdevice.o
CC mips64el-softmmu/migration/ram.o
CC mips64-softmmu/memory.o
CC mips64el-softmmu/migration/savevm.o
CC mipsel-softmmu/translate-all.o
CC mipsel-softmmu/cpu-exec.o
CC mips64-softmmu/cputlb.o
CC mips64el-softmmu/xen-common-stub.o
CC mipsel-softmmu/translate-common.o
CC mips64el-softmmu/xen-hvm-stub.o
GEN mips-softmmu/hmp-commands.h
CC mipsel-softmmu/cpu-exec-common.o
CC mips64el-softmmu/hw/9pfs/virtio-9p-device.o
GEN mips-softmmu/hmp-commands-info.h
GEN mips-softmmu/config-target.h
CC mips-softmmu/exec.o
CC mips64el-softmmu/hw/block/virtio-blk.o
CC mipsel-softmmu/tcg/tcg.o
CC mips64-softmmu/memory_mapping.o
CC mips64el-softmmu/hw/block/dataplane/virtio-blk.o
CC mips64-softmmu/dump.o
CC mips64el-softmmu/hw/char/virtio-serial-bus.o
CC mips64-softmmu/migration/ram.o
CC mips64el-softmmu/hw/core/nmi.o
CC mips-softmmu/translate-all.o
CC mips64el-softmmu/hw/core/generic-loader.o
CC mipsel-softmmu/tcg/tcg-op.o
CC mips64-softmmu/migration/savevm.o
CC mips64el-softmmu/hw/core/null-machine.o
CC mips64el-softmmu/hw/cpu/core.o
CC mips-softmmu/cpu-exec.o
CC mips64el-softmmu/hw/display/vga.o
CC mips-softmmu/translate-common.o
CC mips64-softmmu/xen-common-stub.o
CC mips-softmmu/cpu-exec-common.o
CC mips64-softmmu/xen-hvm-stub.o
CC mips-softmmu/tcg/tcg.o
CC mips64el-softmmu/hw/display/virtio-gpu.o
CC mips64-softmmu/hw/9pfs/virtio-9p-device.o
CC mips64-softmmu/hw/block/virtio-blk.o
CC mipsel-softmmu/tcg/optimize.o
CC mips64-softmmu/hw/block/dataplane/virtio-blk.o
CC mips64el-softmmu/hw/display/virtio-gpu-3d.o
CC mips64-softmmu/hw/char/virtio-serial-bus.o
CC mips64-softmmu/hw/core/nmi.o
CC mips64el-softmmu/hw/display/virtio-gpu-pci.o
CC mipsel-softmmu/tcg/tcg-common.o
CC mips-softmmu/tcg/tcg-op.o
CC mips64-softmmu/hw/core/generic-loader.o
CC mipsel-softmmu/fpu/softfloat.o
CC mips64-softmmu/hw/core/null-machine.o
CC mips64el-softmmu/hw/intc/mips_gic.o
CC mips64-softmmu/hw/cpu/core.o
CC mips64el-softmmu/hw/misc/ivshmem.o
CC mips64-softmmu/hw/display/vga.o
CC mips64el-softmmu/hw/misc/mips_cmgcr.o
CC mips64el-softmmu/hw/misc/mips_cpc.o
CC mips64-softmmu/hw/display/virtio-gpu.o
CC mips64el-softmmu/hw/misc/mips_itu.o
CC mips-softmmu/tcg/optimize.o
CC mipsel-softmmu/disas.o
CC mips64el-softmmu/hw/misc/edu.o
CC mipsel-softmmu/tcg-runtime.o
CC mips64-softmmu/hw/display/virtio-gpu-3d.o
CC mips64el-softmmu/hw/net/virtio-net.o
CC mipsel-softmmu/hax-stub.o
CC mips-softmmu/tcg/tcg-common.o
CC mipsel-softmmu/kvm-stub.o
CC mips-softmmu/fpu/softfloat.o
CC mips64el-softmmu/hw/net/vhost_net.o
CC mips64-softmmu/hw/display/virtio-gpu-pci.o
CC mipsel-softmmu/arch_init.o
CC mips64el-softmmu/hw/scsi/virtio-scsi.o
CC mips64-softmmu/hw/intc/mips_gic.o
CC mips64-softmmu/hw/misc/ivshmem.o
CC mipsel-softmmu/cpus.o
CC mips64el-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC mips64el-softmmu/hw/scsi/vhost-scsi.o
CC mips64-softmmu/hw/misc/mips_cmgcr.o
CC mipsel-softmmu/monitor.o
CC mips64el-softmmu/hw/timer/mips_gictimer.o
CC mips64el-softmmu/hw/timer/mc146818rtc.o
CC mips64-softmmu/hw/misc/mips_cpc.o
CC mips64-softmmu/hw/misc/mips_itu.o
CC mips64el-softmmu/hw/vfio/common.o
CC mips-softmmu/disas.o
CC mips64-softmmu/hw/misc/edu.o
CC mipsel-softmmu/gdbstub.o
CC mips-softmmu/tcg-runtime.o
CC mips64-softmmu/hw/net/virtio-net.o
CC mips64el-softmmu/hw/vfio/pci.o
CC mips-softmmu/hax-stub.o
CC mipsel-softmmu/balloon.o
CC mips-softmmu/kvm-stub.o
CC mips64-softmmu/hw/net/vhost_net.o
CC mipsel-softmmu/ioport.o
CC mips-softmmu/arch_init.o
CC mips64el-softmmu/hw/vfio/pci-quirks.o
CC mips64-softmmu/hw/scsi/virtio-scsi.o
CC mipsel-softmmu/numa.o
CC mips-softmmu/cpus.o
CC mipsel-softmmu/qtest.o
CC mips64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC mips64el-softmmu/hw/vfio/platform.o
CC mips-softmmu/monitor.o
CC mips64-softmmu/hw/scsi/vhost-scsi.o
CC mips64el-softmmu/hw/vfio/spapr.o
CC mipsel-softmmu/bootdevice.o
CC mips64-softmmu/hw/timer/mips_gictimer.o
CC mipsel-softmmu/memory.o
CC mips64el-softmmu/hw/virtio/virtio.o
CC mips64-softmmu/hw/timer/mc146818rtc.o
CC mips-softmmu/gdbstub.o
CC mips64-softmmu/hw/vfio/common.o
CC mips64el-softmmu/hw/virtio/virtio-balloon.o
CC mipsel-softmmu/cputlb.o
CC mips64-softmmu/hw/vfio/pci.o
CC mips64el-softmmu/hw/virtio/vhost.o
CC mips-softmmu/balloon.o
CC mips-softmmu/ioport.o
CC mips64el-softmmu/hw/virtio/vhost-backend.o
CC mips-softmmu/numa.o
CC mips64-softmmu/hw/vfio/pci-quirks.o
CC mips64el-softmmu/hw/virtio/vhost-user.o
CC mipsel-softmmu/memory_mapping.o
CC mips-softmmu/qtest.o
CC mipsel-softmmu/dump.o
CC mips64el-softmmu/hw/virtio/vhost-vsock.o
CC mips64-softmmu/hw/vfio/platform.o
CC mips-softmmu/bootdevice.o
CC mips64-softmmu/hw/vfio/spapr.o
CC mips64el-softmmu/hw/virtio/virtio-crypto.o
CC mips-softmmu/memory.o
CC mipsel-softmmu/migration/ram.o
CC mips64-softmmu/hw/virtio/virtio.o
CC mips64el-softmmu/hw/virtio/virtio-crypto-pci.o
CC mipsel-softmmu/migration/savevm.o
CC mips64el-softmmu/hw/mips/mips_r4k.o
CC mips-softmmu/cputlb.o
CC mips64-softmmu/hw/virtio/virtio-balloon.o
CC mips64el-softmmu/hw/mips/mips_malta.o
CC mips64-softmmu/hw/virtio/vhost.o
CC mipsel-softmmu/xen-common-stub.o
CC mips64el-softmmu/hw/mips/mips_mipssim.o
CC mipsel-softmmu/xen-hvm-stub.o
CC mips64-softmmu/hw/virtio/vhost-backend.o
CC mips64el-softmmu/hw/mips/addr.o
CC mipsel-softmmu/hw/9pfs/virtio-9p-device.o
CC mips64-softmmu/hw/virtio/vhost-user.o
CC mips-softmmu/memory_mapping.o
CC mips64el-softmmu/hw/mips/cputimer.o
CC mips64el-softmmu/hw/mips/mips_int.o
CC mips-softmmu/dump.o
CC mipsel-softmmu/hw/block/virtio-blk.o
CC mips64-softmmu/hw/virtio/vhost-vsock.o
CC mips64el-softmmu/hw/mips/mips_jazz.o
CC mipsel-softmmu/hw/block/dataplane/virtio-blk.o
CC mips64-softmmu/hw/virtio/virtio-crypto.o
CC mips-softmmu/migration/ram.o
CC mips64el-softmmu/hw/mips/mips_fulong2e.o
CC mipsel-softmmu/hw/char/virtio-serial-bus.o
CC mips64el-softmmu/hw/mips/gt64xxx_pci.o
CC mips64-softmmu/hw/virtio/virtio-crypto-pci.o
CC mips64el-softmmu/hw/mips/cps.o
CC mips64-softmmu/hw/mips/mips_r4k.o
CC mips-softmmu/migration/savevm.o
CC mipsel-softmmu/hw/core/nmi.o
CC mips64el-softmmu/hw/mips/boston.o
CC mipsel-softmmu/hw/core/generic-loader.o
CC mips64-softmmu/hw/mips/mips_malta.o
CC mips64el-softmmu/target/mips/translate.o
CC mipsel-softmmu/hw/core/null-machine.o
CC mips64-softmmu/hw/mips/mips_mipssim.o
CC mips-softmmu/xen-common-stub.o
CC mips64-softmmu/hw/mips/addr.o
CC mipsel-softmmu/hw/cpu/core.o
CC mips-softmmu/xen-hvm-stub.o
CC mipsel-softmmu/hw/display/vga.o
CC mips64-softmmu/hw/mips/cputimer.o
CC mips-softmmu/hw/9pfs/virtio-9p-device.o
CC mips64-softmmu/hw/mips/mips_int.o
CC mips-softmmu/hw/block/virtio-blk.o
CC mipsel-softmmu/hw/display/virtio-gpu.o
CC mips64-softmmu/hw/mips/mips_jazz.o
CC mips-softmmu/hw/block/dataplane/virtio-blk.o
CC mipsel-softmmu/hw/display/virtio-gpu-3d.o
CC mips64-softmmu/hw/mips/gt64xxx_pci.o
CC mips64-softmmu/hw/mips/cps.o
CC mips-softmmu/hw/char/virtio-serial-bus.o
CC mips64-softmmu/target/mips/translate.o
CC mipsel-softmmu/hw/display/virtio-gpu-pci.o
CC mips-softmmu/hw/core/nmi.o
CC mips-softmmu/hw/core/generic-loader.o
CC mipsel-softmmu/hw/intc/mips_gic.o
CC mips-softmmu/hw/core/null-machine.o
CC mipsel-softmmu/hw/misc/ivshmem.o
CC mips-softmmu/hw/cpu/core.o
CC mipsel-softmmu/hw/misc/mips_cmgcr.o
CC mips-softmmu/hw/display/vga.o
CC mipsel-softmmu/hw/misc/mips_cpc.o
CC mipsel-softmmu/hw/misc/mips_itu.o
CC mips-softmmu/hw/display/virtio-gpu.o
CC mipsel-softmmu/hw/misc/edu.o
CC mips64el-softmmu/target/mips/dsp_helper.o
CC mipsel-softmmu/hw/net/virtio-net.o
CC mips-softmmu/hw/display/virtio-gpu-3d.o
CC mipsel-softmmu/hw/net/vhost_net.o
CC mips-softmmu/hw/display/virtio-gpu-pci.o
CC mipsel-softmmu/hw/scsi/virtio-scsi.o
CC mips64el-softmmu/target/mips/op_helper.o
CC mipsel-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC mips-softmmu/hw/intc/mips_gic.o
CC mipsel-softmmu/hw/scsi/vhost-scsi.o
CC mips-softmmu/hw/misc/ivshmem.o
CC mipsel-softmmu/hw/timer/mips_gictimer.o
CC mipsel-softmmu/hw/timer/mc146818rtc.o
CC mips-softmmu/hw/misc/mips_cmgcr.o
CC mipsel-softmmu/hw/vfio/common.o
CC mips-softmmu/hw/misc/mips_cpc.o
CC mips64-softmmu/target/mips/dsp_helper.o
CC mips-softmmu/hw/misc/mips_itu.o
CC mipsel-softmmu/hw/vfio/pci.o
CC mips64el-softmmu/target/mips/lmi_helper.o
CC mips-softmmu/hw/misc/edu.o
CC mips64el-softmmu/target/mips/helper.o
CC mips-softmmu/hw/net/virtio-net.o
CC mipsel-softmmu/hw/vfio/pci-quirks.o
CC mips64el-softmmu/target/mips/cpu.o
CC mips64-softmmu/target/mips/op_helper.o
CC mips64el-softmmu/target/mips/gdbstub.o
CC mips-softmmu/hw/net/vhost_net.o
CC mipsel-softmmu/hw/vfio/platform.o
CC mips64el-softmmu/target/mips/msa_helper.o
CC mips-softmmu/hw/scsi/virtio-scsi.o
CC mipsel-softmmu/hw/vfio/spapr.o
CC mips-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC mipsel-softmmu/hw/virtio/virtio.o
CC mips-softmmu/hw/scsi/vhost-scsi.o
CC mips-softmmu/hw/timer/mips_gictimer.o
CC mips-softmmu/hw/timer/mc146818rtc.o
CC mipsel-softmmu/hw/virtio/virtio-balloon.o
CC mips64-softmmu/target/mips/lmi_helper.o
CC mips-softmmu/hw/vfio/common.o
CC mipsel-softmmu/hw/virtio/vhost.o
CC mips64-softmmu/target/mips/helper.o
CC mips-softmmu/hw/vfio/pci.o
CC mipsel-softmmu/hw/virtio/vhost-backend.o
CC mips64-softmmu/target/mips/cpu.o
CC mips64-softmmu/target/mips/gdbstub.o
CC mipsel-softmmu/hw/virtio/vhost-user.o
CC mips64-softmmu/target/mips/msa_helper.o
CC mips64el-softmmu/target/mips/mips-semi.o
CC mipsel-softmmu/hw/virtio/vhost-vsock.o
CC mips-softmmu/hw/vfio/pci-quirks.o
CC mipsel-softmmu/hw/virtio/virtio-crypto.o
CC mips64el-softmmu/target/mips/machine.o
CC mips-softmmu/hw/vfio/platform.o
GEN trace/generated-helpers.c
CC mips64el-softmmu/trace/control-target.o
CC mipsel-softmmu/hw/virtio/virtio-crypto-pci.o
CC mips-softmmu/hw/vfio/spapr.o
CC mipsel-softmmu/hw/mips/mips_r4k.o
CC mips64el-softmmu/trace/generated-helpers.o
CC mips-softmmu/hw/virtio/virtio.o
CC mipsel-softmmu/hw/mips/mips_malta.o
LINK mips64el-softmmu/qemu-system-mips64el
CC mipsel-softmmu/hw/mips/mips_mipssim.o
CC mips-softmmu/hw/virtio/virtio-balloon.o
CC mipsel-softmmu/hw/mips/addr.o
CC mipsel-softmmu/hw/mips/cputimer.o
CC mips-softmmu/hw/virtio/vhost.o
CC mipsel-softmmu/hw/mips/mips_int.o
CC mipsel-softmmu/hw/mips/gt64xxx_pci.o
CC mips64-softmmu/target/mips/mips-semi.o
CC mipsel-softmmu/hw/mips/cps.o
CC mips-softmmu/hw/virtio/vhost-backend.o
CC mips-softmmu/hw/virtio/vhost-user.o
CC mips64-softmmu/target/mips/machine.o
CC mipsel-softmmu/target/mips/translate.o
CC mipsel-softmmu/target/mips/dsp_helper.o
GEN trace/generated-helpers.c
CC mips-softmmu/hw/virtio/vhost-vsock.o
CC mips64-softmmu/trace/control-target.o
CC mips64-softmmu/trace/generated-helpers.o
CC mips-softmmu/hw/virtio/virtio-crypto.o
LINK mips64-softmmu/qemu-system-mips64
CC mips-softmmu/hw/virtio/virtio-crypto-pci.o
CC mips-softmmu/hw/mips/mips_r4k.o
GEN moxie-softmmu/hmp-commands.h
GEN moxie-softmmu/hmp-commands-info.h
GEN moxie-softmmu/config-target.h
CC mips-softmmu/hw/mips/mips_malta.o
CC moxie-softmmu/exec.o
CC mipsel-softmmu/target/mips/op_helper.o
CC mips-softmmu/hw/mips/mips_mipssim.o
CC mips-softmmu/hw/mips/addr.o
CC mips-softmmu/hw/mips/cputimer.o
CC mips-softmmu/hw/mips/mips_int.o
CC mips-softmmu/hw/mips/gt64xxx_pci.o
CC mips-softmmu/hw/mips/cps.o
CC moxie-softmmu/translate-all.o
CC mipsel-softmmu/target/mips/lmi_helper.o
CC mips-softmmu/target/mips/translate.o
CC mipsel-softmmu/target/mips/helper.o
CC moxie-softmmu/cpu-exec.o
CC moxie-softmmu/translate-common.o
CC mips-softmmu/target/mips/dsp_helper.o
CC mipsel-softmmu/target/mips/cpu.o
CC moxie-softmmu/cpu-exec-common.o
CC mipsel-softmmu/target/mips/gdbstub.o
CC moxie-softmmu/tcg/tcg.o
CC mipsel-softmmu/target/mips/msa_helper.o
CC mips-softmmu/target/mips/op_helper.o
CC moxie-softmmu/tcg/tcg-op.o
CC moxie-softmmu/tcg/optimize.o
CC mips-softmmu/target/mips/lmi_helper.o
CC mipsel-softmmu/target/mips/mips-semi.o
CC moxie-softmmu/tcg/tcg-common.o
CC mipsel-softmmu/target/mips/machine.o
CC mips-softmmu/target/mips/helper.o
CC moxie-softmmu/fpu/softfloat.o
GEN trace/generated-helpers.c
CC mipsel-softmmu/trace/control-target.o
CC mips-softmmu/target/mips/cpu.o
GEN nios2-softmmu/hmp-commands.h
GEN nios2-softmmu/hmp-commands-info.h
GEN nios2-softmmu/config-target.h
CC nios2-softmmu/exec.o
CC mipsel-softmmu/trace/generated-helpers.o
CC mips-softmmu/target/mips/gdbstub.o
LINK mipsel-softmmu/qemu-system-mipsel
CC mips-softmmu/target/mips/msa_helper.o
CC moxie-softmmu/disas.o
GEN or1k-softmmu/hmp-commands.h
GEN or1k-softmmu/hmp-commands-info.h
GEN or1k-softmmu/config-target.h
CC or1k-softmmu/exec.o
CC nios2-softmmu/translate-all.o
CC moxie-softmmu/tcg-runtime.o
CC nios2-softmmu/cpu-exec.o
CC moxie-softmmu/hax-stub.o
CC nios2-softmmu/translate-common.o
CC moxie-softmmu/kvm-stub.o
CC moxie-softmmu/arch_init.o
CC nios2-softmmu/cpu-exec-common.o
CC or1k-softmmu/translate-all.o
CC mips-softmmu/target/mips/mips-semi.o
CC moxie-softmmu/cpus.o
CC nios2-softmmu/tcg/tcg.o
CC mips-softmmu/target/mips/machine.o
CC or1k-softmmu/cpu-exec.o
CC moxie-softmmu/monitor.o
GEN trace/generated-helpers.c
CC mips-softmmu/trace/control-target.o
CC or1k-softmmu/translate-common.o
CC mips-softmmu/trace/generated-helpers.o
CC or1k-softmmu/cpu-exec-common.o
CC nios2-softmmu/tcg/tcg-op.o
LINK mips-softmmu/qemu-system-mips
CC or1k-softmmu/tcg/tcg.o
CC moxie-softmmu/gdbstub.o
CC moxie-softmmu/balloon.o
CC moxie-softmmu/ioport.o
CC or1k-softmmu/tcg/tcg-op.o
CC moxie-softmmu/numa.o
CC nios2-softmmu/tcg/optimize.o
GEN ppc64-softmmu/hmp-commands.h
GEN ppc64-softmmu/hmp-commands-info.h
GEN ppc64-softmmu/config-target.h
CC moxie-softmmu/qtest.o
CC ppc64-softmmu/exec.o
CC nios2-softmmu/tcg/tcg-common.o
CC nios2-softmmu/fpu/softfloat.o
CC moxie-softmmu/bootdevice.o
CC or1k-softmmu/tcg/optimize.o
CC moxie-softmmu/memory.o
CC or1k-softmmu/tcg/tcg-common.o
CC moxie-softmmu/cputlb.o
CC or1k-softmmu/fpu/softfloat.o
CC ppc64-softmmu/translate-all.o
CC ppc64-softmmu/cpu-exec.o
CC nios2-softmmu/disas.o
CC moxie-softmmu/memory_mapping.o
CC ppc64-softmmu/translate-common.o
CC moxie-softmmu/dump.o
CC ppc64-softmmu/cpu-exec-common.o
CC nios2-softmmu/tcg-runtime.o
CC ppc64-softmmu/tcg/tcg.o
CC nios2-softmmu/hax-stub.o
CC moxie-softmmu/migration/ram.o
CC nios2-softmmu/kvm-stub.o
CC or1k-softmmu/disas.o
CC nios2-softmmu/arch_init.o
CC moxie-softmmu/migration/savevm.o
CC or1k-softmmu/tcg-runtime.o
CC nios2-softmmu/cpus.o
CC or1k-softmmu/hax-stub.o
CC moxie-softmmu/xen-common-stub.o
CC or1k-softmmu/kvm-stub.o
CC ppc64-softmmu/tcg/tcg-op.o
CC moxie-softmmu/xen-hvm-stub.o
CC nios2-softmmu/monitor.o
CC moxie-softmmu/hw/core/nmi.o
CC or1k-softmmu/arch_init.o
CC moxie-softmmu/hw/core/generic-loader.o
CC or1k-softmmu/cpus.o
CC moxie-softmmu/hw/core/null-machine.o
CC moxie-softmmu/hw/cpu/core.o
CC nios2-softmmu/gdbstub.o
CC or1k-softmmu/monitor.o
CC moxie-softmmu/hw/display/vga.o
CC nios2-softmmu/balloon.o
CC ppc64-softmmu/tcg/optimize.o
CC nios2-softmmu/ioport.o
CC moxie-softmmu/hw/net/vhost_net.o
CC nios2-softmmu/numa.o
CC or1k-softmmu/gdbstub.o
CC moxie-softmmu/hw/net/rocker/qmp-norocker.o
CC ppc64-softmmu/tcg/tcg-common.o
CC nios2-softmmu/qtest.o
CC or1k-softmmu/balloon.o
CC moxie-softmmu/hw/timer/mc146818rtc.o
CC ppc64-softmmu/fpu/softfloat.o
CC or1k-softmmu/ioport.o
CC nios2-softmmu/bootdevice.o
CC moxie-softmmu/hw/vfio/common.o
CC nios2-softmmu/memory.o
CC or1k-softmmu/numa.o
CC moxie-softmmu/hw/vfio/platform.o
CC or1k-softmmu/qtest.o
CC moxie-softmmu/hw/vfio/spapr.o
CC nios2-softmmu/cputlb.o
CC or1k-softmmu/bootdevice.o
CC moxie-softmmu/hw/moxie/moxiesim.o
CC or1k-softmmu/memory.o
CC ppc64-softmmu/disas.o
CC moxie-softmmu/target/moxie/translate.o
CC ppc64-softmmu/tcg-runtime.o
GEN ppc64-softmmu/gdbstub-xml.c
CC moxie-softmmu/target/moxie/helper.o
CC nios2-softmmu/memory_mapping.o
CC moxie-softmmu/target/moxie/machine.o
CC moxie-softmmu/target/moxie/cpu.o
CC nios2-softmmu/dump.o
CC or1k-softmmu/cputlb.o
CC moxie-softmmu/target/moxie/mmu.o
CC ppc64-softmmu/hax-stub.o
CC nios2-softmmu/migration/ram.o
GEN trace/generated-helpers.c
CC ppc64-softmmu/kvm-stub.o
CC moxie-softmmu/trace/control-target.o
CC ppc64-softmmu/libdecnumber/decContext.o
CC moxie-softmmu/trace/generated-helpers.o
CC nios2-softmmu/migration/savevm.o
CC or1k-softmmu/memory_mapping.o
CC ppc64-softmmu/libdecnumber/decNumber.o
LINK moxie-softmmu/qemu-system-moxie
CC or1k-softmmu/dump.o
CC nios2-softmmu/xen-common-stub.o
CC nios2-softmmu/xen-hvm-stub.o
CC or1k-softmmu/migration/ram.o
CC nios2-softmmu/hw/core/nmi.o
CC ppc64-softmmu/libdecnumber/dpd/decimal32.o
CC nios2-softmmu/hw/core/generic-loader.o
CC nios2-softmmu/hw/core/null-machine.o
CC ppc64-softmmu/libdecnumber/dpd/decimal64.o
CC or1k-softmmu/migration/savevm.o
CC nios2-softmmu/hw/cpu/core.o
CC or1k-softmmu/xen-common-stub.o
CC ppc64-softmmu/libdecnumber/dpd/decimal128.o
CC nios2-softmmu/hw/intc/nios2_iic.o
CC ppc64-softmmu/arch_init.o
CC nios2-softmmu/hw/net/vhost_net.o
CC nios2-softmmu/hw/net/rocker/qmp-norocker.o
CC nios2-softmmu/hw/timer/altera_timer.o
CC ppc64-softmmu/cpus.o
CC or1k-softmmu/xen-hvm-stub.o
CC nios2-softmmu/hw/vfio/common.o
CC or1k-softmmu/hw/core/nmi.o
GEN ppcemb-softmmu/hmp-commands.h
CC ppc64-softmmu/monitor.o
GEN ppcemb-softmmu/hmp-commands-info.h
GEN ppcemb-softmmu/config-target.h
CC or1k-softmmu/hw/core/generic-loader.o
CC ppcemb-softmmu/exec.o
CC nios2-softmmu/hw/vfio/platform.o
CC or1k-softmmu/hw/core/null-machine.o
CC or1k-softmmu/hw/cpu/core.o
CC nios2-softmmu/hw/vfio/spapr.o
CC or1k-softmmu/hw/net/vhost_net.o
CC nios2-softmmu/hw/nios2/boot.o
CC or1k-softmmu/hw/net/rocker/qmp-norocker.o
CC ppc64-softmmu/gdbstub.o
CC nios2-softmmu/hw/nios2/cpu_pic.o
CC or1k-softmmu/hw/vfio/common.o
CC nios2-softmmu/hw/nios2/10m50_devboard.o
CC ppc64-softmmu/balloon.o
CC nios2-softmmu/target/nios2/translate.o
CC ppcemb-softmmu/translate-all.o
CC or1k-softmmu/hw/vfio/platform.o
CC ppc64-softmmu/ioport.o
CC ppcemb-softmmu/cpu-exec.o
CC or1k-softmmu/hw/vfio/spapr.o
CC nios2-softmmu/target/nios2/op_helper.o
CC ppc64-softmmu/numa.o
CC ppcemb-softmmu/translate-common.o
CC or1k-softmmu/hw/openrisc/pic_cpu.o
CC nios2-softmmu/target/nios2/helper.o
CC ppcemb-softmmu/cpu-exec-common.o
CC ppc64-softmmu/qtest.o
CC or1k-softmmu/hw/openrisc/cputimer.o
CC ppcemb-softmmu/tcg/tcg.o
CC nios2-softmmu/target/nios2/cpu.o
CC or1k-softmmu/hw/openrisc/openrisc_sim.o
CC ppc64-softmmu/bootdevice.o
CC or1k-softmmu/target/openrisc/machine.o
CC nios2-softmmu/target/nios2/mmu.o
CC or1k-softmmu/target/openrisc/cpu.o
CC ppc64-softmmu/memory.o
CC nios2-softmmu/target/nios2/monitor.o
CC or1k-softmmu/target/openrisc/exception.o
CC or1k-softmmu/target/openrisc/interrupt.o
GEN trace/generated-helpers.c
CC nios2-softmmu/trace/control-target.o
CC ppcemb-softmmu/tcg/tcg-op.o
CC or1k-softmmu/target/openrisc/mmu.o
CC ppc64-softmmu/cputlb.o
CC nios2-softmmu/trace/generated-helpers.o
CC or1k-softmmu/target/openrisc/translate.o
LINK nios2-softmmu/qemu-system-nios2
CC or1k-softmmu/target/openrisc/exception_helper.o
CC ppc64-softmmu/memory_mapping.o
CC or1k-softmmu/target/openrisc/fpu_helper.o
CC or1k-softmmu/target/openrisc/interrupt_helper.o
CC ppc64-softmmu/dump.o
CC or1k-softmmu/target/openrisc/mmu_helper.o
CC ppc64-softmmu/migration/ram.o
CC or1k-softmmu/target/openrisc/sys_helper.o
CC ppcemb-softmmu/tcg/optimize.o
CC or1k-softmmu/target/openrisc/gdbstub.o
GEN trace/generated-helpers.c
GEN ppc-softmmu/hmp-commands.h
CC or1k-softmmu/trace/control-target.o
GEN ppc-softmmu/hmp-commands-info.h
GEN ppc-softmmu/config-target.h
CC ppc64-softmmu/migration/savevm.o
CC ppc-softmmu/exec.o
CC or1k-softmmu/trace/generated-helpers.o
CC ppcemb-softmmu/tcg/tcg-common.o
LINK or1k-softmmu/qemu-system-or1k
CC ppc64-softmmu/xen-common-stub.o
CC ppcemb-softmmu/fpu/softfloat.o
CC ppc64-softmmu/xen-hvm-stub.o
CC ppc64-softmmu/hw/9pfs/virtio-9p-device.o
CC ppc64-softmmu/hw/block/virtio-blk.o
CC ppc-softmmu/translate-all.o
CC ppcemb-softmmu/disas.o
CC ppc64-softmmu/hw/block/dataplane/virtio-blk.o
CC ppc-softmmu/cpu-exec.o
CC ppc64-softmmu/hw/char/spapr_vty.o
CC ppc-softmmu/translate-common.o
GEN s390x-softmmu/hmp-commands.h
CC ppc64-softmmu/hw/char/virtio-serial-bus.o
GEN s390x-softmmu/hmp-commands-info.h
CC s390x-softmmu/gen-features
CC ppcemb-softmmu/tcg-runtime.o
CC ppc-softmmu/cpu-exec-common.o
GEN s390x-softmmu/config-target.h
GEN s390x-softmmu/gen-features.h
CC s390x-softmmu/exec.o
CC ppc-softmmu/tcg/tcg.o
GEN ppcemb-softmmu/gdbstub-xml.c
CC ppc64-softmmu/hw/core/nmi.o
CC ppc64-softmmu/hw/core/generic-loader.o
CC ppcemb-softmmu/hax-stub.o
CC ppc64-softmmu/hw/core/null-machine.o
CC ppc-softmmu/tcg/tcg-op.o
CC ppcemb-softmmu/kvm-stub.o
CC ppc64-softmmu/hw/cpu/core.o
CC s390x-softmmu/translate-all.o
CC ppcemb-softmmu/libdecnumber/decContext.o
CC ppc64-softmmu/hw/display/vga.o
CC s390x-softmmu/cpu-exec.o
CC ppcemb-softmmu/libdecnumber/decNumber.o
CC s390x-softmmu/translate-common.o
CC s390x-softmmu/cpu-exec-common.o
CC s390x-softmmu/tcg/tcg.o
CC ppc64-softmmu/hw/display/virtio-gpu.o
CC ppc64-softmmu/hw/display/virtio-gpu-3d.o
CC ppcemb-softmmu/libdecnumber/dpd/decimal32.o
CC ppc-softmmu/tcg/optimize.o
CC ppcemb-softmmu/libdecnumber/dpd/decimal64.o
CC s390x-softmmu/tcg/tcg-op.o
CC ppcemb-softmmu/libdecnumber/dpd/decimal128.o
CC ppc64-softmmu/hw/display/virtio-gpu-pci.o
CC ppcemb-softmmu/arch_init.o
CC ppc64-softmmu/hw/display/virtio-vga.o
CC ppc-softmmu/tcg/tcg-common.o
CC ppcemb-softmmu/cpus.o
CC ppc64-softmmu/hw/intc/xics.o
CC ppc-softmmu/fpu/softfloat.o
CC ppc64-softmmu/hw/intc/xics_spapr.o
CC ppcemb-softmmu/monitor.o
CC ppc64-softmmu/hw/misc/ivshmem.o
CC ppc64-softmmu/hw/misc/edu.o
CC s390x-softmmu/tcg/optimize.o
CC ppc64-softmmu/hw/net/spapr_llan.o
CC ppcemb-softmmu/gdbstub.o
CC s390x-softmmu/tcg/tcg-common.o
CC ppc64-softmmu/hw/net/xilinx_ethlite.o
CC ppcemb-softmmu/balloon.o
CC s390x-softmmu/fpu/softfloat.o
CC ppc64-softmmu/hw/net/virtio-net.o
CC ppc-softmmu/disas.o
CC ppcemb-softmmu/ioport.o
CC ppc-softmmu/tcg-runtime.o
CC ppcemb-softmmu/numa.o
GEN ppc-softmmu/gdbstub-xml.c
CC ppcemb-softmmu/qtest.o
CC ppc64-softmmu/hw/net/vhost_net.o
CC ppcemb-softmmu/bootdevice.o
CC ppc64-softmmu/hw/net/fsl_etsec/etsec.o
CC ppc-softmmu/hax-stub.o
CC ppc64-softmmu/hw/net/fsl_etsec/registers.o
CC ppc-softmmu/kvm-stub.o
CC ppcemb-softmmu/memory.o
CC ppc-softmmu/libdecnumber/decContext.o
CC ppc64-softmmu/hw/net/fsl_etsec/rings.o
CC ppc-softmmu/libdecnumber/decNumber.o
CC ppc64-softmmu/hw/net/fsl_etsec/miim.o
CC s390x-softmmu/disas.o
CC ppc64-softmmu/hw/nvram/spapr_nvram.o
CC s390x-softmmu/tcg-runtime.o
CC ppcemb-softmmu/cputlb.o
CC ppc64-softmmu/hw/scsi/spapr_vscsi.o
GEN s390x-softmmu/gdbstub-xml.c
CC ppc64-softmmu/hw/scsi/virtio-scsi.o
CC ppc64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC ppc-softmmu/libdecnumber/dpd/decimal32.o
CC ppc64-softmmu/hw/scsi/vhost-scsi.o
CC s390x-softmmu/hax-stub.o
CC ppc-softmmu/libdecnumber/dpd/decimal64.o
CC ppc64-softmmu/hw/timer/mc146818rtc.o
CC s390x-softmmu/arch_init.o
CC ppcemb-softmmu/memory_mapping.o
CC ppc-softmmu/libdecnumber/dpd/decimal128.o
CC s390x-softmmu/cpus.o
CC ppc64-softmmu/hw/vfio/common.o
CC ppcemb-softmmu/dump.o
CC ppc-softmmu/arch_init.o
CC ppc64-softmmu/hw/vfio/pci.o
CC s390x-softmmu/monitor.o
CC ppc-softmmu/cpus.o
CC ppcemb-softmmu/migration/ram.o
CC ppc-softmmu/monitor.o
CC ppc64-softmmu/hw/vfio/pci-quirks.o
CC ppcemb-softmmu/migration/savevm.o
CC s390x-softmmu/gdbstub.o
CC ppc64-softmmu/hw/vfio/platform.o
CC ppc-softmmu/gdbstub.o
CC ppc64-softmmu/hw/vfio/spapr.o
CC s390x-softmmu/balloon.o
CC ppc64-softmmu/hw/virtio/virtio.o
CC ppcemb-softmmu/xen-common-stub.o
CC s390x-softmmu/ioport.o
CC ppc-softmmu/balloon.o
CC s390x-softmmu/numa.o
CC ppcemb-softmmu/xen-hvm-stub.o
CC ppc-softmmu/ioport.o
CC s390x-softmmu/qtest.o
CC ppcemb-softmmu/hw/9pfs/virtio-9p-device.o
CC ppc-softmmu/numa.o
CC ppc64-softmmu/hw/virtio/virtio-balloon.o
CC s390x-softmmu/bootdevice.o
CC ppcemb-softmmu/hw/block/virtio-blk.o
CC s390x-softmmu/kvm-all.o
CC ppc-softmmu/qtest.o
CC ppc64-softmmu/hw/virtio/vhost.o
CC ppcemb-softmmu/hw/block/dataplane/virtio-blk.o
CC ppc-softmmu/bootdevice.o
CC ppcemb-softmmu/hw/char/virtio-serial-bus.o
CC s390x-softmmu/memory.o
CC ppc-softmmu/memory.o
CC ppc64-softmmu/hw/virtio/vhost-backend.o
CC ppcemb-softmmu/hw/core/nmi.o
CC ppc64-softmmu/hw/virtio/vhost-user.o
CC ppcemb-softmmu/hw/core/generic-loader.o
CC s390x-softmmu/cputlb.o
CC ppc64-softmmu/hw/virtio/vhost-vsock.o
CC ppc-softmmu/cputlb.o
CC ppcemb-softmmu/hw/core/null-machine.o
CC ppc64-softmmu/hw/virtio/virtio-crypto.o
CC ppcemb-softmmu/hw/cpu/core.o
CC ppc64-softmmu/hw/virtio/virtio-crypto-pci.o
CC ppcemb-softmmu/hw/display/vga.o
CC ppc64-softmmu/hw/ppc/ppc.o
CC ppc64-softmmu/hw/ppc/ppc_booke.o
CC ppcemb-softmmu/hw/display/virtio-gpu.o
CC ppc64-softmmu/hw/ppc/fdt.o
CC s390x-softmmu/memory_mapping.o
CC ppc64-softmmu/hw/ppc/spapr.o
CC ppc-softmmu/memory_mapping.o
CC s390x-softmmu/dump.o
CC ppcemb-softmmu/hw/display/virtio-gpu-3d.o
CC ppc-softmmu/dump.o
CC ppc64-softmmu/hw/ppc/spapr_vio.o
CC s390x-softmmu/migration/ram.o
CC ppc-softmmu/migration/ram.o
CC ppcemb-softmmu/hw/display/virtio-gpu-pci.o
CC ppc64-softmmu/hw/ppc/spapr_events.o
CC ppcemb-softmmu/hw/misc/ivshmem.o
CC s390x-softmmu/migration/savevm.o
CC ppc64-softmmu/hw/ppc/spapr_hcall.o
CC ppc-softmmu/migration/savevm.o
CC ppcemb-softmmu/hw/misc/edu.o
CC ppc64-softmmu/hw/ppc/spapr_iommu.o
CC s390x-softmmu/xen-common-stub.o
CC ppcemb-softmmu/hw/net/xilinx_ethlite.o
CC ppc-softmmu/xen-common-stub.o
CC s390x-softmmu/xen-hvm-stub.o
CC ppc64-softmmu/hw/ppc/spapr_rtas.o
CC ppcemb-softmmu/hw/net/virtio-net.o
CC ppc-softmmu/xen-hvm-stub.o
CC s390x-softmmu/hw/9pfs/virtio-9p-device.o
CC ppc-softmmu/hw/9pfs/virtio-9p-device.o
CC ppc64-softmmu/hw/ppc/spapr_pci.o
CC s390x-softmmu/hw/block/virtio-blk.o
CC ppc-softmmu/hw/block/virtio-blk.o
CC ppcemb-softmmu/hw/net/vhost_net.o
CC ppcemb-softmmu/hw/scsi/virtio-scsi.o
CC s390x-softmmu/hw/block/dataplane/virtio-blk.o
CC ppc64-softmmu/hw/ppc/spapr_rtc.o
CC ppc-softmmu/hw/block/dataplane/virtio-blk.o
CC s390x-softmmu/hw/char/virtio-serial-bus.o
CC ppc64-softmmu/hw/ppc/spapr_drc.o
CC ppcemb-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC ppc-softmmu/hw/char/virtio-serial-bus.o
CC s390x-softmmu/hw/core/nmi.o
CC ppcemb-softmmu/hw/scsi/vhost-scsi.o
CC ppc64-softmmu/hw/ppc/spapr_rng.o
CC ppc-softmmu/hw/core/nmi.o
CC s390x-softmmu/hw/core/generic-loader.o
CC ppc-softmmu/hw/core/generic-loader.o
CC ppc64-softmmu/hw/ppc/spapr_cpu_core.o
CC s390x-softmmu/hw/core/null-machine.o
CC ppcemb-softmmu/hw/vfio/common.o
CC ppc-softmmu/hw/core/null-machine.o
CC s390x-softmmu/hw/cpu/core.o
CC ppc64-softmmu/hw/ppc/spapr_ovec.o
CC s390x-softmmu/hw/display/virtio-gpu.o
CC ppc-softmmu/hw/cpu/core.o
CC ppc64-softmmu/hw/ppc/pnv.o
CC ppc-softmmu/hw/display/vga.o
CC ppcemb-softmmu/hw/vfio/pci.o
CC ppc64-softmmu/hw/ppc/pnv_xscom.o
CC s390x-softmmu/hw/display/virtio-gpu-3d.o
CC ppc64-softmmu/hw/ppc/pnv_core.o
CC ppc-softmmu/hw/display/virtio-gpu.o
CC ppc64-softmmu/hw/ppc/pnv_lpc.o
CC ppcemb-softmmu/hw/vfio/pci-quirks.o
CC s390x-softmmu/hw/display/virtio-gpu-pci.o
CC ppc64-softmmu/hw/ppc/spapr_pci_vfio.o
CC s390x-softmmu/hw/intc/s390_flic.o
CC ppc64-softmmu/hw/ppc/spapr_rtas_ddw.o
CC s390x-softmmu/hw/intc/s390_flic_kvm.o
CC ppcemb-softmmu/hw/vfio/platform.o
CC ppc-softmmu/hw/display/virtio-gpu-3d.o
CC ppc64-softmmu/hw/ppc/ppc405_boards.o
CC s390x-softmmu/hw/net/virtio-net.o
CC ppcemb-softmmu/hw/vfio/spapr.o
CC ppc64-softmmu/hw/ppc/ppc4xx_devs.o
CC ppc-softmmu/hw/display/virtio-gpu-pci.o
CC ppcemb-softmmu/hw/virtio/virtio.o
CC ppc64-softmmu/hw/ppc/ppc405_uc.o
CC s390x-softmmu/hw/net/vhost_net.o
CC ppc-softmmu/hw/misc/ivshmem.o
CC s390x-softmmu/hw/net/rocker/qmp-norocker.o
CC ppc64-softmmu/hw/ppc/ppc440_bamboo.o
CC ppc-softmmu/hw/misc/edu.o
CC s390x-softmmu/hw/scsi/virtio-scsi.o
CC ppcemb-softmmu/hw/virtio/virtio-balloon.o
CC ppc-softmmu/hw/net/xilinx_ethlite.o
CC s390x-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC ppc64-softmmu/hw/ppc/ppc4xx_pci.o
CC s390x-softmmu/hw/scsi/vhost-scsi.o
CC ppcemb-softmmu/hw/virtio/vhost.o
CC ppc-softmmu/hw/net/virtio-net.o
CC ppc64-softmmu/hw/ppc/prep.o
CC s390x-softmmu/hw/vfio/common.o
CC ppc-softmmu/hw/net/vhost_net.o
CC ppc64-softmmu/hw/ppc/prep_systemio.o
CC ppcemb-softmmu/hw/virtio/vhost-backend.o
CC ppc-softmmu/hw/net/fsl_etsec/etsec.o
CC s390x-softmmu/hw/vfio/pci.o
CC ppcemb-softmmu/hw/virtio/vhost-user.o
CC ppc64-softmmu/hw/ppc/rs6000_mc.o
CC ppc-softmmu/hw/net/fsl_etsec/registers.o
CC ppcemb-softmmu/hw/virtio/vhost-vsock.o
CC ppc-softmmu/hw/net/fsl_etsec/rings.o
CC ppc64-softmmu/hw/ppc/mac_oldworld.o
CC ppcemb-softmmu/hw/virtio/virtio-crypto.o
CC ppc-softmmu/hw/net/fsl_etsec/miim.o
CC s390x-softmmu/hw/vfio/pci-quirks.o
CC ppcemb-softmmu/hw/virtio/virtio-crypto-pci.o
CC ppc64-softmmu/hw/ppc/mac_newworld.o
CC ppc-softmmu/hw/scsi/virtio-scsi.o
CC ppcemb-softmmu/hw/ppc/ppc.o
CC ppc64-softmmu/hw/ppc/e500.o
CC ppc-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC s390x-softmmu/hw/vfio/platform.o
CC ppc-softmmu/hw/scsi/vhost-scsi.o
CC ppcemb-softmmu/hw/ppc/ppc_booke.o
CC ppc64-softmmu/hw/ppc/mpc8544ds.o
CC s390x-softmmu/hw/vfio/spapr.o
CC s390x-softmmu/hw/virtio/virtio.o
CC ppc64-softmmu/hw/ppc/e500plat.o
CC ppcemb-softmmu/hw/ppc/fdt.o
CC ppc-softmmu/hw/timer/mc146818rtc.o
CC ppc64-softmmu/hw/ppc/mpc8544_guts.o
CC ppcemb-softmmu/hw/ppc/ppc405_boards.o
CC ppc64-softmmu/hw/ppc/ppce500_spin.o
CC ppc-softmmu/hw/vfio/common.o
CC ppcemb-softmmu/hw/ppc/ppc4xx_devs.o
CC s390x-softmmu/hw/virtio/virtio-balloon.o
CC ppc64-softmmu/hw/ppc/virtex_ml507.o
CC ppcemb-softmmu/hw/ppc/ppc405_uc.o
CC ppc-softmmu/hw/vfio/pci.o
CC ppc64-softmmu/target/ppc/cpu-models.o
CC s390x-softmmu/hw/virtio/vhost.o
CC ppcemb-softmmu/hw/ppc/ppc440_bamboo.o
CC ppcemb-softmmu/hw/ppc/ppc4xx_pci.o
CC s390x-softmmu/hw/virtio/vhost-backend.o
CC ppcemb-softmmu/hw/ppc/virtex_ml507.o
CC s390x-softmmu/hw/virtio/vhost-user.o
CC ppcemb-softmmu/target/ppc/cpu-models.o
CC ppc-softmmu/hw/vfio/pci-quirks.o
CC s390x-softmmu/hw/virtio/vhost-vsock.o
CC s390x-softmmu/hw/virtio/virtio-crypto.o
CC ppc64-softmmu/target/ppc/translate.o
CC ppc-softmmu/hw/vfio/platform.o
CC s390x-softmmu/hw/virtio/virtio-crypto-pci.o
CC ppc-softmmu/hw/vfio/spapr.o
CC s390x-softmmu/hw/s390x/s390-virtio.o
CC ppc-softmmu/hw/virtio/virtio.o
CC ppcemb-softmmu/target/ppc/translate.o
CC s390x-softmmu/hw/s390x/s390-virtio-hcall.o
CC s390x-softmmu/hw/s390x/sclp.o
CC s390x-softmmu/hw/s390x/event-facility.o
CC s390x-softmmu/hw/s390x/sclpquiesce.o
CC ppc-softmmu/hw/virtio/virtio-balloon.o
CC s390x-softmmu/hw/s390x/sclpcpu.o
CC ppc-softmmu/hw/virtio/vhost.o
CC s390x-softmmu/hw/s390x/ipl.o
CC s390x-softmmu/hw/s390x/css.o
CC ppc-softmmu/hw/virtio/vhost-backend.o
CC ppc-softmmu/hw/virtio/vhost-user.o
CC s390x-softmmu/hw/s390x/s390-virtio-ccw.o
CC ppc-softmmu/hw/virtio/vhost-vsock.o
CC s390x-softmmu/hw/s390x/virtio-ccw.o
CC ppc-softmmu/hw/virtio/virtio-crypto.o
CC ppc-softmmu/hw/virtio/virtio-crypto-pci.o
CC s390x-softmmu/hw/s390x/css-bridge.o
CC ppc-softmmu/hw/ppc/ppc.o
CC s390x-softmmu/hw/s390x/ccw-device.o
CC s390x-softmmu/hw/s390x/s390-pci-bus.o
CC ppc-softmmu/hw/ppc/ppc_booke.o
CC ppc-softmmu/hw/ppc/fdt.o
CC s390x-softmmu/hw/s390x/s390-pci-inst.o
CC ppc-softmmu/hw/ppc/ppc405_boards.o
CC s390x-softmmu/hw/s390x/s390-skeys.o
CC ppc-softmmu/hw/ppc/ppc4xx_devs.o
CC s390x-softmmu/hw/s390x/s390-skeys-kvm.o
CC ppc-softmmu/hw/ppc/ppc405_uc.o
CC s390x-softmmu/target/s390x/translate.o
CC ppc-softmmu/hw/ppc/ppc440_bamboo.o
CC ppc-softmmu/hw/ppc/ppc4xx_pci.o
CC ppc-softmmu/hw/ppc/prep.o
CC ppc-softmmu/hw/ppc/prep_systemio.o
CC ppc-softmmu/hw/ppc/rs6000_mc.o
CC s390x-softmmu/target/s390x/helper.o
CC ppc-softmmu/hw/ppc/mac_oldworld.o
CC s390x-softmmu/target/s390x/cpu.o
CC ppc-softmmu/hw/ppc/mac_newworld.o
CC ppcemb-softmmu/target/ppc/machine.o
CC s390x-softmmu/target/s390x/interrupt.o
CC ppc-softmmu/hw/ppc/e500.o
CC s390x-softmmu/target/s390x/int_helper.o
CC ppcemb-softmmu/target/ppc/mmu_helper.o
CC ppc64-softmmu/target/ppc/machine.o
CC s390x-softmmu/target/s390x/fpu_helper.o
CC ppc-softmmu/hw/ppc/mpc8544ds.o
CC ppc-softmmu/hw/ppc/e500plat.o
CC ppc64-softmmu/target/ppc/mmu_helper.o
CC ppc-softmmu/hw/ppc/mpc8544_guts.o
CC ppcemb-softmmu/target/ppc/mmu-hash32.o
CC s390x-softmmu/target/s390x/cc_helper.o
CC ppc-softmmu/hw/ppc/ppce500_spin.o
CC ppcemb-softmmu/target/ppc/monitor.o
CC s390x-softmmu/target/s390x/mem_helper.o
CC ppc-softmmu/hw/ppc/virtex_ml507.o
CC ppcemb-softmmu/target/ppc/kvm-stub.o
CC ppc64-softmmu/target/ppc/mmu-hash32.o
CC ppcemb-softmmu/target/ppc/dfp_helper.o
CC ppc-softmmu/target/ppc/cpu-models.o
CC ppc64-softmmu/target/ppc/monitor.o
CC s390x-softmmu/target/s390x/misc_helper.o
CC ppcemb-softmmu/target/ppc/excp_helper.o
CC ppc64-softmmu/target/ppc/mmu-hash64.o
CC s390x-softmmu/target/s390x/gdbstub.o
CC ppc64-softmmu/target/ppc/arch_dump.o
CC ppcemb-softmmu/target/ppc/fpu_helper.o
CC s390x-softmmu/target/s390x/cpu_models.o
CC ppc64-softmmu/target/ppc/compat.o
CC ppc-softmmu/target/ppc/translate.o
CC s390x-softmmu/target/s390x/cpu_features.o
CC ppc64-softmmu/target/ppc/kvm-stub.o
CC s390x-softmmu/target/s390x/machine.o
CC ppc64-softmmu/target/ppc/dfp_helper.o
CC s390x-softmmu/target/s390x/ioinst.o
CC s390x-softmmu/target/s390x/arch_dump.o
CC ppc64-softmmu/target/ppc/excp_helper.o
CC s390x-softmmu/target/s390x/mmu_helper.o
CC s390x-softmmu/target/s390x/kvm.o
CC ppc64-softmmu/target/ppc/fpu_helper.o
GEN trace/generated-helpers.c
CC s390x-softmmu/trace/control-target.o
CC s390x-softmmu/gdbstub-xml.o
CC ppcemb-softmmu/target/ppc/int_helper.o
CC s390x-softmmu/trace/generated-helpers.o
LINK s390x-softmmu/qemu-system-s390x
CC ppcemb-softmmu/target/ppc/timebase_helper.o
CC ppc-softmmu/target/ppc/machine.o
CC ppcemb-softmmu/target/ppc/misc_helper.o
CC ppc-softmmu/target/ppc/mmu_helper.o
CC ppcemb-softmmu/target/ppc/mem_helper.o
CC ppc64-softmmu/target/ppc/int_helper.o
CC ppc64-softmmu/target/ppc/timebase_helper.o
CC ppcemb-softmmu/target/ppc/gdbstub.o
GEN trace/generated-helpers.c
CC ppcemb-softmmu/trace/control-target.o
CC ppcemb-softmmu/gdbstub-xml.o
GEN sh4eb-softmmu/hmp-commands.h
GEN sh4eb-softmmu/hmp-commands-info.h
GEN sh4eb-softmmu/config-target.h
CC sh4eb-softmmu/exec.o
CC ppc64-softmmu/target/ppc/misc_helper.o
CC ppcemb-softmmu/trace/generated-helpers.o
CC ppc64-softmmu/target/ppc/mem_helper.o
LINK ppcemb-softmmu/qemu-system-ppcemb
CC ppc64-softmmu/target/ppc/gdbstub.o
GEN trace/generated-helpers.c
CC ppc64-softmmu/trace/control-target.o
CC sh4eb-softmmu/translate-all.o
CC ppc64-softmmu/gdbstub-xml.o
CC sh4eb-softmmu/cpu-exec.o
CC sh4eb-softmmu/translate-common.o
CC ppc64-softmmu/trace/generated-helpers.o
CC ppc-softmmu/target/ppc/mmu-hash32.o
CC ppc-softmmu/target/ppc/monitor.o
CC sh4eb-softmmu/cpu-exec-common.o
CC sh4eb-softmmu/tcg/tcg.o
LINK ppc64-softmmu/qemu-system-ppc64
CC ppc-softmmu/target/ppc/kvm-stub.o
CC ppc-softmmu/target/ppc/dfp_helper.o
CC sh4eb-softmmu/tcg/tcg-op.o
CC ppc-softmmu/target/ppc/excp_helper.o
CC ppc-softmmu/target/ppc/fpu_helper.o
CC sh4eb-softmmu/tcg/optimize.o
GEN sh4-softmmu/hmp-commands.h
GEN sh4-softmmu/hmp-commands-info.h
GEN sh4-softmmu/config-target.h
CC sh4-softmmu/exec.o
CC sh4eb-softmmu/tcg/tcg-common.o
GEN sparc64-softmmu/hmp-commands.h
CC sh4eb-softmmu/fpu/softfloat.o
GEN sparc64-softmmu/hmp-commands-info.h
GEN sparc64-softmmu/config-target.h
CC sparc64-softmmu/exec.o
CC sh4-softmmu/translate-all.o
CC sh4-softmmu/cpu-exec.o
CC sh4-softmmu/translate-common.o
CC ppc-softmmu/target/ppc/int_helper.o
CC sparc64-softmmu/translate-all.o
CC sh4-softmmu/cpu-exec-common.o
CC sh4eb-softmmu/disas.o
CC sh4-softmmu/tcg/tcg.o
CC sh4eb-softmmu/tcg-runtime.o
CC sparc64-softmmu/cpu-exec.o
CC sh4eb-softmmu/hax-stub.o
CC sparc64-softmmu/translate-common.o
CC sh4eb-softmmu/kvm-stub.o
CC ppc-softmmu/target/ppc/timebase_helper.o
CC sparc64-softmmu/cpu-exec-common.o
CC ppc-softmmu/target/ppc/misc_helper.o
CC sh4eb-softmmu/arch_init.o
CC sparc64-softmmu/tcg/tcg.o
CC sh4-softmmu/tcg/tcg-op.o
CC ppc-softmmu/target/ppc/mem_helper.o
CC sh4eb-softmmu/cpus.o
CC sh4eb-softmmu/monitor.o
CC ppc-softmmu/target/ppc/gdbstub.o
GEN trace/generated-helpers.c
CC sparc64-softmmu/tcg/tcg-op.o
CC ppc-softmmu/trace/control-target.o
CC ppc-softmmu/gdbstub-xml.o
CC sh4-softmmu/tcg/optimize.o
CC sh4eb-softmmu/gdbstub.o
CC ppc-softmmu/trace/generated-helpers.o
LINK ppc-softmmu/qemu-system-ppc
CC sh4-softmmu/tcg/tcg-common.o
CC sh4eb-softmmu/balloon.o
CC sh4-softmmu/fpu/softfloat.o
CC sh4eb-softmmu/ioport.o
CC sh4eb-softmmu/numa.o
CC sparc64-softmmu/tcg/optimize.o
CC sh4eb-softmmu/qtest.o
GEN sparc-softmmu/hmp-commands.h
GEN sparc-softmmu/hmp-commands-info.h
GEN sparc-softmmu/config-target.h
CC sparc-softmmu/exec.o
CC sparc64-softmmu/tcg/tcg-common.o
CC sh4eb-softmmu/bootdevice.o
CC sparc64-softmmu/fpu/softfloat.o
CC sh4eb-softmmu/memory.o
CC sh4-softmmu/disas.o
CC sh4-softmmu/tcg-runtime.o
CC sh4-softmmu/hax-stub.o
CC sh4-softmmu/kvm-stub.o
CC sh4eb-softmmu/cputlb.o
CC sh4-softmmu/arch_init.o
CC sparc-softmmu/translate-all.o
CC sh4-softmmu/cpus.o
CC sparc-softmmu/cpu-exec.o
CC sparc-softmmu/translate-common.o
CC sh4-softmmu/monitor.o
CC sh4eb-softmmu/memory_mapping.o
CC sparc-softmmu/cpu-exec-common.o
CC sparc64-softmmu/disas.o
CC sh4eb-softmmu/dump.o
CC sparc-softmmu/tcg/tcg.o
CC sparc64-softmmu/tcg-runtime.o
CC sparc64-softmmu/hax-stub.o
CC sh4-softmmu/gdbstub.o
CC sh4eb-softmmu/migration/ram.o
CC sparc64-softmmu/kvm-stub.o
CC sh4-softmmu/balloon.o
CC sparc64-softmmu/arch_init.o
CC sh4-softmmu/ioport.o
CC sparc64-softmmu/cpus.o
CC sh4eb-softmmu/migration/savevm.o
CC sparc-softmmu/tcg/tcg-op.o
CC sh4-softmmu/numa.o
CC sh4-softmmu/qtest.o
CC sparc64-softmmu/monitor.o
CC sh4eb-softmmu/xen-common-stub.o
CC sh4-softmmu/bootdevice.o
CC sh4eb-softmmu/xen-hvm-stub.o
CC sh4-softmmu/memory.o
CC sh4eb-softmmu/hw/9pfs/virtio-9p-device.o
CC sh4eb-softmmu/hw/block/tc58128.o
CC sparc64-softmmu/gdbstub.o
CC sh4-softmmu/cputlb.o
CC sh4eb-softmmu/hw/block/virtio-blk.o
CC sparc-softmmu/tcg/optimize.o
CC sparc64-softmmu/balloon.o
CC sh4eb-softmmu/hw/block/dataplane/virtio-blk.o
CC sparc64-softmmu/ioport.o
CC sparc64-softmmu/numa.o
CC sparc-softmmu/tcg/tcg-common.o
CC sh4eb-softmmu/hw/char/sh_serial.o
CC sparc-softmmu/fpu/softfloat.o
CC sh4eb-softmmu/hw/char/virtio-serial-bus.o
CC sparc64-softmmu/qtest.o
CC sh4-softmmu/memory_mapping.o
CC sh4eb-softmmu/hw/core/nmi.o
CC sparc64-softmmu/bootdevice.o
CC sh4-softmmu/dump.o
CC sh4eb-softmmu/hw/core/generic-loader.o
CC sparc64-softmmu/memory.o
CC sh4eb-softmmu/hw/core/null-machine.o
CC sh4-softmmu/migration/ram.o
CC sh4eb-softmmu/hw/cpu/core.o
CC sh4eb-softmmu/hw/display/sm501.o
CC sparc64-softmmu/cputlb.o
CC sh4-softmmu/migration/savevm.o
CC sparc-softmmu/disas.o
CC sh4eb-softmmu/hw/display/vga.o
CC sparc-softmmu/tcg-runtime.o
CC sh4-softmmu/xen-common-stub.o
CC sparc-softmmu/hax-stub.o
CC sh4eb-softmmu/hw/display/virtio-gpu.o
CC sparc-softmmu/kvm-stub.o
CC sh4-softmmu/xen-hvm-stub.o
CC sparc64-softmmu/memory_mapping.o
CC sparc-softmmu/arch_init.o
CC sh4-softmmu/hw/9pfs/virtio-9p-device.o
CC sparc64-softmmu/dump.o
CC sparc-softmmu/cpus.o
CC sh4-softmmu/hw/block/tc58128.o
CC sh4eb-softmmu/hw/display/virtio-gpu-3d.o
CC sh4-softmmu/hw/block/virtio-blk.o
CC sparc-softmmu/monitor.o
CC sparc64-softmmu/migration/ram.o
CC sh4eb-softmmu/hw/display/virtio-gpu-pci.o
CC sh4-softmmu/hw/block/dataplane/virtio-blk.o
CC sparc64-softmmu/migration/savevm.o
CC sh4eb-softmmu/hw/intc/sh_intc.o
CC sh4-softmmu/hw/char/sh_serial.o
CC sh4-softmmu/hw/char/virtio-serial-bus.o
CC sparc-softmmu/gdbstub.o
CC sh4eb-softmmu/hw/misc/ivshmem.o
CC sparc64-softmmu/xen-common-stub.o
CC sh4-softmmu/hw/core/nmi.o
CC sh4eb-softmmu/hw/misc/edu.o
CC sparc-softmmu/balloon.o
CC sparc64-softmmu/xen-hvm-stub.o
CC sh4-softmmu/hw/core/generic-loader.o
CC sh4eb-softmmu/hw/net/virtio-net.o
CC sparc64-softmmu/hw/9pfs/virtio-9p-device.o
CC sparc-softmmu/ioport.o
CC sh4-softmmu/hw/core/null-machine.o
CC sparc-softmmu/numa.o
CC sparc64-softmmu/hw/block/virtio-blk.o
CC sh4-softmmu/hw/cpu/core.o
CC sh4-softmmu/hw/display/sm501.o
CC sparc-softmmu/qtest.o
CC sh4eb-softmmu/hw/net/vhost_net.o
CC sparc64-softmmu/hw/block/dataplane/virtio-blk.o
CC sh4eb-softmmu/hw/scsi/virtio-scsi.o
CC sparc64-softmmu/hw/char/virtio-serial-bus.o
CC sparc-softmmu/bootdevice.o
CC sh4-softmmu/hw/display/vga.o
CC sparc-softmmu/memory.o
CC sh4eb-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC sparc64-softmmu/hw/core/nmi.o
CC sh4eb-softmmu/hw/scsi/vhost-scsi.o
CC sparc64-softmmu/hw/core/generic-loader.o
CC sh4-softmmu/hw/display/virtio-gpu.o
CC sh4eb-softmmu/hw/timer/sh_timer.o
CC sparc-softmmu/cputlb.o
CC sparc64-softmmu/hw/core/null-machine.o
CC sh4eb-softmmu/hw/timer/mc146818rtc.o
CC sparc64-softmmu/hw/cpu/core.o
CC sh4-softmmu/hw/display/virtio-gpu-3d.o
CC sparc64-softmmu/hw/display/vga.o
CC sh4eb-softmmu/hw/vfio/common.o
CC sparc-softmmu/memory_mapping.o
CC sh4-softmmu/hw/display/virtio-gpu-pci.o
CC sparc-softmmu/dump.o
CC sh4-softmmu/hw/intc/sh_intc.o
CC sh4eb-softmmu/hw/vfio/pci.o
CC sparc64-softmmu/hw/display/virtio-gpu.o
CC sh4-softmmu/hw/misc/ivshmem.o
CC sparc-softmmu/migration/ram.o
CC sh4-softmmu/hw/misc/edu.o
CC sparc64-softmmu/hw/display/virtio-gpu-3d.o
CC sh4-softmmu/hw/net/virtio-net.o
CC sh4eb-softmmu/hw/vfio/pci-quirks.o
CC sparc-softmmu/migration/savevm.o
CC sparc64-softmmu/hw/display/virtio-gpu-pci.o
CC sh4eb-softmmu/hw/vfio/platform.o
CC sh4-softmmu/hw/net/vhost_net.o
CC sh4eb-softmmu/hw/vfio/spapr.o
CC sparc64-softmmu/hw/misc/ivshmem.o
CC sh4-softmmu/hw/scsi/virtio-scsi.o
CC sh4eb-softmmu/hw/virtio/virtio.o
CC sparc-softmmu/xen-common-stub.o
CC sparc64-softmmu/hw/misc/edu.o
CC sparc-softmmu/xen-hvm-stub.o
CC sh4-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC sparc-softmmu/hw/core/nmi.o
CC sh4-softmmu/hw/scsi/vhost-scsi.o
CC sparc64-softmmu/hw/net/virtio-net.o
CC sparc-softmmu/hw/core/generic-loader.o
CC sh4eb-softmmu/hw/virtio/virtio-balloon.o
CC sh4-softmmu/hw/timer/sh_timer.o
CC sparc-softmmu/hw/core/null-machine.o
CC sh4-softmmu/hw/timer/mc146818rtc.o
CC sparc-softmmu/hw/cpu/core.o
CC sh4eb-softmmu/hw/virtio/vhost.o
CC sh4-softmmu/hw/vfio/common.o
CC sparc-softmmu/hw/display/tcx.o
CC sparc64-softmmu/hw/net/vhost_net.o
CC sparc64-softmmu/hw/scsi/virtio-scsi.o
CC sh4eb-softmmu/hw/virtio/vhost-backend.o
CC sh4-softmmu/hw/vfio/pci.o
CC sh4eb-softmmu/hw/virtio/vhost-user.o
CC sparc64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC sparc-softmmu/hw/display/cg3.o
CC sparc64-softmmu/hw/scsi/vhost-scsi.o
CC sh4eb-softmmu/hw/virtio/vhost-vsock.o
CC sparc64-softmmu/hw/timer/mc146818rtc.o
CC sparc-softmmu/hw/intc/grlib_irqmp.o
CC sparc64-softmmu/hw/vfio/common.o
CC sh4eb-softmmu/hw/virtio/virtio-crypto.o
CC sparc-softmmu/hw/misc/eccmemctl.o
CC sh4-softmmu/hw/vfio/pci-quirks.o
CC sh4eb-softmmu/hw/virtio/virtio-crypto-pci.o
CC sparc64-softmmu/hw/vfio/pci.o
CC sparc-softmmu/hw/misc/slavio_misc.o
CC sh4-softmmu/hw/vfio/platform.o
CC sh4eb-softmmu/hw/sh4/shix.o
CC sh4-softmmu/hw/vfio/spapr.o
CC sparc-softmmu/hw/net/vhost_net.o
CC sh4-softmmu/hw/virtio/virtio.o
CC sparc64-softmmu/hw/vfio/pci-quirks.o
CC sh4eb-softmmu/hw/sh4/r2d.o
CC sparc-softmmu/hw/net/rocker/qmp-norocker.o
CC sparc-softmmu/hw/vfio/common.o
CC sh4eb-softmmu/hw/sh4/sh7750.o
CC sparc64-softmmu/hw/vfio/platform.o
CC sh4-softmmu/hw/virtio/virtio-balloon.o
CC sparc-softmmu/hw/vfio/platform.o
CC sh4eb-softmmu/hw/sh4/sh7750_regnames.o
CC sparc64-softmmu/hw/vfio/spapr.o
CC sh4-softmmu/hw/virtio/vhost.o
CC sparc-softmmu/hw/vfio/spapr.o
CC sh4eb-softmmu/hw/sh4/sh_pci.o
CC sparc64-softmmu/hw/virtio/virtio.o
CC sparc-softmmu/hw/sparc/sun4m.o
CC sh4eb-softmmu/target/sh4/translate.o
CC sh4-softmmu/hw/virtio/vhost-backend.o
CC sparc-softmmu/hw/sparc/leon3.o
CC sh4-softmmu/hw/virtio/vhost-user.o
CC sparc64-softmmu/hw/virtio/virtio-balloon.o
CC sh4-softmmu/hw/virtio/vhost-vsock.o
CC sparc-softmmu/target/sparc/machine.o
CC sparc64-softmmu/hw/virtio/vhost.o
CC sh4-softmmu/hw/virtio/virtio-crypto.o
CC sparc-softmmu/target/sparc/monitor.o
CC sh4-softmmu/hw/virtio/virtio-crypto-pci.o
CC sparc-softmmu/target/sparc/translate.o
CC sparc64-softmmu/hw/virtio/vhost-backend.o
CC sh4-softmmu/hw/sh4/shix.o
CC sh4-softmmu/hw/sh4/r2d.o
CC sparc64-softmmu/hw/virtio/vhost-user.o
CC sh4eb-softmmu/target/sh4/op_helper.o
CC sh4-softmmu/hw/sh4/sh7750.o
CC sh4-softmmu/hw/sh4/sh7750_regnames.o
CC sparc64-softmmu/hw/virtio/vhost-vsock.o
CC sh4eb-softmmu/target/sh4/helper.o
CC sh4-softmmu/hw/sh4/sh_pci.o
CC sparc-softmmu/target/sparc/helper.o
CC sparc64-softmmu/hw/virtio/virtio-crypto.o
CC sparc-softmmu/target/sparc/cpu.o
CC sh4-softmmu/target/sh4/translate.o
CC sh4eb-softmmu/target/sh4/cpu.o
CC sparc64-softmmu/hw/virtio/virtio-crypto-pci.o
CC sparc-softmmu/target/sparc/fop_helper.o
CC sh4eb-softmmu/target/sh4/monitor.o
CC sparc-softmmu/target/sparc/cc_helper.o
CC sh4eb-softmmu/target/sh4/gdbstub.o
CC sparc64-softmmu/hw/sparc64/sparc64.o
CC sparc-softmmu/target/sparc/win_helper.o
CC sparc64-softmmu/hw/sparc64/sun4u.o
GEN trace/generated-helpers.c
CC sh4eb-softmmu/trace/control-target.o
CC sparc-softmmu/target/sparc/mmu_helper.o
CC sparc-softmmu/target/sparc/ldst_helper.o
CC sh4eb-softmmu/trace/generated-helpers.o
CC sparc-softmmu/target/sparc/int32_helper.o
CC sparc64-softmmu/hw/sparc64/niagara.o
CC sparc-softmmu/target/sparc/gdbstub.o
LINK sh4eb-softmmu/qemu-system-sh4eb
CC sparc64-softmmu/target/sparc/machine.o
GEN trace/generated-helpers.c
CC sparc-softmmu/trace/control-target.o
CC sh4-softmmu/target/sh4/op_helper.o
CC sparc64-softmmu/target/sparc/monitor.o
CC sparc-softmmu/trace/generated-helpers.o
CC sh4-softmmu/target/sh4/helper.o
CC sparc64-softmmu/target/sparc/translate.o
LINK sparc-softmmu/qemu-system-sparc
CC sh4-softmmu/target/sh4/cpu.o
CC sh4-softmmu/target/sh4/monitor.o
CC sh4-softmmu/target/sh4/gdbstub.o
GEN trace/generated-helpers.c
CC sh4-softmmu/trace/control-target.o
GEN tricore-softmmu/hmp-commands.h
GEN tricore-softmmu/hmp-commands-info.h
GEN tricore-softmmu/config-target.h
CC tricore-softmmu/exec.o
CC sh4-softmmu/trace/generated-helpers.o
GEN unicore32-softmmu/hmp-commands.h
GEN unicore32-softmmu/hmp-commands-info.h
GEN unicore32-softmmu/config-target.h
CC unicore32-softmmu/exec.o
LINK sh4-softmmu/qemu-system-sh4
CC sparc64-softmmu/target/sparc/helper.o
CC sparc64-softmmu/target/sparc/cpu.o
CC sparc64-softmmu/target/sparc/fop_helper.o
CC sparc64-softmmu/target/sparc/cc_helper.o
CC tricore-softmmu/translate-all.o
CC sparc64-softmmu/target/sparc/win_helper.o
CC tricore-softmmu/cpu-exec.o
CC sparc64-softmmu/target/sparc/mmu_helper.o
CC unicore32-softmmu/translate-all.o
CC sparc64-softmmu/target/sparc/ldst_helper.o
CC tricore-softmmu/translate-common.o
GEN x86_64-softmmu/hmp-commands.h
CC sparc64-softmmu/target/sparc/int64_helper.o
GEN x86_64-softmmu/hmp-commands-info.h
CC unicore32-softmmu/cpu-exec.o
GEN x86_64-softmmu/config-target.h
CC tricore-softmmu/cpu-exec-common.o
CC sparc64-softmmu/target/sparc/vis_helper.o
CC x86_64-softmmu/exec.o
CC tricore-softmmu/tcg/tcg.o
CC unicore32-softmmu/translate-common.o
CC sparc64-softmmu/target/sparc/gdbstub.o
CC unicore32-softmmu/cpu-exec-common.o
GEN trace/generated-helpers.c
CC sparc64-softmmu/trace/control-target.o
CC unicore32-softmmu/tcg/tcg.o
CC sparc64-softmmu/trace/generated-helpers.o
LINK sparc64-softmmu/qemu-system-sparc64
CC x86_64-softmmu/translate-all.o
CC tricore-softmmu/tcg/tcg-op.o
CC x86_64-softmmu/cpu-exec.o
CC unicore32-softmmu/tcg/tcg-op.o
CC x86_64-softmmu/translate-common.o
CC x86_64-softmmu/cpu-exec-common.o
CC x86_64-softmmu/tcg/tcg.o
GEN xtensaeb-softmmu/hmp-commands.h
GEN xtensaeb-softmmu/hmp-commands-info.h
GEN xtensaeb-softmmu/config-target.h
CC xtensaeb-softmmu/exec.o
CC tricore-softmmu/tcg/optimize.o
CC unicore32-softmmu/tcg/optimize.o
CC tricore-softmmu/tcg/tcg-common.o
CC x86_64-softmmu/tcg/tcg-op.o
CC tricore-softmmu/fpu/softfloat.o
CC xtensaeb-softmmu/translate-all.o
CC unicore32-softmmu/tcg/tcg-common.o
CC unicore32-softmmu/fpu/softfloat.o
CC xtensaeb-softmmu/cpu-exec.o
CC xtensaeb-softmmu/translate-common.o
CC xtensaeb-softmmu/cpu-exec-common.o
CC x86_64-softmmu/tcg/optimize.o
CC xtensaeb-softmmu/tcg/tcg.o
CC tricore-softmmu/disas.o
CC tricore-softmmu/tcg-runtime.o
CC tricore-softmmu/hax-stub.o
CC x86_64-softmmu/tcg/tcg-common.o
CC xtensaeb-softmmu/tcg/tcg-op.o
CC tricore-softmmu/kvm-stub.o
CC unicore32-softmmu/disas.o
CC x86_64-softmmu/fpu/softfloat.o
CC tricore-softmmu/arch_init.o
CC unicore32-softmmu/tcg-runtime.o
CC tricore-softmmu/cpus.o
CC unicore32-softmmu/hax-stub.o
CC unicore32-softmmu/kvm-stub.o
CC tricore-softmmu/monitor.o
CC unicore32-softmmu/arch_init.o
CC unicore32-softmmu/cpus.o
CC tricore-softmmu/gdbstub.o
CC xtensaeb-softmmu/tcg/optimize.o
CC unicore32-softmmu/monitor.o
CC x86_64-softmmu/disas.o
CC tricore-softmmu/balloon.o
CC x86_64-softmmu/tcg-runtime.o
CC tricore-softmmu/ioport.o
CC xtensaeb-softmmu/tcg/tcg-common.o
CC tricore-softmmu/numa.o
CC x86_64-softmmu/hax-stub.o
CC xtensaeb-softmmu/fpu/softfloat.o
CC x86_64-softmmu/kvm-stub.o
CC tricore-softmmu/qtest.o
CC x86_64-softmmu/arch_init.o
CC unicore32-softmmu/gdbstub.o
CC tricore-softmmu/bootdevice.o
CC x86_64-softmmu/cpus.o
CC unicore32-softmmu/balloon.o
CC tricore-softmmu/memory.o
CC unicore32-softmmu/ioport.o
CC x86_64-softmmu/monitor.o
CC unicore32-softmmu/numa.o
CC tricore-softmmu/cputlb.o
CC unicore32-softmmu/qtest.o
CC xtensaeb-softmmu/disas.o
CC xtensaeb-softmmu/tcg-runtime.o
CC unicore32-softmmu/bootdevice.o
CC x86_64-softmmu/gdbstub.o
CC xtensaeb-softmmu/hax-stub.o
CC unicore32-softmmu/memory.o
CC xtensaeb-softmmu/kvm-stub.o
CC tricore-softmmu/memory_mapping.o
CC xtensaeb-softmmu/arch_init.o
CC x86_64-softmmu/balloon.o
CC tricore-softmmu/dump.o
CC xtensaeb-softmmu/cpus.o
CC x86_64-softmmu/ioport.o
CC unicore32-softmmu/cputlb.o
CC x86_64-softmmu/numa.o
CC tricore-softmmu/migration/ram.o
CC xtensaeb-softmmu/monitor.o
CC x86_64-softmmu/qtest.o
CC x86_64-softmmu/bootdevice.o
CC tricore-softmmu/migration/savevm.o
CC unicore32-softmmu/memory_mapping.o
CC xtensaeb-softmmu/gdbstub.o
CC x86_64-softmmu/memory.o
CC unicore32-softmmu/dump.o
CC xtensaeb-softmmu/balloon.o
CC tricore-softmmu/xen-common-stub.o
CC tricore-softmmu/xen-hvm-stub.o
CC xtensaeb-softmmu/ioport.o
CC unicore32-softmmu/migration/ram.o
CC tricore-softmmu/hw/core/nmi.o
CC tricore-softmmu/hw/core/generic-loader.o
CC x86_64-softmmu/cputlb.o
CC xtensaeb-softmmu/numa.o
CC tricore-softmmu/hw/core/null-machine.o
CC unicore32-softmmu/migration/savevm.o
CC tricore-softmmu/hw/cpu/core.o
CC xtensaeb-softmmu/qtest.o
CC tricore-softmmu/hw/net/vhost_net.o
CC xtensaeb-softmmu/bootdevice.o
CC tricore-softmmu/hw/net/rocker/qmp-norocker.o
CC tricore-softmmu/hw/vfio/common.o
CC x86_64-softmmu/memory_mapping.o
CC xtensaeb-softmmu/memory.o
CC unicore32-softmmu/xen-common-stub.o
CC x86_64-softmmu/dump.o
CC tricore-softmmu/hw/vfio/platform.o
CC unicore32-softmmu/xen-hvm-stub.o
CC unicore32-softmmu/hw/core/nmi.o
CC tricore-softmmu/hw/vfio/spapr.o
CC x86_64-softmmu/migration/ram.o
CC tricore-softmmu/hw/tricore/tricore_testboard.o
CC unicore32-softmmu/hw/core/generic-loader.o
CC xtensaeb-softmmu/cputlb.o
CC tricore-softmmu/target/tricore/translate.o
CC unicore32-softmmu/hw/core/null-machine.o
CC x86_64-softmmu/migration/savevm.o
CC unicore32-softmmu/hw/cpu/core.o
CC unicore32-softmmu/hw/net/vhost_net.o
CC x86_64-softmmu/xen-common-stub.o
CC unicore32-softmmu/hw/net/rocker/qmp-norocker.o
CC xtensaeb-softmmu/memory_mapping.o
CC x86_64-softmmu/xen-hvm-stub.o
CC unicore32-softmmu/hw/vfio/common.o
CC xtensaeb-softmmu/dump.o
CC x86_64-softmmu/hw/9pfs/virtio-9p-device.o
CC unicore32-softmmu/hw/vfio/platform.o
CC x86_64-softmmu/hw/block/virtio-blk.o
CC xtensaeb-softmmu/migration/ram.o
CC unicore32-softmmu/hw/vfio/spapr.o
CC x86_64-softmmu/hw/block/dataplane/virtio-blk.o
CC unicore32-softmmu/hw/unicore32/puv3.o
CC xtensaeb-softmmu/migration/savevm.o
CC x86_64-softmmu/hw/char/virtio-serial-bus.o
CC unicore32-softmmu/target/unicore32/translate.o
CC x86_64-softmmu/hw/core/nmi.o
CC x86_64-softmmu/hw/core/generic-loader.o
CC tricore-softmmu/target/tricore/helper.o
CC xtensaeb-softmmu/xen-common-stub.o
CC tricore-softmmu/target/tricore/cpu.o
CC x86_64-softmmu/hw/core/null-machine.o
CC xtensaeb-softmmu/xen-hvm-stub.o
CC unicore32-softmmu/target/unicore32/op_helper.o
CC tricore-softmmu/target/tricore/op_helper.o
CC x86_64-softmmu/hw/cpu/core.o
CC xtensaeb-softmmu/hw/core/nmi.o
CC unicore32-softmmu/target/unicore32/helper.o
CC x86_64-softmmu/hw/display/vga.o
CC xtensaeb-softmmu/hw/core/generic-loader.o
CC unicore32-softmmu/target/unicore32/cpu.o
CC xtensaeb-softmmu/hw/core/null-machine.o
CC unicore32-softmmu/target/unicore32/ucf64_helper.o
CC xtensaeb-softmmu/hw/cpu/core.o
CC tricore-softmmu/target/tricore/fpu_helper.o
CC unicore32-softmmu/target/unicore32/softmmu.o
CC xtensaeb-softmmu/hw/net/vhost_net.o
GEN trace/generated-helpers.c
CC tricore-softmmu/trace/control-target.o
CC x86_64-softmmu/hw/display/virtio-gpu.o
GEN trace/generated-helpers.c
CC unicore32-softmmu/trace/control-target.o
CC xtensaeb-softmmu/hw/net/rocker/qmp-norocker.o
CC tricore-softmmu/trace/generated-helpers.o
CC xtensaeb-softmmu/hw/vfio/common.o
LINK tricore-softmmu/qemu-system-tricore
CC unicore32-softmmu/trace/generated-helpers.o
CC x86_64-softmmu/hw/display/virtio-gpu-3d.o
LINK unicore32-softmmu/qemu-system-unicore32
CC xtensaeb-softmmu/hw/vfio/platform.o
CC xtensaeb-softmmu/hw/vfio/spapr.o
CC x86_64-softmmu/hw/display/virtio-gpu-pci.o
CC xtensaeb-softmmu/hw/xtensa/pic_cpu.o
CC xtensaeb-softmmu/hw/xtensa/sim.o
CC x86_64-softmmu/hw/display/virtio-vga.o
CC x86_64-softmmu/hw/intc/apic.o
CC xtensaeb-softmmu/hw/xtensa/xtfpga.o
GEN xtensa-softmmu/hmp-commands.h
GEN xtensa-softmmu/hmp-commands-info.h
GEN xtensa-softmmu/config-target.h
CC xtensaeb-softmmu/target/xtensa/xtensa-semi.o
CC x86_64-softmmu/hw/intc/apic_common.o
CC xtensa-softmmu/exec.o
CC xtensaeb-softmmu/target/xtensa/core-dc232b.o
CC x86_64-softmmu/hw/intc/ioapic.o
CC xtensaeb-softmmu/target/xtensa/core-dc233c.o
CC xtensa-softmmu/translate-all.o
CC x86_64-softmmu/hw/isa/lpc_ich9.o
CC xtensaeb-softmmu/target/xtensa/core-fsf.o
CC xtensa-softmmu/cpu-exec.o
CC x86_64-softmmu/hw/misc/vmport.o
CC xtensa-softmmu/translate-common.o
CC xtensaeb-softmmu/target/xtensa/monitor.o
CC x86_64-softmmu/hw/misc/ivshmem.o
CC xtensa-softmmu/cpu-exec-common.o
CC xtensaeb-softmmu/target/xtensa/translate.o
CC xtensa-softmmu/tcg/tcg.o
CC x86_64-softmmu/hw/misc/pvpanic.o
CC x86_64-softmmu/hw/misc/edu.o
GEN aarch64-linux-user/config-target.h
CC x86_64-softmmu/hw/net/virtio-net.o
CC aarch64-linux-user/exec.o
CC aarch64-linux-user/translate-all.o
CC x86_64-softmmu/hw/net/vhost_net.o
CC x86_64-softmmu/hw/scsi/virtio-scsi.o
CC xtensaeb-softmmu/target/xtensa/op_helper.o
CC aarch64-linux-user/cpu-exec.o
CC xtensa-softmmu/tcg/tcg-op.o
CC x86_64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC x86_64-softmmu/hw/scsi/vhost-scsi.o
CC aarch64-linux-user/translate-common.o
CC xtensaeb-softmmu/target/xtensa/helper.o
CC x86_64-softmmu/hw/timer/mc146818rtc.o
CC aarch64-linux-user/cpu-exec-common.o
CC xtensaeb-softmmu/target/xtensa/cpu.o
CC aarch64-linux-user/tcg/tcg.o
CC xtensaeb-softmmu/target/xtensa/gdbstub.o
CC x86_64-softmmu/hw/vfio/common.o
GEN trace/generated-helpers.c
CC xtensaeb-softmmu/trace/control-target.o
CC xtensa-softmmu/tcg/optimize.o
CC xtensaeb-softmmu/trace/generated-helpers.o
CC x86_64-softmmu/hw/vfio/pci.o
LINK xtensaeb-softmmu/qemu-system-xtensaeb
CC xtensa-softmmu/tcg/tcg-common.o
CC aarch64-linux-user/tcg/tcg-op.o
CC xtensa-softmmu/fpu/softfloat.o
CC x86_64-softmmu/hw/vfio/pci-quirks.o
CC x86_64-softmmu/hw/vfio/platform.o
GEN alpha-linux-user/config-target.h
CC alpha-linux-user/exec.o
CC x86_64-softmmu/hw/vfio/spapr.o
CC alpha-linux-user/translate-all.o
CC x86_64-softmmu/hw/virtio/virtio.o
CC alpha-linux-user/cpu-exec.o
CC aarch64-linux-user/tcg/optimize.o
CC alpha-linux-user/translate-common.o
CC xtensa-softmmu/disas.o
CC alpha-linux-user/cpu-exec-common.o
CC x86_64-softmmu/hw/virtio/virtio-balloon.o
CC xtensa-softmmu/tcg-runtime.o
CC alpha-linux-user/tcg/tcg.o
CC xtensa-softmmu/hax-stub.o
CC x86_64-softmmu/hw/virtio/vhost.o
CC aarch64-linux-user/tcg/tcg-common.o
CC xtensa-softmmu/kvm-stub.o
CC aarch64-linux-user/fpu/softfloat.o
CC xtensa-softmmu/arch_init.o
CC xtensa-softmmu/cpus.o
CC x86_64-softmmu/hw/virtio/vhost-backend.o
CC xtensa-softmmu/monitor.o
CC alpha-linux-user/tcg/tcg-op.o
CC x86_64-softmmu/hw/virtio/vhost-user.o
CC x86_64-softmmu/hw/virtio/vhost-vsock.o
CC x86_64-softmmu/hw/virtio/virtio-crypto.o
CC aarch64-linux-user/disas.o
CC x86_64-softmmu/hw/virtio/virtio-crypto-pci.o
CC xtensa-softmmu/gdbstub.o
CC aarch64-linux-user/tcg-runtime.o
CC alpha-linux-user/tcg/optimize.o
CC x86_64-softmmu/hw/i386/multiboot.o
CC x86_64-softmmu/hw/i386/pc.o
CC xtensa-softmmu/balloon.o
GEN aarch64-linux-user/gdbstub-xml.c
CC xtensa-softmmu/ioport.o
CC alpha-linux-user/tcg/tcg-common.o
CC x86_64-softmmu/hw/i386/pc_piix.o
CC xtensa-softmmu/numa.o
CC aarch64-linux-user/hax-stub.o
CC alpha-linux-user/fpu/softfloat.o
CC aarch64-linux-user/kvm-stub.o
CC xtensa-softmmu/qtest.o
CC x86_64-softmmu/hw/i386/pc_q35.o
CC aarch64-linux-user/gdbstub.o
CC xtensa-softmmu/bootdevice.o
CC x86_64-softmmu/hw/i386/pc_sysfw.o
CC xtensa-softmmu/memory.o
CC aarch64-linux-user/thunk.o
CC x86_64-softmmu/hw/i386/x86-iommu.o
CC x86_64-softmmu/hw/i386/intel_iommu.o
CC aarch64-linux-user/user-exec.o
CC aarch64-linux-user/user-exec-stub.o
CC xtensa-softmmu/cputlb.o
CC alpha-linux-user/disas.o
CC aarch64-linux-user/linux-user/main.o
CC x86_64-softmmu/hw/i386/amd_iommu.o
CC alpha-linux-user/tcg-runtime.o
CC aarch64-linux-user/linux-user/syscall.o
CC x86_64-softmmu/hw/i386/kvmvapic.o
CC alpha-linux-user/hax-stub.o
CC xtensa-softmmu/memory_mapping.o
CC alpha-linux-user/kvm-stub.o
CC x86_64-softmmu/hw/i386/acpi-build.o
CC xtensa-softmmu/dump.o
CC alpha-linux-user/gdbstub.o
CC xtensa-softmmu/migration/ram.o
CC alpha-linux-user/thunk.o
CC x86_64-softmmu/hw/i386/pci-assign-load-rom.o
CC alpha-linux-user/user-exec.o
CC x86_64-softmmu/target/i386/translate.o
CC xtensa-softmmu/migration/savevm.o
CC alpha-linux-user/user-exec-stub.o
CC alpha-linux-user/linux-user/main.o
CC aarch64-linux-user/linux-user/strace.o
CC xtensa-softmmu/xen-common-stub.o
CC alpha-linux-user/linux-user/syscall.o
CC xtensa-softmmu/xen-hvm-stub.o
CC aarch64-linux-user/linux-user/mmap.o
CC xtensa-softmmu/hw/core/nmi.o
CC xtensa-softmmu/hw/core/generic-loader.o
CC aarch64-linux-user/linux-user/signal.o
CC xtensa-softmmu/hw/core/null-machine.o
CC aarch64-linux-user/linux-user/elfload.o
CC xtensa-softmmu/hw/cpu/core.o
CC xtensa-softmmu/hw/net/vhost_net.o
CC aarch64-linux-user/linux-user/linuxload.o
CC xtensa-softmmu/hw/net/rocker/qmp-norocker.o
CC xtensa-softmmu/hw/vfio/common.o
CC aarch64-linux-user/linux-user/uaccess.o
CC alpha-linux-user/linux-user/strace.o
CC aarch64-linux-user/linux-user/uname.o
CCAS aarch64-linux-user/linux-user/safe-syscall.o
CC xtensa-softmmu/hw/vfio/platform.o
CC aarch64-linux-user/linux-user/flatload.o
CC alpha-linux-user/linux-user/mmap.o
CC aarch64-linux-user/target/arm/arm-semi.o
CC xtensa-softmmu/hw/vfio/spapr.o
CC alpha-linux-user/linux-user/signal.o
CC x86_64-softmmu/target/i386/helper.o
CC aarch64-linux-user/target/arm/kvm-stub.o
CC xtensa-softmmu/hw/xtensa/pic_cpu.o
CC aarch64-linux-user/target/arm/translate.o
CC alpha-linux-user/linux-user/elfload.o
CC x86_64-softmmu/target/i386/cpu.o
CC xtensa-softmmu/hw/xtensa/sim.o
CC xtensa-softmmu/hw/xtensa/xtfpga.o
CC alpha-linux-user/linux-user/linuxload.o
CC xtensa-softmmu/target/xtensa/xtensa-semi.o
CC alpha-linux-user/linux-user/uaccess.o
CC x86_64-softmmu/target/i386/bpt_helper.o
CC alpha-linux-user/linux-user/uname.o
CC xtensa-softmmu/target/xtensa/core-dc232b.o
CC x86_64-softmmu/target/i386/excp_helper.o
CC xtensa-softmmu/target/xtensa/core-dc233c.o
CCAS alpha-linux-user/linux-user/safe-syscall.o
CC xtensa-softmmu/target/xtensa/core-fsf.o
CC x86_64-softmmu/target/i386/fpu_helper.o
CC alpha-linux-user/target/alpha/translate.o
CC xtensa-softmmu/target/xtensa/monitor.o
CC xtensa-softmmu/target/xtensa/translate.o
CC alpha-linux-user/target/alpha/helper.o
CC alpha-linux-user/target/alpha/cpu.o
CC alpha-linux-user/target/alpha/int_helper.o
CC xtensa-softmmu/target/xtensa/op_helper.o
CC alpha-linux-user/target/alpha/fpu_helper.o
CC x86_64-softmmu/target/i386/cc_helper.o
CC alpha-linux-user/target/alpha/vax_helper.o
CC xtensa-softmmu/target/xtensa/helper.o
CC x86_64-softmmu/target/i386/int_helper.o
CC aarch64-linux-user/target/arm/op_helper.o
CC alpha-linux-user/target/alpha/sys_helper.o
CC xtensa-softmmu/target/xtensa/cpu.o
CC alpha-linux-user/target/alpha/mem_helper.o
CC xtensa-softmmu/target/xtensa/gdbstub.o
CC x86_64-softmmu/target/i386/svm_helper.o
CC alpha-linux-user/target/alpha/gdbstub.o
CC aarch64-linux-user/target/arm/helper.o
GEN trace/generated-helpers.c
CC xtensa-softmmu/trace/control-target.o
GEN trace/generated-helpers.c
CC alpha-linux-user/trace/control-target.o
CC x86_64-softmmu/target/i386/smm_helper.o
CC xtensa-softmmu/trace/generated-helpers.o
CC alpha-linux-user/trace/generated-helpers.o
CC x86_64-softmmu/target/i386/misc_helper.o
LINK xtensa-softmmu/qemu-system-xtensa
LINK alpha-linux-user/qemu-alpha
CC x86_64-softmmu/target/i386/mem_helper.o
CC x86_64-softmmu/target/i386/seg_helper.o
GEN armeb-linux-user/config-target.h
CC armeb-linux-user/exec.o
CC aarch64-linux-user/target/arm/cpu.o
CC aarch64-linux-user/target/arm/neon_helper.o
GEN arm-linux-user/config-target.h
CC armeb-linux-user/translate-all.o
CC arm-linux-user/exec.o
CC arm-linux-user/translate-all.o
CC armeb-linux-user/cpu-exec.o
CC aarch64-linux-user/target/arm/iwmmxt_helper.o
CC arm-linux-user/cpu-exec.o
CC armeb-linux-user/translate-common.o
CC x86_64-softmmu/target/i386/mpx_helper.o
CC arm-linux-user/translate-common.o
CC armeb-linux-user/cpu-exec-common.o
CC aarch64-linux-user/target/arm/gdbstub.o
CC arm-linux-user/cpu-exec-common.o
CC x86_64-softmmu/target/i386/gdbstub.o
CC armeb-linux-user/tcg/tcg.o
CC aarch64-linux-user/target/arm/cpu64.o
CC arm-linux-user/tcg/tcg.o
CC x86_64-softmmu/target/i386/machine.o
CC aarch64-linux-user/target/arm/translate-a64.o
CC x86_64-softmmu/target/i386/arch_memory_mapping.o
CC x86_64-softmmu/target/i386/arch_dump.o
CC x86_64-softmmu/target/i386/monitor.o
CC armeb-linux-user/tcg/tcg-op.o
CC x86_64-softmmu/target/i386/kvm-stub.o
CC arm-linux-user/tcg/tcg-op.o
GEN trace/generated-helpers.c
CC x86_64-softmmu/trace/control-target.o
CC x86_64-softmmu/trace/generated-helpers.o
LINK x86_64-softmmu/qemu-system-x86_64
CC aarch64-linux-user/target/arm/helper-a64.o
CC armeb-linux-user/tcg/optimize.o
CC arm-linux-user/tcg/optimize.o
CC aarch64-linux-user/target/arm/gdbstub64.o
CC aarch64-linux-user/target/arm/crypto_helper.o
GEN trace/generated-helpers.c
CC aarch64-linux-user/trace/control-target.o
CC arm-linux-user/tcg/tcg-common.o
CC arm-linux-user/fpu/softfloat.o
CC armeb-linux-user/tcg/tcg-common.o
CC aarch64-linux-user/gdbstub-xml.o
CC arm-linux-user/disas.o
CC armeb-linux-user/fpu/softfloat.o
CC aarch64-linux-user/trace/generated-helpers.o
CC arm-linux-user/tcg-runtime.o
LINK aarch64-linux-user/qemu-aarch64
GEN arm-linux-user/gdbstub-xml.c
GEN cris-linux-user/config-target.h
CC cris-linux-user/exec.o
CC arm-linux-user/hax-stub.o
CC cris-linux-user/translate-all.o
CC cris-linux-user/cpu-exec.o
CC arm-linux-user/kvm-stub.o
CC armeb-linux-user/disas.o
CC arm-linux-user/gdbstub.o
CC armeb-linux-user/tcg-runtime.o
CC cris-linux-user/translate-common.o
CC cris-linux-user/cpu-exec-common.o
GEN armeb-linux-user/gdbstub-xml.c
CC armeb-linux-user/hax-stub.o
CC arm-linux-user/thunk.o
CC cris-linux-user/tcg/tcg.o
CC armeb-linux-user/kvm-stub.o
CC arm-linux-user/user-exec.o
CC cris-linux-user/tcg/tcg-op.o
CC arm-linux-user/user-exec-stub.o
CC armeb-linux-user/gdbstub.o
CC arm-linux-user/linux-user/main.o
CC armeb-linux-user/thunk.o
CC arm-linux-user/linux-user/syscall.o
CC armeb-linux-user/user-exec.o
CC armeb-linux-user/user-exec-stub.o
CC armeb-linux-user/linux-user/main.o
CC cris-linux-user/tcg/optimize.o
GEN hppa-linux-user/config-target.h
CC hppa-linux-user/exec.o
CC armeb-linux-user/linux-user/syscall.o
CC cris-linux-user/tcg/tcg-common.o
CC hppa-linux-user/translate-all.o
CC cris-linux-user/fpu/softfloat.o
CC hppa-linux-user/cpu-exec.o
CC hppa-linux-user/translate-common.o
CC hppa-linux-user/cpu-exec-common.o
CC hppa-linux-user/tcg/tcg.o
CC arm-linux-user/linux-user/strace.o
CC cris-linux-user/disas.o
CC arm-linux-user/linux-user/mmap.o
CC cris-linux-user/tcg-runtime.o
CC hppa-linux-user/tcg/tcg-op.o
CC arm-linux-user/linux-user/signal.o
CC armeb-linux-user/linux-user/strace.o
CC cris-linux-user/hax-stub.o
CC arm-linux-user/linux-user/elfload.o
CC cris-linux-user/kvm-stub.o
CC armeb-linux-user/linux-user/mmap.o
CC cris-linux-user/gdbstub.o
CC arm-linux-user/linux-user/linuxload.o
CC armeb-linux-user/linux-user/signal.o
CC cris-linux-user/thunk.o
CC arm-linux-user/linux-user/uaccess.o
CC armeb-linux-user/linux-user/elfload.o
CC cris-linux-user/user-exec.o
CC cris-linux-user/user-exec-stub.o
CC arm-linux-user/linux-user/uname.o
CC hppa-linux-user/tcg/optimize.o
CC cris-linux-user/linux-user/main.o
CCAS arm-linux-user/linux-user/safe-syscall.o
CC arm-linux-user/linux-user/flatload.o
CC armeb-linux-user/linux-user/linuxload.o
CC cris-linux-user/linux-user/syscall.o
CC arm-linux-user/linux-user/arm/nwfpe/fpa11.o
CC armeb-linux-user/linux-user/uaccess.o
CC hppa-linux-user/tcg/tcg-common.o
CC arm-linux-user/linux-user/arm/nwfpe/fpa11_cpdo.o
CC armeb-linux-user/linux-user/uname.o
CC hppa-linux-user/fpu/softfloat.o
CC arm-linux-user/linux-user/arm/nwfpe/fpa11_cpdt.o
CCAS armeb-linux-user/linux-user/safe-syscall.o
CC armeb-linux-user/linux-user/flatload.o
CC arm-linux-user/linux-user/arm/nwfpe/fpa11_cprt.o
CC armeb-linux-user/linux-user/arm/nwfpe/fpa11.o
CC arm-linux-user/linux-user/arm/nwfpe/fpopcode.o
CC armeb-linux-user/linux-user/arm/nwfpe/fpa11_cpdo.o
CC armeb-linux-user/linux-user/arm/nwfpe/fpa11_cpdt.o
CC arm-linux-user/linux-user/arm/nwfpe/single_cpdo.o
CC hppa-linux-user/disas.o
CC arm-linux-user/linux-user/arm/nwfpe/double_cpdo.o
CC armeb-linux-user/linux-user/arm/nwfpe/fpa11_cprt.o
CC hppa-linux-user/tcg-runtime.o
CC arm-linux-user/linux-user/arm/nwfpe/extended_cpdo.o
CC armeb-linux-user/linux-user/arm/nwfpe/fpopcode.o
CC arm-linux-user/target/arm/arm-semi.o
CC armeb-linux-user/linux-user/arm/nwfpe/single_cpdo.o
CC hppa-linux-user/hax-stub.o
CC cris-linux-user/linux-user/strace.o
CC armeb-linux-user/linux-user/arm/nwfpe/double_cpdo.o
CC hppa-linux-user/kvm-stub.o
CC arm-linux-user/target/arm/kvm-stub.o
CC armeb-linux-user/linux-user/arm/nwfpe/extended_cpdo.o
CC hppa-linux-user/gdbstub.o
CC arm-linux-user/target/arm/translate.o
CC cris-linux-user/linux-user/mmap.o
CC armeb-linux-user/target/arm/arm-semi.o
CC hppa-linux-user/thunk.o
CC cris-linux-user/linux-user/signal.o
CC armeb-linux-user/target/arm/kvm-stub.o
CC hppa-linux-user/user-exec.o
CC cris-linux-user/linux-user/elfload.o
CC armeb-linux-user/target/arm/translate.o
CC hppa-linux-user/user-exec-stub.o
CC hppa-linux-user/linux-user/main.o
CC cris-linux-user/linux-user/linuxload.o
CC hppa-linux-user/linux-user/syscall.o
CC cris-linux-user/linux-user/uaccess.o
CC cris-linux-user/linux-user/uname.o
CCAS cris-linux-user/linux-user/safe-syscall.o
CC cris-linux-user/target/cris/translate.o
CC arm-linux-user/target/arm/op_helper.o
CC cris-linux-user/target/cris/op_helper.o
CC hppa-linux-user/linux-user/strace.o
CC arm-linux-user/target/arm/helper.o
CC cris-linux-user/target/cris/helper.o
CC cris-linux-user/target/cris/cpu.o
CC hppa-linux-user/linux-user/mmap.o
CC cris-linux-user/target/cris/gdbstub.o
CC armeb-linux-user/target/arm/op_helper.o
GEN trace/generated-helpers.c
CC cris-linux-user/trace/control-target.o
CC hppa-linux-user/linux-user/signal.o
CC arm-linux-user/target/arm/cpu.o
CC hppa-linux-user/linux-user/elfload.o
CC cris-linux-user/trace/generated-helpers.o
CC armeb-linux-user/target/arm/helper.o
CC arm-linux-user/target/arm/neon_helper.o
LINK cris-linux-user/qemu-cris
CC hppa-linux-user/linux-user/linuxload.o
CC hppa-linux-user/linux-user/uaccess.o
CC armeb-linux-user/target/arm/cpu.o
CC hppa-linux-user/linux-user/uname.o
CCAS hppa-linux-user/linux-user/safe-syscall.o
CC armeb-linux-user/target/arm/neon_helper.o
CC arm-linux-user/target/arm/iwmmxt_helper.o
CC hppa-linux-user/target/hppa/translate.o
CC hppa-linux-user/target/hppa/helper.o
CC arm-linux-user/target/arm/gdbstub.o
GEN i386-linux-user/config-target.h
CC armeb-linux-user/target/arm/iwmmxt_helper.o
CC i386-linux-user/exec.o
CC arm-linux-user/target/arm/crypto_helper.o
CC hppa-linux-user/target/hppa/cpu.o
CC hppa-linux-user/target/hppa/op_helper.o
GEN trace/generated-helpers.c
CC arm-linux-user/trace/control-target.o
CC i386-linux-user/translate-all.o
CC hppa-linux-user/target/hppa/gdbstub.o
CC armeb-linux-user/target/arm/gdbstub.o
CC arm-linux-user/gdbstub-xml.o
CC armeb-linux-user/target/arm/crypto_helper.o
GEN trace/generated-helpers.c
CC arm-linux-user/trace/generated-helpers.o
CC hppa-linux-user/trace/control-target.o
CC i386-linux-user/cpu-exec.o
LINK arm-linux-user/qemu-arm
GEN trace/generated-helpers.c
CC armeb-linux-user/trace/control-target.o
CC hppa-linux-user/trace/generated-helpers.o
CC i386-linux-user/translate-common.o
CC armeb-linux-user/gdbstub-xml.o
LINK hppa-linux-user/qemu-hppa
CC i386-linux-user/cpu-exec-common.o
GEN m68k-linux-user/config-target.h
CC armeb-linux-user/trace/generated-helpers.o
CC i386-linux-user/tcg/tcg.o
CC m68k-linux-user/exec.o
LINK armeb-linux-user/qemu-armeb
GEN microblazeel-linux-user/config-target.h
CC m68k-linux-user/translate-all.o
CC microblazeel-linux-user/exec.o
CC microblazeel-linux-user/translate-all.o
CC microblazeel-linux-user/cpu-exec.o
CC m68k-linux-user/cpu-exec.o
CC microblazeel-linux-user/translate-common.o
CC microblazeel-linux-user/cpu-exec-common.o
CC microblazeel-linux-user/tcg/tcg.o
CC m68k-linux-user/translate-common.o
CC i386-linux-user/tcg/tcg-op.o
CC microblazeel-linux-user/tcg/tcg-op.o
CC m68k-linux-user/cpu-exec-common.o
CC m68k-linux-user/tcg/tcg.o
CC i386-linux-user/tcg/optimize.o
CC i386-linux-user/tcg/tcg-common.o
CC microblazeel-linux-user/tcg/optimize.o
CC i386-linux-user/fpu/softfloat.o
CC m68k-linux-user/tcg/tcg-op.o
CC i386-linux-user/disas.o
GEN microblaze-linux-user/config-target.h
CC microblazeel-linux-user/tcg/tcg-common.o
CC microblazeel-linux-user/fpu/softfloat.o
CC microblaze-linux-user/exec.o
CC microblaze-linux-user/translate-all.o
CC m68k-linux-user/tcg/optimize.o
CC microblaze-linux-user/cpu-exec.o
CC microblaze-linux-user/translate-common.o
CC m68k-linux-user/tcg/tcg-common.o
CC i386-linux-user/tcg-runtime.o
CC microblaze-linux-user/cpu-exec-common.o
CC m68k-linux-user/fpu/softfloat.o
CC microblaze-linux-user/tcg/tcg.o
CC i386-linux-user/hax-stub.o
CC microblazeel-linux-user/disas.o
CC i386-linux-user/kvm-stub.o
CC microblazeel-linux-user/tcg-runtime.o
CC i386-linux-user/gdbstub.o
CC microblazeel-linux-user/hax-stub.o
CC microblazeel-linux-user/kvm-stub.o
CC i386-linux-user/thunk.o
CC i386-linux-user/user-exec.o
CC microblazeel-linux-user/gdbstub.o
CC i386-linux-user/user-exec-stub.o
CC microblaze-linux-user/tcg/tcg-op.o
CC microblazeel-linux-user/thunk.o
CC i386-linux-user/linux-user/main.o
CC microblazeel-linux-user/user-exec.o
CC i386-linux-user/linux-user/syscall.o
CC microblazeel-linux-user/user-exec-stub.o
CC m68k-linux-user/disas.o
CC microblazeel-linux-user/linux-user/main.o
CC m68k-linux-user/tcg-runtime.o
CC microblazeel-linux-user/linux-user/syscall.o
GEN m68k-linux-user/gdbstub-xml.c
CC m68k-linux-user/hax-stub.o
CC microblaze-linux-user/tcg/optimize.o
CC m68k-linux-user/kvm-stub.o
CC m68k-linux-user/gdbstub.o
CC m68k-linux-user/thunk.o
CC microblaze-linux-user/tcg/tcg-common.o
CC microblaze-linux-user/fpu/softfloat.o
CC m68k-linux-user/user-exec.o
CC m68k-linux-user/user-exec-stub.o
CC m68k-linux-user/linux-user/main.o
CC m68k-linux-user/linux-user/syscall.o
CC microblazeel-linux-user/linux-user/strace.o
CC i386-linux-user/linux-user/strace.o
CC microblaze-linux-user/disas.o
CC microblaze-linux-user/tcg-runtime.o
CC microblazeel-linux-user/linux-user/mmap.o
CC i386-linux-user/linux-user/mmap.o
CC microblazeel-linux-user/linux-user/signal.o
CC microblaze-linux-user/hax-stub.o
CC i386-linux-user/linux-user/signal.o
CC microblaze-linux-user/kvm-stub.o
CC microblaze-linux-user/gdbstub.o
CC microblazeel-linux-user/linux-user/elfload.o
CC i386-linux-user/linux-user/elfload.o
CC microblaze-linux-user/thunk.o
CC microblazeel-linux-user/linux-user/linuxload.o
CC microblaze-linux-user/user-exec.o
CC i386-linux-user/linux-user/linuxload.o
CC microblazeel-linux-user/linux-user/uaccess.o
CC microblaze-linux-user/user-exec-stub.o
CC i386-linux-user/linux-user/uaccess.o
CC m68k-linux-user/linux-user/strace.o
CC microblazeel-linux-user/linux-user/uname.o
CC i386-linux-user/linux-user/uname.o
CC microblaze-linux-user/linux-user/main.o
CCAS microblazeel-linux-user/linux-user/safe-syscall.o
CC microblazeel-linux-user/linux-user/flatload.o
CCAS i386-linux-user/linux-user/safe-syscall.o
CC i386-linux-user/linux-user/vm86.o
CC microblaze-linux-user/linux-user/syscall.o
CC m68k-linux-user/linux-user/mmap.o
CC i386-linux-user/target/i386/translate.o
CC microblazeel-linux-user/target/microblaze/translate.o
CC m68k-linux-user/linux-user/signal.o
CC m68k-linux-user/linux-user/elfload.o
CC microblazeel-linux-user/target/microblaze/op_helper.o
CC microblazeel-linux-user/target/microblaze/helper.o
CC microblazeel-linux-user/target/microblaze/cpu.o
CC m68k-linux-user/linux-user/linuxload.o
CC microblazeel-linux-user/target/microblaze/gdbstub.o
CC m68k-linux-user/linux-user/uaccess.o
GEN trace/generated-helpers.c
CC microblazeel-linux-user/trace/control-target.o
CC m68k-linux-user/linux-user/uname.o
CCAS m68k-linux-user/linux-user/safe-syscall.o
CC m68k-linux-user/linux-user/flatload.o
CC microblazeel-linux-user/trace/generated-helpers.o
CC m68k-linux-user/linux-user/m68k-sim.o
CC m68k-linux-user/target/m68k/m68k-semi.o
LINK microblazeel-linux-user/qemu-microblazeel
CC m68k-linux-user/target/m68k/translate.o
CC microblaze-linux-user/linux-user/strace.o
GEN mips64el-linux-user/config-target.h
CC mips64el-linux-user/exec.o
CC microblaze-linux-user/linux-user/mmap.o
CC mips64el-linux-user/translate-all.o
CC microblaze-linux-user/linux-user/signal.o
CC i386-linux-user/target/i386/helper.o
CC mips64el-linux-user/cpu-exec.o
CC m68k-linux-user/target/m68k/op_helper.o
CC i386-linux-user/target/i386/cpu.o
CC microblaze-linux-user/linux-user/elfload.o
CC mips64el-linux-user/translate-common.o
CC m68k-linux-user/target/m68k/helper.o
CC mips64el-linux-user/cpu-exec-common.o
CC m68k-linux-user/target/m68k/cpu.o
CC i386-linux-user/target/i386/bpt_helper.o
CC microblaze-linux-user/linux-user/linuxload.o
CC mips64el-linux-user/tcg/tcg.o
CC m68k-linux-user/target/m68k/gdbstub.o
CC i386-linux-user/target/i386/excp_helper.o
CC microblaze-linux-user/linux-user/uaccess.o
GEN trace/generated-helpers.c
CC m68k-linux-user/trace/control-target.o
CC i386-linux-user/target/i386/fpu_helper.o
CC microblaze-linux-user/linux-user/uname.o
CC m68k-linux-user/gdbstub-xml.o
CCAS microblaze-linux-user/linux-user/safe-syscall.o
CC microblaze-linux-user/linux-user/flatload.o
CC m68k-linux-user/trace/generated-helpers.o
LINK m68k-linux-user/qemu-m68k
CC microblaze-linux-user/target/microblaze/translate.o
CC i386-linux-user/target/i386/cc_helper.o
CC mips64el-linux-user/tcg/tcg-op.o
CC mips64el-linux-user/tcg/optimize.o
CC i386-linux-user/target/i386/int_helper.o
CC microblaze-linux-user/target/microblaze/op_helper.o
CC i386-linux-user/target/i386/svm_helper.o
CC microblaze-linux-user/target/microblaze/helper.o
CC i386-linux-user/target/i386/smm_helper.o
CC i386-linux-user/target/i386/misc_helper.o
CC microblaze-linux-user/target/microblaze/cpu.o
CC microblaze-linux-user/target/microblaze/gdbstub.o
CC i386-linux-user/target/i386/mem_helper.o
GEN trace/generated-helpers.c
CC microblaze-linux-user/trace/control-target.o
CC i386-linux-user/target/i386/seg_helper.o
GEN mips64-linux-user/config-target.h
CC mips64el-linux-user/tcg/tcg-common.o
CC mips64-linux-user/exec.o
CC microblaze-linux-user/trace/generated-helpers.o
LINK microblaze-linux-user/qemu-microblaze
CC mips64el-linux-user/fpu/softfloat.o
CC mips64-linux-user/translate-all.o
CC mips64-linux-user/cpu-exec.o
GEN mipsel-linux-user/config-target.h
CC mipsel-linux-user/exec.o
CC mips64-linux-user/translate-common.o
CC mipsel-linux-user/translate-all.o
CC mips64-linux-user/cpu-exec-common.o
CC i386-linux-user/target/i386/mpx_helper.o
CC mipsel-linux-user/cpu-exec.o
CC mips64-linux-user/tcg/tcg.o
CC mipsel-linux-user/translate-common.o
CC mipsel-linux-user/cpu-exec-common.o
CC i386-linux-user/target/i386/gdbstub.o
CC mipsel-linux-user/tcg/tcg.o
CC i386-linux-user/target/i386/kvm-stub.o
GEN trace/generated-helpers.c
CC i386-linux-user/trace/control-target.o
CC mips64el-linux-user/disas.o
CC i386-linux-user/trace/generated-helpers.o
CC mips64el-linux-user/tcg-runtime.o
LINK i386-linux-user/qemu-i386
CC mips64-linux-user/tcg/tcg-op.o
CC mipsel-linux-user/tcg/tcg-op.o
CC mipsel-linux-user/tcg/optimize.o
CC mips64el-linux-user/hax-stub.o
CC mips64el-linux-user/kvm-stub.o
CC mips64el-linux-user/gdbstub.o
CC mips64-linux-user/tcg/optimize.o
CC mips64el-linux-user/thunk.o
CC mipsel-linux-user/tcg/tcg-common.o
CC mips64-linux-user/tcg/tcg-common.o
CC mips64el-linux-user/user-exec.o
CC mipsel-linux-user/fpu/softfloat.o
CC mips64el-linux-user/user-exec-stub.o
CC mipsel-linux-user/disas.o
CC mips64el-linux-user/linux-user/main.o
CC mips64-linux-user/fpu/softfloat.o
CC mips64-linux-user/disas.o
CC mips64el-linux-user/linux-user/syscall.o
CC mipsel-linux-user/tcg-runtime.o
CC mips64-linux-user/tcg-runtime.o
CC mipsel-linux-user/hax-stub.o
CC mips64el-linux-user/linux-user/strace.o
CC mipsel-linux-user/kvm-stub.o
CC mipsel-linux-user/gdbstub.o
GEN mips-linux-user/config-target.h
CC mips64-linux-user/hax-stub.o
CC mips-linux-user/exec.o
CC mipsel-linux-user/thunk.o
CC mips64-linux-user/kvm-stub.o
CC mips-linux-user/translate-all.o
CC mipsel-linux-user/user-exec.o
CC mips64el-linux-user/linux-user/mmap.o
CC mips64-linux-user/gdbstub.o
CC mipsel-linux-user/user-exec-stub.o
CC mips-linux-user/cpu-exec.o
CC mips64-linux-user/thunk.o
CC mips64el-linux-user/linux-user/signal.o
CC mipsel-linux-user/linux-user/main.o
CC mips-linux-user/translate-common.o
CC mips64-linux-user/user-exec.o
CC mips-linux-user/cpu-exec-common.o
CC mips64-linux-user/user-exec-stub.o
CC mipsel-linux-user/linux-user/syscall.o
CC mips64el-linux-user/linux-user/elfload.o
CC mips-linux-user/tcg/tcg.o
CC mips64-linux-user/linux-user/main.o
CC mips64-linux-user/linux-user/syscall.o
CC mips64el-linux-user/linux-user/linuxload.o
CC mips64el-linux-user/linux-user/uaccess.o
CC mips64el-linux-user/linux-user/uname.o
CC mips-linux-user/tcg/tcg-op.o
CCAS mips64el-linux-user/linux-user/safe-syscall.o
CC mips64el-linux-user/target/mips/translate.o
CC mips64-linux-user/linux-user/strace.o
CC mipsel-linux-user/linux-user/strace.o
CC mips64-linux-user/linux-user/mmap.o
CC mips-linux-user/tcg/optimize.o
CC mips64-linux-user/linux-user/signal.o
CC mipsel-linux-user/linux-user/mmap.o
CC mips64-linux-user/linux-user/elfload.o
CC mips-linux-user/tcg/tcg-common.o
CC mipsel-linux-user/linux-user/signal.o
CC mips-linux-user/fpu/softfloat.o
CC mips64-linux-user/linux-user/linuxload.o
CC mipsel-linux-user/linux-user/elfload.o
CC mips64-linux-user/linux-user/uaccess.o
CC mips64-linux-user/linux-user/uname.o
CC mipsel-linux-user/linux-user/linuxload.o
CCAS mips64-linux-user/linux-user/safe-syscall.o
CC mips64-linux-user/target/mips/translate.o
CC mips64el-linux-user/target/mips/dsp_helper.o
CC mipsel-linux-user/linux-user/uaccess.o
CC mipsel-linux-user/linux-user/uname.o
CC mips-linux-user/disas.o
CCAS mipsel-linux-user/linux-user/safe-syscall.o
CC mipsel-linux-user/target/mips/translate.o
CC mips-linux-user/tcg-runtime.o
CC mips64el-linux-user/target/mips/op_helper.o
CC mips-linux-user/hax-stub.o
CC mips-linux-user/kvm-stub.o
CC mips-linux-user/gdbstub.o
CC mips-linux-user/thunk.o
CC mips-linux-user/user-exec.o
CC mips64el-linux-user/target/mips/lmi_helper.o
CC mips-linux-user/user-exec-stub.o
CC mips64el-linux-user/target/mips/helper.o
CC mips-linux-user/linux-user/main.o
CC mips64el-linux-user/target/mips/cpu.o
CC mips-linux-user/linux-user/syscall.o
CC mips64-linux-user/target/mips/dsp_helper.o
CC mips64el-linux-user/target/mips/gdbstub.o
CC mips64el-linux-user/target/mips/msa_helper.o
CC mipsel-linux-user/target/mips/dsp_helper.o
CC mips64-linux-user/target/mips/op_helper.o
CC mipsel-linux-user/target/mips/op_helper.o
CC mips-linux-user/linux-user/strace.o
CC mips-linux-user/linux-user/mmap.o
CC mips64-linux-user/target/mips/lmi_helper.o
CC mips64el-linux-user/target/mips/mips-semi.o
CC mips-linux-user/linux-user/signal.o
GEN trace/generated-helpers.c
CC mips64el-linux-user/trace/control-target.o
CC mips64el-linux-user/trace/generated-helpers.o
CC mips64-linux-user/target/mips/helper.o
LINK mips64el-linux-user/qemu-mips64el
CC mips64-linux-user/target/mips/cpu.o
CC mips-linux-user/linux-user/elfload.o
CC mipsel-linux-user/target/mips/lmi_helper.o
CC mips-linux-user/linux-user/linuxload.o
CC mips64-linux-user/target/mips/gdbstub.o
CC mipsel-linux-user/target/mips/helper.o
CC mips64-linux-user/target/mips/msa_helper.o
CC mips-linux-user/linux-user/uaccess.o
CC mipsel-linux-user/target/mips/cpu.o
GEN mipsn32el-linux-user/config-target.h
CC mipsn32el-linux-user/exec.o
CC mips-linux-user/linux-user/uname.o
CC mipsel-linux-user/target/mips/gdbstub.o
CC mipsn32el-linux-user/translate-all.o
CCAS mips-linux-user/linux-user/safe-syscall.o
CC mips-linux-user/target/mips/translate.o
CC mipsel-linux-user/target/mips/msa_helper.o
CC mipsn32el-linux-user/cpu-exec.o
CC mipsn32el-linux-user/translate-common.o
CC mipsn32el-linux-user/cpu-exec-common.o
CC mipsn32el-linux-user/tcg/tcg.o
CC mips64-linux-user/target/mips/mips-semi.o
GEN trace/generated-helpers.c
CC mips64-linux-user/trace/control-target.o
CC mips64-linux-user/trace/generated-helpers.o
LINK mips64-linux-user/qemu-mips64
CC mipsel-linux-user/target/mips/mips-semi.o
CC mipsn32el-linux-user/tcg/tcg-op.o
GEN trace/generated-helpers.c
GEN mipsn32-linux-user/config-target.h
CC mipsel-linux-user/trace/control-target.o
CC mipsn32-linux-user/exec.o
CC mipsel-linux-user/trace/generated-helpers.o
CC mipsn32-linux-user/translate-all.o
LINK mipsel-linux-user/qemu-mipsel
CC mips-linux-user/target/mips/dsp_helper.o
CC mips-linux-user/target/mips/op_helper.o
CC mipsn32-linux-user/cpu-exec.o
CC mipsn32-linux-user/translate-common.o
GEN nios2-linux-user/config-target.h
CC mipsn32-linux-user/cpu-exec-common.o
CC nios2-linux-user/exec.o
CC mipsn32el-linux-user/tcg/optimize.o
CC mipsn32-linux-user/tcg/tcg.o
CC nios2-linux-user/translate-all.o
CC nios2-linux-user/cpu-exec.o
CC mips-linux-user/target/mips/lmi_helper.o
CC mipsn32el-linux-user/tcg/tcg-common.o
CC nios2-linux-user/translate-common.o
CC mips-linux-user/target/mips/helper.o
CC mipsn32el-linux-user/fpu/softfloat.o
CC nios2-linux-user/cpu-exec-common.o
CC mips-linux-user/target/mips/cpu.o
CC mipsn32-linux-user/tcg/tcg-op.o
CC nios2-linux-user/tcg/tcg.o
CC mips-linux-user/target/mips/gdbstub.o
CC mips-linux-user/target/mips/msa_helper.o
CC nios2-linux-user/tcg/tcg-op.o
CC mipsn32-linux-user/tcg/optimize.o
CC mipsn32el-linux-user/disas.o
CC mipsn32el-linux-user/tcg-runtime.o
CC mipsn32el-linux-user/hax-stub.o
CC mipsn32-linux-user/tcg/tcg-common.o
CC mipsn32-linux-user/fpu/softfloat.o
CC mipsn32el-linux-user/kvm-stub.o
CC mipsn32el-linux-user/gdbstub.o
CC nios2-linux-user/tcg/optimize.o
CC mips-linux-user/target/mips/mips-semi.o
GEN trace/generated-helpers.c
CC mipsn32el-linux-user/thunk.o
CC mips-linux-user/trace/control-target.o
CC nios2-linux-user/tcg/tcg-common.o
CC mips-linux-user/trace/generated-helpers.o
CC mipsn32el-linux-user/user-exec.o
CC nios2-linux-user/fpu/softfloat.o
CC mipsn32el-linux-user/user-exec-stub.o
LINK mips-linux-user/qemu-mips
CC mipsn32el-linux-user/linux-user/main.o
CC nios2-linux-user/disas.o
CC mipsn32-linux-user/disas.o
CC nios2-linux-user/tcg-runtime.o
CC mipsn32el-linux-user/linux-user/syscall.o
CC mipsn32-linux-user/tcg-runtime.o
CC mipsn32-linux-user/hax-stub.o
GEN or1k-linux-user/config-target.h
CC or1k-linux-user/exec.o
CC mipsn32-linux-user/kvm-stub.o
CC nios2-linux-user/hax-stub.o
CC nios2-linux-user/kvm-stub.o
CC or1k-linux-user/translate-all.o
CC mipsn32-linux-user/gdbstub.o
CC nios2-linux-user/gdbstub.o
CC or1k-linux-user/cpu-exec.o
CC or1k-linux-user/translate-common.o
CC nios2-linux-user/thunk.o
CC mipsn32-linux-user/thunk.o
CC or1k-linux-user/cpu-exec-common.o
CC or1k-linux-user/tcg/tcg.o
CC nios2-linux-user/user-exec.o
CC mipsn32-linux-user/user-exec.o
CC nios2-linux-user/user-exec-stub.o
CC mipsn32-linux-user/user-exec-stub.o
CC mipsn32el-linux-user/linux-user/strace.o
CC nios2-linux-user/linux-user/main.o
CC mipsn32-linux-user/linux-user/main.o
CC mipsn32el-linux-user/linux-user/mmap.o
CC nios2-linux-user/linux-user/syscall.o
CC or1k-linux-user/tcg/tcg-op.o
CC mipsn32-linux-user/linux-user/syscall.o
CC mipsn32el-linux-user/linux-user/signal.o
CC mipsn32el-linux-user/linux-user/elfload.o
CC mipsn32el-linux-user/linux-user/linuxload.o
CC mipsn32el-linux-user/linux-user/uaccess.o
CC mipsn32el-linux-user/linux-user/uname.o
CC or1k-linux-user/tcg/optimize.o
CC nios2-linux-user/linux-user/strace.o
CCAS mipsn32el-linux-user/linux-user/safe-syscall.o
CC mipsn32el-linux-user/target/mips/translate.o
CC nios2-linux-user/linux-user/mmap.o
CC or1k-linux-user/tcg/tcg-common.o
CC mipsn32-linux-user/linux-user/strace.o
CC nios2-linux-user/linux-user/signal.o
CC or1k-linux-user/fpu/softfloat.o
CC nios2-linux-user/linux-user/elfload.o
CC mipsn32-linux-user/linux-user/mmap.o
CC mipsn32-linux-user/linux-user/signal.o
CC nios2-linux-user/linux-user/linuxload.o
CC mipsn32-linux-user/linux-user/elfload.o
CC nios2-linux-user/linux-user/uaccess.o
CC nios2-linux-user/linux-user/uname.o
CC mipsn32-linux-user/linux-user/linuxload.o
CC or1k-linux-user/disas.o
CCAS nios2-linux-user/linux-user/safe-syscall.o
CC nios2-linux-user/target/nios2/translate.o
CC or1k-linux-user/tcg-runtime.o
CC mipsn32-linux-user/linux-user/uaccess.o
CC nios2-linux-user/target/nios2/op_helper.o
CC mipsn32-linux-user/linux-user/uname.o
CC nios2-linux-user/target/nios2/helper.o
CC or1k-linux-user/hax-stub.o
CCAS mipsn32-linux-user/linux-user/safe-syscall.o
CC mipsn32-linux-user/target/mips/translate.o
CC nios2-linux-user/target/nios2/cpu.o
CC or1k-linux-user/kvm-stub.o
CC mipsn32el-linux-user/target/mips/dsp_helper.o
CC or1k-linux-user/gdbstub.o
CC nios2-linux-user/target/nios2/mmu.o
GEN trace/generated-helpers.c
CC nios2-linux-user/trace/control-target.o
CC or1k-linux-user/thunk.o
CC nios2-linux-user/trace/generated-helpers.o
CC mipsn32el-linux-user/target/mips/op_helper.o
LINK nios2-linux-user/qemu-nios2
CC or1k-linux-user/user-exec.o
CC or1k-linux-user/user-exec-stub.o
GEN ppc64abi32-linux-user/config-target.h
CC ppc64abi32-linux-user/exec.o
CC or1k-linux-user/linux-user/main.o
CC or1k-linux-user/linux-user/syscall.o
CC ppc64abi32-linux-user/translate-all.o
CC ppc64abi32-linux-user/cpu-exec.o
CC ppc64abi32-linux-user/translate-common.o
CC mipsn32el-linux-user/target/mips/lmi_helper.o
CC ppc64abi32-linux-user/cpu-exec-common.o
CC ppc64abi32-linux-user/tcg/tcg.o
CC mipsn32el-linux-user/target/mips/helper.o
CC mipsn32el-linux-user/target/mips/cpu.o
CC mipsn32el-linux-user/target/mips/gdbstub.o
CC mipsn32-linux-user/target/mips/dsp_helper.o
CC or1k-linux-user/linux-user/strace.o
CC mipsn32el-linux-user/target/mips/msa_helper.o
CC ppc64abi32-linux-user/tcg/tcg-op.o
CC or1k-linux-user/linux-user/mmap.o
CC mipsn32-linux-user/target/mips/op_helper.o
CC or1k-linux-user/linux-user/signal.o
CC or1k-linux-user/linux-user/elfload.o
CC or1k-linux-user/linux-user/linuxload.o
CC ppc64abi32-linux-user/tcg/optimize.o
CC or1k-linux-user/linux-user/uaccess.o
CC or1k-linux-user/linux-user/uname.o
CCAS or1k-linux-user/linux-user/safe-syscall.o
CC mipsn32-linux-user/target/mips/lmi_helper.o
CC or1k-linux-user/target/openrisc/cpu.o
CC or1k-linux-user/target/openrisc/exception.o
CC ppc64abi32-linux-user/tcg/tcg-common.o
CC mipsn32-linux-user/target/mips/helper.o
CC ppc64abi32-linux-user/fpu/softfloat.o
CC or1k-linux-user/target/openrisc/interrupt.o
CC mipsn32-linux-user/target/mips/cpu.o
CC or1k-linux-user/target/openrisc/mmu.o
CC mipsn32el-linux-user/target/mips/mips-semi.o
CC mipsn32-linux-user/target/mips/gdbstub.o
CC or1k-linux-user/target/openrisc/translate.o
GEN trace/generated-helpers.c
CC mipsn32el-linux-user/trace/control-target.o
CC mipsn32-linux-user/target/mips/msa_helper.o
CC mipsn32el-linux-user/trace/generated-helpers.o
CC or1k-linux-user/target/openrisc/exception_helper.o
LINK mipsn32el-linux-user/qemu-mipsn32el
CC or1k-linux-user/target/openrisc/fpu_helper.o
CC mipsn32-linux-user/target/mips/mips-semi.o
CC or1k-linux-user/target/openrisc/interrupt_helper.o
CC ppc64abi32-linux-user/disas.o
CC or1k-linux-user/target/openrisc/mmu_helper.o
GEN ppc64le-linux-user/config-target.h
CC ppc64abi32-linux-user/tcg-runtime.o
CC or1k-linux-user/target/openrisc/sys_helper.o
CC ppc64le-linux-user/exec.o
CC or1k-linux-user/target/openrisc/gdbstub.o
GEN ppc64abi32-linux-user/gdbstub-xml.c
CC ppc64le-linux-user/translate-all.o
GEN trace/generated-helpers.c
CC or1k-linux-user/trace/control-target.o
CC or1k-linux-user/trace/generated-helpers.o
CC ppc64le-linux-user/cpu-exec.o
LINK or1k-linux-user/qemu-or1k
CC ppc64abi32-linux-user/hax-stub.o
CC ppc64le-linux-user/translate-common.o
GEN trace/generated-helpers.c
CC mipsn32-linux-user/trace/control-target.o
CC ppc64abi32-linux-user/kvm-stub.o
CC ppc64abi32-linux-user/libdecnumber/decContext.o
CC ppc64le-linux-user/cpu-exec-common.o
CC ppc64abi32-linux-user/libdecnumber/decNumber.o
CC mipsn32-linux-user/trace/generated-helpers.o
CC ppc64le-linux-user/tcg/tcg.o
LINK mipsn32-linux-user/qemu-mipsn32
GEN ppc64-linux-user/config-target.h
CC ppc64-linux-user/exec.o
CC ppc64-linux-user/translate-all.o
CC ppc64abi32-linux-user/libdecnumber/dpd/decimal32.o
CC ppc64-linux-user/cpu-exec.o
CC ppc64abi32-linux-user/libdecnumber/dpd/decimal64.o
GEN ppc-linux-user/config-target.h
CC ppc64-linux-user/translate-common.o
CC ppc-linux-user/exec.o
CC ppc64abi32-linux-user/libdecnumber/dpd/decimal128.o
CC ppc-linux-user/translate-all.o
CC ppc64le-linux-user/tcg/tcg-op.o
CC ppc64-linux-user/cpu-exec-common.o
CC ppc64abi32-linux-user/gdbstub.o
CC ppc64-linux-user/tcg/tcg.o
CC ppc-linux-user/cpu-exec.o
CC ppc64abi32-linux-user/thunk.o
CC ppc-linux-user/translate-common.o
CC ppc64abi32-linux-user/user-exec.o
CC ppc-linux-user/cpu-exec-common.o
CC ppc64abi32-linux-user/user-exec-stub.o
CC ppc-linux-user/tcg/tcg.o
CC ppc64abi32-linux-user/linux-user/main.o
CC ppc64abi32-linux-user/linux-user/syscall.o
CC ppc64le-linux-user/tcg/optimize.o
CC ppc64-linux-user/tcg/tcg-op.o
CC ppc-linux-user/tcg/tcg-op.o
CC ppc64le-linux-user/tcg/tcg-common.o
CC ppc64le-linux-user/fpu/softfloat.o
CC ppc64-linux-user/tcg/optimize.o
CC ppc-linux-user/tcg/optimize.o
CC ppc64abi32-linux-user/linux-user/strace.o
CC ppc64-linux-user/tcg/tcg-common.o
CC ppc64abi32-linux-user/linux-user/mmap.o
CC ppc-linux-user/tcg/tcg-common.o
CC ppc64le-linux-user/disas.o
CC ppc64-linux-user/fpu/softfloat.o
CC ppc-linux-user/fpu/softfloat.o
CC ppc64abi32-linux-user/linux-user/signal.o
CC ppc64le-linux-user/tcg-runtime.o
CC ppc64abi32-linux-user/linux-user/elfload.o
GEN ppc64le-linux-user/gdbstub-xml.c
CC ppc64abi32-linux-user/linux-user/linuxload.o
CC ppc64le-linux-user/hax-stub.o
CC ppc64abi32-linux-user/linux-user/uaccess.o
CC ppc64abi32-linux-user/linux-user/uname.o
CC ppc64le-linux-user/kvm-stub.o
CC ppc-linux-user/disas.o
CCAS ppc64abi32-linux-user/linux-user/safe-syscall.o
CC ppc64le-linux-user/libdecnumber/decContext.o
CC ppc64abi32-linux-user/target/ppc/cpu-models.o
CC ppc-linux-user/tcg-runtime.o
CC ppc64-linux-user/disas.o
CC ppc64le-linux-user/libdecnumber/decNumber.o
CC ppc64-linux-user/tcg-runtime.o
GEN ppc-linux-user/gdbstub-xml.c
GEN ppc64-linux-user/gdbstub-xml.c
CC ppc64abi32-linux-user/target/ppc/translate.o
CC ppc-linux-user/hax-stub.o
CC ppc64le-linux-user/libdecnumber/dpd/decimal32.o
CC ppc-linux-user/kvm-stub.o
CC ppc-linux-user/libdecnumber/decContext.o
CC ppc-linux-user/libdecnumber/decNumber.o
CC ppc64-linux-user/hax-stub.o
CC ppc64le-linux-user/libdecnumber/dpd/decimal64.o
CC ppc64-linux-user/kvm-stub.o
CC ppc64le-linux-user/libdecnumber/dpd/decimal128.o
CC ppc64-linux-user/libdecnumber/decContext.o
CC ppc64le-linux-user/gdbstub.o
CC ppc64-linux-user/libdecnumber/decNumber.o
CC ppc-linux-user/libdecnumber/dpd/decimal32.o
CC ppc-linux-user/libdecnumber/dpd/decimal64.o
CC ppc64le-linux-user/thunk.o
CC ppc-linux-user/libdecnumber/dpd/decimal128.o
CC ppc64le-linux-user/user-exec.o
CC ppc-linux-user/gdbstub.o
CC ppc64-linux-user/libdecnumber/dpd/decimal32.o
CC ppc64le-linux-user/user-exec-stub.o
CC ppc64-linux-user/libdecnumber/dpd/decimal64.o
CC ppc-linux-user/thunk.o
CC ppc64le-linux-user/linux-user/main.o
CC ppc-linux-user/user-exec.o
CC ppc64-linux-user/libdecnumber/dpd/decimal128.o
CC ppc-linux-user/user-exec-stub.o
CC ppc64-linux-user/gdbstub.o
CC ppc64le-linux-user/linux-user/syscall.o
CC ppc-linux-user/linux-user/main.o
CC ppc64-linux-user/thunk.o
CC ppc-linux-user/linux-user/syscall.o
CC ppc64-linux-user/user-exec.o
CC ppc64-linux-user/user-exec-stub.o
CC ppc64-linux-user/linux-user/main.o
CC ppc64-linux-user/linux-user/syscall.o
CC ppc64le-linux-user/linux-user/strace.o
CC ppc64le-linux-user/linux-user/mmap.o
CC ppc-linux-user/linux-user/strace.o
CC ppc64le-linux-user/linux-user/signal.o
CC ppc64-linux-user/linux-user/strace.o
CC ppc-linux-user/linux-user/mmap.o
CC ppc64le-linux-user/linux-user/elfload.o
CC ppc-linux-user/linux-user/signal.o
CC ppc64-linux-user/linux-user/mmap.o
CC ppc64le-linux-user/linux-user/linuxload.o
CC ppc64abi32-linux-user/target/ppc/kvm-stub.o
CC ppc64-linux-user/linux-user/signal.o
CC ppc64abi32-linux-user/target/ppc/dfp_helper.o
CC ppc-linux-user/linux-user/elfload.o
CC ppc64le-linux-user/linux-user/uaccess.o
CC ppc64-linux-user/linux-user/elfload.o
CC ppc64le-linux-user/linux-user/uname.o
CCAS ppc64le-linux-user/linux-user/safe-syscall.o
CC ppc64le-linux-user/target/ppc/cpu-models.o
CC ppc64-linux-user/linux-user/linuxload.o
CC ppc-linux-user/linux-user/linuxload.o
CC ppc64abi32-linux-user/target/ppc/excp_helper.o
CC ppc64-linux-user/linux-user/uaccess.o
CC ppc-linux-user/linux-user/uaccess.o
CC ppc64abi32-linux-user/target/ppc/fpu_helper.o
CC ppc-linux-user/linux-user/uname.o
CC ppc64-linux-user/linux-user/uname.o
CCAS ppc-linux-user/linux-user/safe-syscall.o
CCAS ppc64-linux-user/linux-user/safe-syscall.o
CC ppc-linux-user/target/ppc/cpu-models.o
CC ppc64-linux-user/target/ppc/cpu-models.o
CC ppc64le-linux-user/target/ppc/translate.o
CC ppc-linux-user/target/ppc/translate.o
CC ppc64-linux-user/target/ppc/translate.o
CC ppc64abi32-linux-user/target/ppc/int_helper.o
CC ppc64abi32-linux-user/target/ppc/timebase_helper.o
CC ppc64abi32-linux-user/target/ppc/misc_helper.o
CC ppc64abi32-linux-user/target/ppc/mem_helper.o
CC ppc64abi32-linux-user/target/ppc/user_only_helper.o
CC ppc64abi32-linux-user/target/ppc/gdbstub.o
GEN trace/generated-helpers.c
CC ppc64abi32-linux-user/trace/control-target.o
CC ppc64abi32-linux-user/gdbstub-xml.o
CC ppc64abi32-linux-user/trace/generated-helpers.o
LINK ppc64abi32-linux-user/qemu-ppc64abi32
CC ppc-linux-user/target/ppc/kvm-stub.o
CC ppc-linux-user/target/ppc/dfp_helper.o
CC ppc64-linux-user/target/ppc/kvm-stub.o
CC ppc64-linux-user/target/ppc/dfp_helper.o
CC ppc64le-linux-user/target/ppc/kvm-stub.o
CC ppc-linux-user/target/ppc/excp_helper.o
CC ppc64le-linux-user/target/ppc/dfp_helper.o
CC ppc-linux-user/target/ppc/fpu_helper.o
CC ppc-linux-user/target/ppc/int_helper.o
CC ppc64le-linux-user/target/ppc/excp_helper.o
CC ppc64le-linux-user/target/ppc/fpu_helper.o
CC ppc64-linux-user/target/ppc/excp_helper.o
CC ppc-linux-user/target/ppc/timebase_helper.o
CC ppc64-linux-user/target/ppc/fpu_helper.o
CC ppc64le-linux-user/target/ppc/int_helper.o
CC ppc64le-linux-user/target/ppc/timebase_helper.o
CC ppc64le-linux-user/target/ppc/misc_helper.o
CC ppc-linux-user/target/ppc/misc_helper.o
CC ppc64le-linux-user/target/ppc/mem_helper.o
CC ppc-linux-user/target/ppc/mem_helper.o
CC ppc64le-linux-user/target/ppc/user_only_helper.o
CC ppc64le-linux-user/target/ppc/gdbstub.o
GEN trace/generated-helpers.c
CC ppc-linux-user/target/ppc/user_only_helper.o
CC ppc64le-linux-user/trace/control-target.o
CC ppc-linux-user/target/ppc/gdbstub.o
CC ppc64-linux-user/target/ppc/int_helper.o
CC ppc64le-linux-user/gdbstub-xml.o
GEN trace/generated-helpers.c
CC ppc-linux-user/trace/control-target.o
CC ppc64le-linux-user/trace/generated-helpers.o
CC ppc-linux-user/gdbstub-xml.o
LINK ppc64le-linux-user/qemu-ppc64le
CC ppc-linux-user/trace/generated-helpers.o
CC s390x-linux-user/gen-features
GEN s390x-linux-user/config-target.h
GEN s390x-linux-user/gen-features.h
CC s390x-linux-user/exec.o
LINK ppc-linux-user/qemu-ppc
CC ppc64-linux-user/target/ppc/timebase_helper.o
CC s390x-linux-user/translate-all.o
CC ppc64-linux-user/target/ppc/misc_helper.o
CC ppc64-linux-user/target/ppc/mem_helper.o
GEN sh4eb-linux-user/config-target.h
CC s390x-linux-user/cpu-exec.o
CC sh4eb-linux-user/exec.o
CC ppc64-linux-user/target/ppc/user_only_helper.o
GEN sh4-linux-user/config-target.h
CC sh4-linux-user/exec.o
CC ppc64-linux-user/target/ppc/gdbstub.o
CC s390x-linux-user/translate-common.o
CC sh4eb-linux-user/translate-all.o
CC sh4-linux-user/translate-all.o
CC s390x-linux-user/cpu-exec-common.o
GEN trace/generated-helpers.c
CC ppc64-linux-user/trace/control-target.o
CC s390x-linux-user/tcg/tcg.o
CC sh4eb-linux-user/cpu-exec.o
CC ppc64-linux-user/gdbstub-xml.o
CC sh4eb-linux-user/translate-common.o
CC sh4-linux-user/cpu-exec.o
CC sh4eb-linux-user/cpu-exec-common.o
CC ppc64-linux-user/trace/generated-helpers.o
CC sh4eb-linux-user/tcg/tcg.o
CC sh4-linux-user/translate-common.o
LINK ppc64-linux-user/qemu-ppc64
CC sh4-linux-user/cpu-exec-common.o
CC s390x-linux-user/tcg/tcg-op.o
CC sh4-linux-user/tcg/tcg.o
CC s390x-linux-user/tcg/optimize.o
CC s390x-linux-user/tcg/tcg-common.o
CC sh4eb-linux-user/tcg/tcg-op.o
CC s390x-linux-user/fpu/softfloat.o
CC sh4-linux-user/tcg/tcg-op.o
CC s390x-linux-user/disas.o
CC s390x-linux-user/tcg-runtime.o
GEN s390x-linux-user/gdbstub-xml.c
CC sh4eb-linux-user/tcg/optimize.o
CC sh4-linux-user/tcg/optimize.o
CC s390x-linux-user/hax-stub.o
CC s390x-linux-user/kvm-stub.o
CC s390x-linux-user/gdbstub.o
CC sh4eb-linux-user/tcg/tcg-common.o
CC s390x-linux-user/thunk.o
CC s390x-linux-user/user-exec.o
CC sh4eb-linux-user/fpu/softfloat.o
CC sh4-linux-user/tcg/tcg-common.o
CC s390x-linux-user/user-exec-stub.o
CC sh4-linux-user/fpu/softfloat.o
CC s390x-linux-user/linux-user/main.o
CC sh4-linux-user/disas.o
CC sh4-linux-user/tcg-runtime.o
CC s390x-linux-user/linux-user/syscall.o
CC sh4-linux-user/hax-stub.o
CC sh4-linux-user/kvm-stub.o
CC sh4-linux-user/gdbstub.o
CC sh4eb-linux-user/disas.o
CC sh4-linux-user/thunk.o
CC sh4eb-linux-user/tcg-runtime.o
CC sh4-linux-user/user-exec.o
CC sh4-linux-user/user-exec-stub.o
CC s390x-linux-user/linux-user/strace.o
CC sh4-linux-user/linux-user/main.o
CC sh4eb-linux-user/hax-stub.o
CC sh4eb-linux-user/kvm-stub.o
CC sh4-linux-user/linux-user/syscall.o
CC s390x-linux-user/linux-user/mmap.o
CC s390x-linux-user/linux-user/signal.o
CC sh4eb-linux-user/gdbstub.o
CC sh4eb-linux-user/thunk.o
CC s390x-linux-user/linux-user/elfload.o
CC s390x-linux-user/linux-user/linuxload.o
CC sh4eb-linux-user/user-exec.o
CC sh4eb-linux-user/user-exec-stub.o
GEN sparc32plus-linux-user/config-target.h
CC sh4eb-linux-user/linux-user/main.o
CC sparc32plus-linux-user/exec.o
CC s390x-linux-user/linux-user/uaccess.o
CC sh4eb-linux-user/linux-user/syscall.o
CC sparc32plus-linux-user/translate-all.o
CC s390x-linux-user/linux-user/uname.o
CC sparc32plus-linux-user/cpu-exec.o
CCAS s390x-linux-user/linux-user/safe-syscall.o
CC s390x-linux-user/target/s390x/translate.o
CC sparc32plus-linux-user/translate-common.o
CC sparc32plus-linux-user/cpu-exec-common.o
CC sparc32plus-linux-user/tcg/tcg.o
CC sh4-linux-user/linux-user/strace.o
CC sh4-linux-user/linux-user/mmap.o
CC sparc32plus-linux-user/tcg/tcg-op.o
CC s390x-linux-user/target/s390x/helper.o
CC sh4-linux-user/linux-user/signal.o
CC s390x-linux-user/target/s390x/cpu.o
CC s390x-linux-user/target/s390x/interrupt.o
CC sh4eb-linux-user/linux-user/strace.o
CC sh4-linux-user/linux-user/elfload.o
CC s390x-linux-user/target/s390x/int_helper.o
CC s390x-linux-user/target/s390x/fpu_helper.o
CC sh4-linux-user/linux-user/linuxload.o
CC sh4eb-linux-user/linux-user/mmap.o
CC sh4-linux-user/linux-user/uaccess.o
CC s390x-linux-user/target/s390x/cc_helper.o
CC sh4-linux-user/linux-user/uname.o
CC sh4eb-linux-user/linux-user/signal.o
CC s390x-linux-user/target/s390x/mem_helper.o
CC sparc32plus-linux-user/tcg/optimize.o
CCAS sh4-linux-user/linux-user/safe-syscall.o
CC sh4-linux-user/linux-user/flatload.o
CC sh4eb-linux-user/linux-user/elfload.o
CC s390x-linux-user/target/s390x/misc_helper.o
CC sh4-linux-user/target/sh4/translate.o
CC sparc32plus-linux-user/tcg/tcg-common.o
CC s390x-linux-user/target/s390x/gdbstub.o
CC sparc32plus-linux-user/fpu/softfloat.o
CC sh4eb-linux-user/linux-user/linuxload.o
CC s390x-linux-user/target/s390x/cpu_models.o
CC sh4eb-linux-user/linux-user/uaccess.o
CC s390x-linux-user/target/s390x/cpu_features.o
CC sh4eb-linux-user/linux-user/uname.o
GEN trace/generated-helpers.c
CC s390x-linux-user/trace/control-target.o
CCAS sh4eb-linux-user/linux-user/safe-syscall.o
CC s390x-linux-user/gdbstub-xml.o
CC sh4eb-linux-user/linux-user/flatload.o
CC s390x-linux-user/trace/generated-helpers.o
CC sh4-linux-user/target/sh4/op_helper.o
CC sh4eb-linux-user/target/sh4/translate.o
LINK s390x-linux-user/qemu-s390x
CC sh4-linux-user/target/sh4/helper.o
CC sparc32plus-linux-user/disas.o
CC sh4-linux-user/target/sh4/cpu.o
CC sh4-linux-user/target/sh4/gdbstub.o
GEN sparc64-linux-user/config-target.h
CC sparc32plus-linux-user/tcg-runtime.o
GEN trace/generated-helpers.c
CC sparc64-linux-user/exec.o
CC sh4-linux-user/trace/control-target.o
CC sparc64-linux-user/translate-all.o
CC sh4-linux-user/trace/generated-helpers.o
CC sparc32plus-linux-user/hax-stub.o
CC sparc64-linux-user/cpu-exec.o
LINK sh4-linux-user/qemu-sh4
CC sparc32plus-linux-user/kvm-stub.o
CC sh4eb-linux-user/target/sh4/op_helper.o
CC sparc32plus-linux-user/gdbstub.o
CC sh4eb-linux-user/target/sh4/helper.o
CC sparc64-linux-user/translate-common.o
CC sh4eb-linux-user/target/sh4/cpu.o
CC sh4eb-linux-user/target/sh4/gdbstub.o
CC sparc64-linux-user/cpu-exec-common.o
GEN sparc-linux-user/config-target.h
CC sparc-linux-user/exec.o
GEN trace/generated-helpers.c
CC sparc32plus-linux-user/thunk.o
CC sh4eb-linux-user/trace/control-target.o
CC sparc64-linux-user/tcg/tcg.o
CC sparc32plus-linux-user/user-exec.o
CC sh4eb-linux-user/trace/generated-helpers.o
CC sparc-linux-user/translate-all.o
LINK sh4eb-linux-user/qemu-sh4eb
CC sparc32plus-linux-user/user-exec-stub.o
CC sparc-linux-user/cpu-exec.o
CC sparc32plus-linux-user/linux-user/main.o
GEN tilegx-linux-user/config-target.h
CC tilegx-linux-user/exec.o
CC sparc-linux-user/translate-common.o
CC sparc-linux-user/cpu-exec-common.o
CC tilegx-linux-user/translate-all.o
CC sparc32plus-linux-user/linux-user/syscall.o
CC sparc64-linux-user/tcg/tcg-op.o
CC sparc-linux-user/tcg/tcg.o
CC tilegx-linux-user/cpu-exec.o
CC tilegx-linux-user/translate-common.o
CC tilegx-linux-user/cpu-exec-common.o
CC tilegx-linux-user/tcg/tcg.o
CC sparc64-linux-user/tcg/optimize.o
CC sparc-linux-user/tcg/tcg-op.o
CC sparc64-linux-user/tcg/tcg-common.o
CC sparc64-linux-user/fpu/softfloat.o
CC tilegx-linux-user/tcg/tcg-op.o
CC sparc32plus-linux-user/linux-user/strace.o
CC sparc32plus-linux-user/linux-user/mmap.o
CC sparc-linux-user/tcg/optimize.o
CC sparc32plus-linux-user/linux-user/signal.o
CC sparc-linux-user/tcg/tcg-common.o
CC sparc32plus-linux-user/linux-user/elfload.o
CC sparc-linux-user/fpu/softfloat.o
CC tilegx-linux-user/tcg/optimize.o
CC sparc32plus-linux-user/linux-user/linuxload.o
CC sparc64-linux-user/disas.o
CC sparc32plus-linux-user/linux-user/uaccess.o
CC tilegx-linux-user/tcg/tcg-common.o
CC sparc32plus-linux-user/linux-user/uname.o
CC sparc64-linux-user/tcg-runtime.o
CC tilegx-linux-user/fpu/softfloat.o
CCAS sparc32plus-linux-user/linux-user/safe-syscall.o
CC sparc32plus-linux-user/target/sparc/translate.o
CC sparc64-linux-user/hax-stub.o
CC sparc64-linux-user/kvm-stub.o
CC sparc64-linux-user/gdbstub.o
CC sparc-linux-user/disas.o
CC sparc-linux-user/tcg-runtime.o
CC sparc64-linux-user/thunk.o
CC tilegx-linux-user/disas.o
CC sparc64-linux-user/user-exec.o
CC tilegx-linux-user/tcg-runtime.o
CC sparc-linux-user/hax-stub.o
CC sparc32plus-linux-user/target/sparc/helper.o
CC sparc64-linux-user/user-exec-stub.o
CC sparc32plus-linux-user/target/sparc/cpu.o
CC sparc-linux-user/kvm-stub.o
CC tilegx-linux-user/hax-stub.o
CC sparc-linux-user/gdbstub.o
CC sparc64-linux-user/linux-user/main.o
CC tilegx-linux-user/kvm-stub.o
CC sparc32plus-linux-user/target/sparc/fop_helper.o
CC sparc64-linux-user/linux-user/syscall.o
CC sparc-linux-user/thunk.o
CC tilegx-linux-user/gdbstub.o
CC sparc32plus-linux-user/target/sparc/cc_helper.o
CC sparc-linux-user/user-exec.o
CC sparc32plus-linux-user/target/sparc/win_helper.o
CC sparc-linux-user/user-exec-stub.o
CC tilegx-linux-user/thunk.o
CC sparc-linux-user/linux-user/main.o
CC sparc32plus-linux-user/target/sparc/mmu_helper.o
CC sparc-linux-user/linux-user/syscall.o
CC tilegx-linux-user/user-exec.o
CC sparc32plus-linux-user/target/sparc/ldst_helper.o
CC tilegx-linux-user/user-exec-stub.o
CC sparc32plus-linux-user/target/sparc/int64_helper.o
CC tilegx-linux-user/linux-user/main.o
CC sparc32plus-linux-user/target/sparc/vis_helper.o
CC tilegx-linux-user/linux-user/syscall.o
CC sparc32plus-linux-user/target/sparc/gdbstub.o
GEN trace/generated-helpers.c
CC sparc32plus-linux-user/trace/control-target.o
CC sparc64-linux-user/linux-user/strace.o
CC sparc32plus-linux-user/trace/generated-helpers.o
CC sparc64-linux-user/linux-user/mmap.o
LINK sparc32plus-linux-user/qemu-sparc32plus
CC sparc64-linux-user/linux-user/signal.o
CC tilegx-linux-user/linux-user/strace.o
CC sparc-linux-user/linux-user/strace.o
CC sparc64-linux-user/linux-user/elfload.o
CC sparc-linux-user/linux-user/mmap.o
CC tilegx-linux-user/linux-user/mmap.o
CC sparc-linux-user/linux-user/signal.o
CC sparc64-linux-user/linux-user/linuxload.o
CC sparc-linux-user/linux-user/elfload.o
CC sparc64-linux-user/linux-user/uaccess.o
CC tilegx-linux-user/linux-user/signal.o
CC sparc-linux-user/linux-user/linuxload.o
CC sparc64-linux-user/linux-user/uname.o
CC tilegx-linux-user/linux-user/elfload.o
CC sparc-linux-user/linux-user/uaccess.o
CCAS sparc64-linux-user/linux-user/safe-syscall.o
CC sparc-linux-user/linux-user/uname.o
CC sparc64-linux-user/target/sparc/translate.o
CC tilegx-linux-user/linux-user/linuxload.o
CCAS sparc-linux-user/linux-user/safe-syscall.o
CC tilegx-linux-user/linux-user/uaccess.o
CC sparc-linux-user/target/sparc/translate.o
CC sparc-linux-user/target/sparc/helper.o
CC tilegx-linux-user/linux-user/uname.o
CCAS tilegx-linux-user/linux-user/safe-syscall.o
CC tilegx-linux-user/target/tilegx/cpu.o
CC sparc-linux-user/target/sparc/cpu.o
CC tilegx-linux-user/target/tilegx/translate.o
CC tilegx-linux-user/target/tilegx/helper.o
CC sparc-linux-user/target/sparc/fop_helper.o
CC sparc-linux-user/target/sparc/cc_helper.o
CC sparc64-linux-user/target/sparc/helper.o
CC tilegx-linux-user/target/tilegx/simd_helper.o
CC sparc-linux-user/target/sparc/win_helper.o
CC sparc-linux-user/target/sparc/mmu_helper.o
CC sparc64-linux-user/target/sparc/cpu.o
GEN trace/generated-helpers.c
CC tilegx-linux-user/trace/control-target.o
CC sparc-linux-user/target/sparc/ldst_helper.o
CC sparc64-linux-user/target/sparc/fop_helper.o
CC tilegx-linux-user/trace/generated-helpers.o
GEN x86_64-linux-user/config-target.h
CC x86_64-linux-user/exec.o
CC sparc-linux-user/target/sparc/int32_helper.o
CC sparc64-linux-user/target/sparc/cc_helper.o
LINK tilegx-linux-user/qemu-tilegx
CC sparc-linux-user/target/sparc/gdbstub.o
CC x86_64-linux-user/translate-all.o
CC sparc64-linux-user/target/sparc/win_helper.o
GEN trace/generated-helpers.c
CC sparc-linux-user/trace/control-target.o
CC x86_64-linux-user/cpu-exec.o
CC sparc64-linux-user/target/sparc/mmu_helper.o
CC sparc-linux-user/trace/generated-helpers.o
CC x86_64-linux-user/translate-common.o
CC sparc64-linux-user/target/sparc/ldst_helper.o
CC x86_64-linux-user/cpu-exec-common.o
LINK sparc-linux-user/qemu-sparc
CC sparc64-linux-user/target/sparc/int64_helper.o
CC sparc64-linux-user/target/sparc/vis_helper.o
CC x86_64-linux-user/tcg/tcg.o
CC sparc64-linux-user/target/sparc/gdbstub.o
CC x86_64-linux-user/tcg/tcg-op.o
CC x86_64-linux-user/tcg/optimize.o
GEN trace/generated-helpers.c
CC sparc64-linux-user/trace/control-target.o
CC sparc64-linux-user/trace/generated-helpers.o
CC x86_64-linux-user/tcg/tcg-common.o
LINK sparc64-linux-user/qemu-sparc64
CC x86_64-linux-user/fpu/softfloat.o
CC x86_64-linux-user/disas.o
CC x86_64-linux-user/tcg-runtime.o
CC x86_64-linux-user/hax-stub.o
CC x86_64-linux-user/kvm-stub.o
CC x86_64-linux-user/gdbstub.o
CC x86_64-linux-user/thunk.o
CC x86_64-linux-user/user-exec.o
CC x86_64-linux-user/user-exec-stub.o
CC x86_64-linux-user/linux-user/main.o
CC x86_64-linux-user/linux-user/syscall.o
CC x86_64-linux-user/linux-user/strace.o
CC x86_64-linux-user/linux-user/mmap.o
CC x86_64-linux-user/linux-user/signal.o
CC x86_64-linux-user/linux-user/elfload.o
CC x86_64-linux-user/linux-user/linuxload.o
CC x86_64-linux-user/linux-user/uaccess.o
CC x86_64-linux-user/linux-user/uname.o
CCAS x86_64-linux-user/linux-user/safe-syscall.o
CC x86_64-linux-user/target/i386/translate.o
CC x86_64-linux-user/target/i386/helper.o
CC x86_64-linux-user/target/i386/cpu.o
CC x86_64-linux-user/target/i386/bpt_helper.o
CC x86_64-linux-user/target/i386/excp_helper.o
CC x86_64-linux-user/target/i386/fpu_helper.o
CC x86_64-linux-user/target/i386/cc_helper.o
CC x86_64-linux-user/target/i386/int_helper.o
CC x86_64-linux-user/target/i386/svm_helper.o
CC x86_64-linux-user/target/i386/smm_helper.o
CC x86_64-linux-user/target/i386/misc_helper.o
CC x86_64-linux-user/target/i386/mem_helper.o
CC x86_64-linux-user/target/i386/seg_helper.o
CC x86_64-linux-user/target/i386/mpx_helper.o
CC x86_64-linux-user/target/i386/gdbstub.o
CC x86_64-linux-user/target/i386/kvm-stub.o
GEN trace/generated-helpers.c
CC x86_64-linux-user/trace/control-target.o
CC x86_64-linux-user/trace/generated-helpers.o
LINK x86_64-linux-user/qemu-x86_64
TEST tests/qapi-schema/alternate-array.out
TEST tests/qapi-schema/alternate-clash.out
TEST tests/qapi-schema/alternate-base.out
TEST tests/qapi-schema/alternate-any.out
TEST tests/qapi-schema/alternate-conflict-dict.out
TEST tests/qapi-schema/alternate-empty.out
TEST tests/qapi-schema/alternate-nested.out
TEST tests/qapi-schema/alternate-conflict-string.out
TEST tests/qapi-schema/alternate-unknown.out
TEST tests/qapi-schema/args-alternate.out
TEST tests/qapi-schema/args-any.out
TEST tests/qapi-schema/args-array-empty.out
TEST tests/qapi-schema/args-array-unknown.out
TEST tests/qapi-schema/args-bad-boxed.out
TEST tests/qapi-schema/args-boxed-anon.out
TEST tests/qapi-schema/args-boxed-empty.out
TEST tests/qapi-schema/args-boxed-string.out
TEST tests/qapi-schema/args-int.out
TEST tests/qapi-schema/args-invalid.out
TEST tests/qapi-schema/args-member-array-bad.out
TEST tests/qapi-schema/args-member-case.out
TEST tests/qapi-schema/args-member-unknown.out
TEST tests/qapi-schema/args-union.out
TEST tests/qapi-schema/args-name-clash.out
TEST tests/qapi-schema/args-unknown.out
TEST tests/qapi-schema/bad-base.out
TEST tests/qapi-schema/bad-data.out
TEST tests/qapi-schema/bad-ident.out
TEST tests/qapi-schema/bad-type-bool.out
TEST tests/qapi-schema/bad-type-dict.out
TEST tests/qapi-schema/bad-type-int.out
TEST tests/qapi-schema/base-cycle-direct.out
TEST tests/qapi-schema/base-cycle-indirect.out
TEST tests/qapi-schema/command-int.out
TEST tests/qapi-schema/doc-bad-args.out
TEST tests/qapi-schema/comments.out
TEST tests/qapi-schema/doc-bad-symbol.out
TEST tests/qapi-schema/doc-duplicated-arg.out
TEST tests/qapi-schema/doc-duplicated-return.out
TEST tests/qapi-schema/doc-duplicated-since.out
TEST tests/qapi-schema/doc-empty-arg.out
TEST tests/qapi-schema/doc-empty-section.out
TEST tests/qapi-schema/doc-empty-symbol.out
TEST tests/qapi-schema/doc-interleaved-section.out
TEST tests/qapi-schema/doc-invalid-end.out
TEST tests/qapi-schema/doc-invalid-end2.out
TEST tests/qapi-schema/doc-invalid-return.out
TEST tests/qapi-schema/doc-invalid-section.out
TEST tests/qapi-schema/doc-invalid-start.out
TEST tests/qapi-schema/doc-missing-colon.out
TEST tests/qapi-schema/doc-missing-expr.out
TEST tests/qapi-schema/doc-missing-space.out
TEST tests/qapi-schema/doc-optional.out
TEST tests/qapi-schema/double-data.out
TEST tests/qapi-schema/double-type.out
TEST tests/qapi-schema/duplicate-key.out
TEST tests/qapi-schema/empty.out
TEST tests/qapi-schema/enum-bad-name.out
TEST tests/qapi-schema/enum-bad-prefix.out
TEST tests/qapi-schema/enum-clash-member.out
TEST tests/qapi-schema/enum-dict-member.out
TEST tests/qapi-schema/enum-int-member.out
TEST tests/qapi-schema/enum-member-case.out
TEST tests/qapi-schema/enum-missing-data.out
TEST tests/qapi-schema/enum-wrong-data.out
TEST tests/qapi-schema/escape-outside-string.out
TEST tests/qapi-schema/escape-too-big.out
TEST tests/qapi-schema/escape-too-short.out
TEST tests/qapi-schema/event-boxed-empty.out
TEST tests/qapi-schema/event-case.out
TEST tests/qapi-schema/event-nest-struct.out
TEST tests/qapi-schema/flat-union-array-branch.out
TEST tests/qapi-schema/flat-union-bad-base.out
TEST tests/qapi-schema/flat-union-bad-discriminator.out
TEST tests/qapi-schema/flat-union-base-any.out
TEST tests/qapi-schema/flat-union-base-union.out
TEST tests/qapi-schema/flat-union-clash-member.out
TEST tests/qapi-schema/flat-union-empty.out
TEST tests/qapi-schema/flat-union-incomplete-branch.out
TEST tests/qapi-schema/flat-union-inline.out
TEST tests/qapi-schema/flat-union-int-branch.out
TEST tests/qapi-schema/flat-union-invalid-branch-key.out
TEST tests/qapi-schema/flat-union-invalid-discriminator.out
TEST tests/qapi-schema/flat-union-no-base.out
TEST tests/qapi-schema/flat-union-optional-discriminator.out
TEST tests/qapi-schema/flat-union-string-discriminator.out
TEST tests/qapi-schema/funny-char.out
TEST tests/qapi-schema/ident-with-escape.out
TEST tests/qapi-schema/include-before-err.out
TEST tests/qapi-schema/include-cycle.out
TEST tests/qapi-schema/include-format-err.out
TEST tests/qapi-schema/include-nested-err.out
TEST tests/qapi-schema/include-no-file.out
TEST tests/qapi-schema/include-non-file.out
TEST tests/qapi-schema/include-relpath.out
TEST tests/qapi-schema/include-repetition.out
TEST tests/qapi-schema/include-self-cycle.out
TEST tests/qapi-schema/include-simple.out
TEST tests/qapi-schema/indented-expr.out
TEST tests/qapi-schema/leading-comma-list.out
TEST tests/qapi-schema/leading-comma-object.out
TEST tests/qapi-schema/missing-colon.out
TEST tests/qapi-schema/missing-comma-list.out
TEST tests/qapi-schema/missing-comma-object.out
TEST tests/qapi-schema/missing-type.out
TEST tests/qapi-schema/non-objects.out
TEST tests/qapi-schema/nested-struct-data.out
TEST tests/qapi-schema/qapi-schema-test.out
TEST tests/qapi-schema/quoted-structural-chars.out
TEST tests/qapi-schema/redefined-builtin.out
TEST tests/qapi-schema/redefined-command.out
TEST tests/qapi-schema/redefined-event.out
TEST tests/qapi-schema/redefined-type.out
TEST tests/qapi-schema/reserved-command-q.out
TEST tests/qapi-schema/reserved-enum-q.out
TEST tests/qapi-schema/reserved-member-has.out
TEST tests/qapi-schema/reserved-member-q.out
TEST tests/qapi-schema/reserved-member-u.out
TEST tests/qapi-schema/reserved-member-underscore.out
TEST tests/qapi-schema/reserved-type-kind.out
TEST tests/qapi-schema/reserved-type-list.out
TEST tests/qapi-schema/returns-alternate.out
TEST tests/qapi-schema/returns-array-bad.out
TEST tests/qapi-schema/returns-dict.out
TEST tests/qapi-schema/returns-unknown.out
TEST tests/qapi-schema/returns-whitelist.out
TEST tests/qapi-schema/struct-base-clash-deep.out
TEST tests/qapi-schema/struct-base-clash.out
TEST tests/qapi-schema/struct-data-invalid.out
TEST tests/qapi-schema/struct-member-invalid.out
TEST tests/qapi-schema/trailing-comma-list.out
TEST tests/qapi-schema/trailing-comma-object.out
TEST tests/qapi-schema/type-bypass-bad-gen.out
TEST tests/qapi-schema/unclosed-list.out
TEST tests/qapi-schema/unclosed-object.out
TEST tests/qapi-schema/unclosed-string.out
TEST tests/qapi-schema/unicode-str.out
TEST tests/qapi-schema/union-base-no-discriminator.out
TEST tests/qapi-schema/union-branch-case.out
TEST tests/qapi-schema/union-clash-branches.out
TEST tests/qapi-schema/union-empty.out
TEST tests/qapi-schema/union-invalid-base.out
TEST tests/qapi-schema/union-optional-branch.out
TEST tests/qapi-schema/union-unknown.out
TEST tests/qapi-schema/unknown-escape.out
CC tests/check-qdict.o
TEST tests/qapi-schema/unknown-expr-key.out
CC tests/test-char.o
CC tests/check-qfloat.o
CC tests/check-qint.o
CC tests/check-qstring.o
CC tests/check-qlist.o
CC tests/check-qnull.o
CC tests/check-qjson.o
CC tests/test-qobject-output-visitor.o
GEN tests/test-qapi-visit.c
GEN tests/test-qapi-types.c
GEN tests/test-qapi-event.c
GEN tests/test-qmp-introspect.c
CC tests/test-clone-visitor.o
CC tests/test-qobject-input-visitor.o
CC tests/test-qobject-input-strict.o
CC tests/test-qmp-commands.o
GEN tests/test-qmp-marshal.c
CC tests/test-string-input-visitor.o
CC tests/test-string-output-visitor.o
CC tests/test-qmp-event.o
CC tests/test-opts-visitor.o
CC tests/test-coroutine.o
CC tests/iothread.o
CC tests/test-visitor-serialization.o
CC tests/test-iov.o
CC tests/test-aio.o
CC tests/test-aio-multithread.o
CC tests/test-throttle.o
CC tests/test-thread-pool.o
CC tests/test-hbitmap.o
CC tests/test-blockjob.o
CC tests/test-blockjob-txn.o
CC tests/test-x86-cpuid.o
CC tests/test-xbzrle.o
CC tests/test-vmstate.o
CC tests/test-cutils.o
CC tests/test-shift128.o
CC tests/test-mul64.o
CC tests/test-int128.o
CC tests/rcutorture.o
CC tests/test-rcu-list.o
CC tests/test-qdist.o
CC tests/test-qht.o
CC tests/test-qht-par.o
CC tests/qht-bench.o
CC tests/test-bitops.o
CC tests/test-bitcnt.o
CC tests/test-qdev-global-props.o
CC tests/check-qom-interface.o
CC tests/check-qom-proplist.o
CC tests/test-qemu-opts.o
CC tests/test-write-threshold.o
CC tests/test-crypto-hmac.o
CC tests/test-crypto-hash.o
CC tests/test-crypto-cipher.o
CC tests/test-crypto-secret.o
CC tests/test-crypto-tlscredsx509.o
CC tests/crypto-tls-x509-helpers.o
CC tests/pkix_asn1_tab.o
CC tests/test-crypto-tlssession.o
CC tests/test-qga.o
CC tests/libqtest.o
CC tests/test-timed-average.o
CC tests/test-io-task.o
CC tests/test-io-channel-socket.o
CC tests/io-channel-helpers.o
CC tests/test-io-channel-file.o
CC tests/test-io-channel-tls.o
CC tests/test-io-channel-command.o
CC tests/test-io-channel-buffer.o
CC tests/test-base64.o
CC tests/test-crypto-pbkdf.o
CC tests/test-crypto-ivgen.o
CC tests/test-crypto-afsplit.o
CC tests/test-crypto-xts.o
CC tests/test-crypto-block.o
CC tests/test-logging.o
CC tests/test-replication.o
CC tests/test-bufferiszero.o
CC tests/test-uuid.o
CC tests/ptimer-test.o
CC tests/ptimer-test-stubs.o
CC tests/boot-serial-test.o
CC tests/libqos/pci.o
CC tests/libqos/fw_cfg.o
CC tests/libqos/malloc.o
CC tests/libqos/i2c.o
CC tests/libqos/libqos.o
CC tests/tmp105-test.o
CC tests/libqos/i2c-omap.o
CC tests/ds1338-test.o
CC tests/libqos/i2c-imx.o
CC tests/m25p80-test.o
CC tests/virtio-blk-test.o
CC tests/libqos/malloc-spapr.o
CC tests/libqos/libqos-spapr.o
CC tests/libqos/rtas.o
CC tests/libqos/pci-spapr.o
CC tests/libqos/malloc-pc.o
CC tests/libqos/pci-pc.o
CC tests/libqos/libqos-pc.o
CC tests/libqos/ahci.o
CC tests/libqos/virtio.o
CC tests/libqos/virtio-mmio.o
CC tests/libqos/virtio-pci.o
CC tests/libqos/malloc-generic.o
CC tests/test-arm-mptimer.o
CC tests/endianness-test.o
CC tests/fdc-test.o
CC tests/ide-test.o
CC tests/ahci-test.o
CC tests/boot-order-test.o
CC tests/hd-geo-test.o
CC tests/bios-tables-test.o
CC tests/boot-sector.o
CC tests/pxe-test.o
CC tests/rtc-test.o
CC tests/ipmi-kcs-test.o
CC tests/ipmi-bt-test.o
CC tests/i440fx-test.o
CC tests/fw_cfg-test.o
CC tests/drive_del-test.o
CC tests/wdt_ib700-test.o
CC tests/tco-test.o
CC tests/e1000-test.o
CC tests/e1000e-test.o
CC tests/rtl8139-test.o
CC tests/pcnet-test.o
CC tests/eepro100-test.o
CC tests/ne2000-test.o
CC tests/nvme-test.o
CC tests/ac97-test.o
CC tests/es1370-test.o
CC tests/virtio-net-test.o
CC tests/virtio-balloon-test.o
CC tests/virtio-rng-test.o
CC tests/virtio-scsi-test.o
CC tests/virtio-9p-test.o
CC tests/virtio-console-test.o
CC tests/virtio-serial-test.o
CC tests/tpci200-test.o
CC tests/ipoctal232-test.o
CC tests/display-vga-test.o
CC tests/intel-hda-test.o
CC tests/ivshmem-test.o
CC tests/vmxnet3-test.o
CC tests/i82801b11-test.o
CC tests/pvpanic-test.o
CC tests/ioh3420-test.o
CC tests/usb-hcd-ohci-test.o
CC tests/libqos/usb.o
CC tests/usb-hcd-uhci-test.o
CC tests/usb-hcd-ehci-test.o
CC tests/usb-hcd-xhci-test.o
CC tests/pc-cpu-test.o
CC tests/test-netfilter.o
CC tests/q35-test.o
CC tests/test-filter-mirror.o
CC tests/test-filter-redirector.o
CC tests/postcopy-test.o
CC tests/test-x86-cpuid-compat.o
CC tests/spapr-phb-test.o
CC tests/prom-env-test.o
CC tests/pnv-xscom-test.o
CC tests/rtas-test.o
CC tests/device-introspect-test.o
CC tests/qom-test.o
LINK tests/check-qdict
LINK tests/test-char
LINK tests/check-qfloat
LINK tests/check-qint
LINK tests/check-qstring
LINK tests/check-qlist
LINK tests/check-qnull
LINK tests/check-qjson
CC tests/test-qapi-visit.o
CC tests/test-qapi-types.o
CC tests/test-qapi-event.o
CC tests/test-qmp-introspect.o
CC tests/test-qmp-marshal.o
LINK tests/test-coroutine
LINK tests/test-iov
LINK tests/test-aio
LINK tests/test-aio-multithread
LINK tests/test-throttle
LINK tests/test-thread-pool
LINK tests/test-hbitmap
LINK tests/test-blockjob
LINK tests/test-x86-cpuid
LINK tests/test-blockjob-txn
LINK tests/test-xbzrle
LINK tests/test-vmstate
LINK tests/test-cutils
LINK tests/test-shift128
LINK tests/test-int128
LINK tests/test-mul64
LINK tests/rcutorture
LINK tests/test-rcu-list
LINK tests/test-qdist
LINK tests/test-qht
LINK tests/qht-bench
LINK tests/test-bitops
LINK tests/test-bitcnt
LINK tests/test-qdev-global-props
LINK tests/check-qom-interface
LINK tests/check-qom-proplist
LINK tests/test-qemu-opts
LINK tests/test-write-threshold
LINK tests/test-crypto-hash
LINK tests/test-crypto-hmac
LINK tests/test-crypto-cipher
LINK tests/test-crypto-secret
LINK tests/test-crypto-tlscredsx509
LINK tests/test-crypto-tlssession
LINK tests/test-qga
LINK tests/test-timed-average
LINK tests/test-io-task
LINK tests/test-io-channel-socket
LINK tests/test-io-channel-file
LINK tests/test-io-channel-tls
LINK tests/test-io-channel-command
LINK tests/test-io-channel-buffer
LINK tests/test-base64
LINK tests/test-crypto-pbkdf
LINK tests/test-crypto-ivgen
LINK tests/test-crypto-afsplit
LINK tests/test-crypto-xts
LINK tests/test-crypto-block
LINK tests/test-logging
LINK tests/test-replication
LINK tests/test-bufferiszero
LINK tests/test-uuid
LINK tests/ptimer-test
LINK tests/boot-serial-test
LINK tests/tmp105-test
LINK tests/ds1338-test
LINK tests/m25p80-test
LINK tests/virtio-blk-test
LINK tests/test-arm-mptimer
LINK tests/endianness-test
LINK tests/fdc-test
LINK tests/ide-test
LINK tests/ahci-test
LINK tests/hd-geo-test
LINK tests/boot-order-test
LINK tests/bios-tables-test
LINK tests/pxe-test
LINK tests/rtc-test
LINK tests/ipmi-kcs-test
LINK tests/ipmi-bt-test
LINK tests/i440fx-test
LINK tests/fw_cfg-test
LINK tests/drive_del-test
LINK tests/wdt_ib700-test
LINK tests/tco-test
LINK tests/e1000-test
LINK tests/e1000e-test
LINK tests/rtl8139-test
LINK tests/pcnet-test
LINK tests/eepro100-test
LINK tests/ne2000-test
LINK tests/nvme-test
LINK tests/ac97-test
LINK tests/es1370-test
LINK tests/virtio-net-test
LINK tests/virtio-balloon-test
LINK tests/virtio-rng-test
LINK tests/virtio-scsi-test
LINK tests/virtio-9p-test
LINK tests/virtio-serial-test
LINK tests/virtio-console-test
LINK tests/tpci200-test
LINK tests/display-vga-test
LINK tests/ipoctal232-test
LINK tests/ivshmem-test
LINK tests/intel-hda-test
LINK tests/vmxnet3-test
LINK tests/pvpanic-test
LINK tests/i82801b11-test
LINK tests/ioh3420-test
LINK tests/usb-hcd-ohci-test
LINK tests/usb-hcd-ehci-test
LINK tests/usb-hcd-uhci-test
LINK tests/usb-hcd-xhci-test
LINK tests/pc-cpu-test
LINK tests/q35-test
LINK tests/test-netfilter
LINK tests/test-filter-mirror
LINK tests/test-filter-redirector
LINK tests/postcopy-test
LINK tests/test-x86-cpuid-compat
LINK tests/spapr-phb-test
LINK tests/prom-env-test
LINK tests/pnv-xscom-test
LINK tests/rtas-test
LINK tests/qom-test
LINK tests/device-introspect-test
GTESTER tests/test-char
GTESTER tests/check-qdict
GTESTER tests/check-qfloat
GTESTER tests/check-qint
GTESTER tests/check-qstring
GTESTER tests/check-qlist
GTESTER tests/check-qnull
GTESTER tests/check-qjson
LINK tests/test-qobject-output-visitor
LINK tests/test-qobject-input-visitor
LINK tests/test-clone-visitor
LINK tests/test-qobject-input-strict
LINK tests/test-qmp-commands
LINK tests/test-string-input-visitor
LINK tests/test-string-output-visitor
LINK tests/test-qmp-event
LINK tests/test-opts-visitor
GTESTER tests/test-coroutine
LINK tests/test-visitor-serialization
GTESTER tests/test-iov
GTESTER tests/test-aio
GTESTER tests/test-aio-multithread
GTESTER tests/test-throttle
GTESTER tests/test-thread-pool
GTESTER tests/test-hbitmap
GTESTER tests/test-blockjob
GTESTER tests/test-blockjob-txn
GTESTER tests/test-x86-cpuid
GTESTER tests/test-xbzrle
GTESTER tests/test-vmstate
GTESTER tests/test-cutils
GTESTER tests/test-shift128
GTESTER tests/test-mul64
GTESTER tests/test-int128
GTESTER tests/rcutorture
GTESTER tests/test-rcu-list
GTESTER tests/test-qdist
GTESTER tests/test-qht
LINK tests/test-qht-par
GTESTER tests/test-bitops
GTESTER tests/test-bitcnt
GTESTER tests/test-qdev-global-props
GTESTER tests/check-qom-interface
GTESTER tests/check-qom-proplist
GTESTER tests/test-qemu-opts
GTESTER tests/test-write-threshold
GTESTER tests/test-crypto-hash
GTESTER tests/test-crypto-hmac
GTESTER tests/test-crypto-cipher
GTESTER tests/test-crypto-secret
GTESTER tests/test-crypto-tlscredsx509
GTESTER tests/test-crypto-tlssession
GTESTER tests/test-qga
GTESTER tests/test-timed-average
GTESTER tests/test-io-task
GTESTER tests/test-io-channel-socket
GTESTER tests/test-io-channel-file
GTESTER tests/test-io-channel-tls
GTESTER tests/test-io-channel-command
GTESTER tests/test-io-channel-buffer
GTESTER tests/test-base64
GTESTER tests/test-crypto-pbkdf
GTESTER tests/test-crypto-ivgen
GTESTER tests/test-crypto-afsplit
GTESTER tests/test-crypto-xts
GTESTER tests/test-crypto-block
GTESTER tests/test-logging
GTESTER tests/test-replication
GTESTER tests/test-bufferiszero
GTESTER tests/test-uuid
GTESTER tests/ptimer-test
GTESTER check-qtest-aarch64
GTESTER check-qtest-alpha
GTESTER check-qtest-arm
GTESTER check-qtest-cris
GTESTER check-qtest-i386
GTESTER check-qtest-lm32
GTESTER check-qtest-m68k
GTESTER check-qtest-microblazeel
GTESTER check-qtest-microblaze
GTESTER check-qtest-mips64el
GTESTER check-qtest-mips64
GTESTER check-qtest-mipsel
GTESTER check-qtest-mips
GTESTER check-qtest-moxie
GTESTER check-qtest-nios2
GTESTER check-qtest-or1k
GTESTER check-qtest-ppc64
GTESTER check-qtest-ppcemb
"kvm" accelerator not found.
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
"kvm" accelerator not found.
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
"kvm" accelerator not found.
GTESTER check-qtest-ppc
GTESTER check-qtest-s390x
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
GTester: last random seed: R02S67b79687214a158c46bc466678067fdb
"kvm" accelerator not found.
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
"kvm" accelerator not found.
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
"kvm" accelerator not found.
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
"kvm" accelerator not found.
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
"kvm" accelerator not found.
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
"kvm" accelerator not found.
/var/tmp/patchew-tester-tmp-_t3ms3un/src/tests/Makefile.include:793: recipe for target 'check-qtest-s390x' failed
make: *** [check-qtest-s390x] Error 1
make: *** Waiting for unfinished jobs....
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
"kvm" accelerator not found.
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
"kvm" accelerator not found.
"kvm" accelerator not found.
=== OUTPUT END ===
Test command exited with code: 2
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@freelists.org
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PULL 00/30] target-arm queue
2017-02-27 18:04 Peter Maydell
2017-02-27 19:14 ` no-reply
@ 2017-02-28 12:07 ` Peter Maydell
1 sibling, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2017-02-28 12:07 UTC (permalink / raw)
To: QEMU Developers
On 27 February 2017 at 18:04, Peter Maydell <peter.maydell@linaro.org> wrote:
> ARM queu; includes all the NVIC rewrite patches.
> The QOMify-armv7m patchset hasn't got enough review just
> yet but I may be able to sneak it in before freeze
> tomorrow if it gets review. Didn't want to hold this lot
> up waiting, anyway.
>
> thanks
> -- PMM
>
>
> The following changes since commit 8f2d7c341184a95d05476ea3c45dbae2b9ddbe51:
>
> Merge remote-tracking branch 'remotes/berrange/tags/pull-qcrypto-2017-02-27-1' into staging (2017-02-27 15:33:21 +0000)
>
> are available in the git repository at:
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20170227
>
> for you to fetch changes up to 94d5bcf5a7f3799660b62098a5183f161aad0601:
>
> hw/arm/exynos: Fix proper mapping of CPUs by providing real cluster ID (2017-02-27 17:23:16 +0000)
>
> ----------------------------------------------------------------
> target-arm queue:
> * raspi2: implement RNG module, GPIO and new SD card controller
> (sufficient to boot new raspbian kernels)
> * sdhci: bugfixes for block transfers
> * virt: fix cpu object reference leak
> * Add missing fp_access_check() to aarch64 crypto instructions
> * cputlb: Don't assume do_unassigned_access() never returns
> * virt: Add a user option to disallow ITS instantiation
> * i.MX timers: fix reset handling
> * ARMv7M NVIC: rewrite to fix broken priority handling and masking
> * exynos: Fix proper mapping of CPUs by providing real cluster ID
> * exynos: Fix Linux kernel division by zero for PLLs
>
Unfortunately I see crashes or assert failures on the raspi2
model on OSX hosts. Not sure why OSX only, probably just that
the malloc/free has different patterns of reusing freed memory.
In any case we clearly didn't get the reparent-the-sdcard code
right, so I'm going to have to drop those patches for the moment :-(
thanks
-- PMM
^ permalink raw reply [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 00/30] target-arm queue
@ 2018-02-09 11:02 Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 01/30] target/arm: Add armv7m_nvic_set_pending_derived() Peter Maydell
` (30 more replies)
0 siblings, 31 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:02 UTC (permalink / raw)
To: qemu-devel
Another lump of target-arm patches. I still have some patches in
my to-review queue, but this is a big enough set that I wanted
to send it out.
thanks
-- PMM
The following changes since commit 04bb7fe2bf55bdf66d5b7a5a719b40bbb4048178:
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20180208' into staging (2018-02-08 17:41:15 +0000)
are available in the Git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20180209
for you to fetch changes up to bbba7757bacc9f890a3f028d328b4b429dbe78ec:
hw/core/generic-loader: Allow PC to be set on command line (2018-02-09 10:55:40 +0000)
----------------------------------------------------------------
target-arm queue:
* Support M profile derived exceptions on exception entry and exit
* Implement AArch64 v8.2 crypto insns (SHA-512, SHA-3, SM3, SM4)
* Implement working i.MX6 SD controller
* Various devices preparatory to i.MX7 support
* Preparatory patches for SVE emulation
* v8M: Fix bug in implementation of 'TT' insn
* Give useful error if user tries to use userspace GICv3 with KVM
----------------------------------------------------------------
Andrey Smirnov (10):
sdhci: Add i.MX specific subtype of SDHCI
hw: i.MX: Convert i.MX6 to use TYPE_IMX_USDHC
i.MX: Add code to emulate i.MX7 CCM, PMU and ANALOG IP blocks
i.MX: Add code to emulate i.MX2 watchdog IP block
i.MX: Add code to emulate i.MX7 SNVS IP-block
i.MX: Add code to emulate GPCv2 IP block
i.MX: Add i.MX7 GPT variant
i.MX: Add implementation of i.MX7 GPR IP block
usb: Add basic code to emulate Chipidea USB IP
hw/arm: Move virt's PSCI DT fixup code to arm/boot.c
Ard Biesheuvel (5):
target/arm: implement SHA-512 instructions
target/arm: implement SHA-3 instructions
target/arm: implement SM3 instructions
target/arm: implement SM4 instructions
target/arm: enable user-mode SHA-3, SM3, SM4 and SHA-512 instruction support
Christoffer Dall (1):
target/arm/kvm: gic: Prevent creating userspace GICv3 with KVM
Peter Maydell (9):
target/arm: Add armv7m_nvic_set_pending_derived()
target/arm: Split "get pending exception info" from "acknowledge it"
target/arm: Add ignore_stackfaults argument to v7m_exception_taken()
target/arm: Make v7M exception entry stack push check MPU
target/arm: Make v7m_push_callee_stack() honour MPU
target/arm: Make exception vector loads honour the SAU
target/arm: Handle exceptions during exception stack pop
target/arm/translate.c: Fix missing 'break' for TT insns
hw/core/generic-loader: Allow PC to be set on command line
Richard Henderson (5):
target/arm: Expand vector registers for SVE
target/arm: Add predicate registers for SVE
target/arm: Add SVE to migration state
target/arm: Add ZCR_ELx
target/arm: Add SVE state to TB->FLAGS
hw/intc/Makefile.objs | 2 +-
hw/misc/Makefile.objs | 4 +
hw/usb/Makefile.objs | 1 +
hw/sd/sdhci-internal.h | 23 ++
include/hw/intc/imx_gpcv2.h | 22 ++
include/hw/misc/imx2_wdt.h | 33 +++
include/hw/misc/imx7_ccm.h | 139 +++++++++++
include/hw/misc/imx7_gpr.h | 28 +++
include/hw/misc/imx7_snvs.h | 35 +++
include/hw/sd/sdhci.h | 13 ++
include/hw/timer/imx_gpt.h | 1 +
include/hw/usb/chipidea.h | 16 ++
target/arm/cpu.h | 120 ++++++++--
target/arm/helper.h | 12 +
target/arm/kvm_arm.h | 4 +
target/arm/translate.h | 2 +
hw/arm/boot.c | 65 ++++++
hw/arm/fsl-imx6.c | 2 +-
hw/arm/virt.c | 61 -----
hw/core/generic-loader.c | 2 +-
hw/intc/armv7m_nvic.c | 98 +++++++-
hw/intc/imx_gpcv2.c | 125 ++++++++++
hw/misc/imx2_wdt.c | 89 +++++++
hw/misc/imx7_ccm.c | 277 ++++++++++++++++++++++
hw/misc/imx7_gpr.c | 124 ++++++++++
hw/misc/imx7_snvs.c | 83 +++++++
hw/sd/sdhci.c | 230 ++++++++++++++++++-
hw/timer/imx_gpt.c | 25 ++
hw/usb/chipidea.c | 176 ++++++++++++++
linux-user/elfload.c | 19 ++
target/arm/cpu64.c | 4 +
target/arm/crypto_helper.c | 277 +++++++++++++++++++++-
target/arm/helper.c | 548 +++++++++++++++++++++++++++++++++++++-------
target/arm/machine.c | 88 ++++++-
target/arm/translate-a64.c | 350 +++++++++++++++++++++++++++-
target/arm/translate.c | 8 +-
hw/intc/trace-events | 5 +-
hw/misc/trace-events | 4 +
38 files changed, 2928 insertions(+), 187 deletions(-)
create mode 100644 include/hw/intc/imx_gpcv2.h
create mode 100644 include/hw/misc/imx2_wdt.h
create mode 100644 include/hw/misc/imx7_ccm.h
create mode 100644 include/hw/misc/imx7_gpr.h
create mode 100644 include/hw/misc/imx7_snvs.h
create mode 100644 include/hw/usb/chipidea.h
create mode 100644 hw/intc/imx_gpcv2.c
create mode 100644 hw/misc/imx2_wdt.c
create mode 100644 hw/misc/imx7_ccm.c
create mode 100644 hw/misc/imx7_gpr.c
create mode 100644 hw/misc/imx7_snvs.c
create mode 100644 hw/usb/chipidea.c
^ permalink raw reply [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 01/30] target/arm: Add armv7m_nvic_set_pending_derived()
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
@ 2018-02-09 11:02 ` Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 02/30] target/arm: Split "get pending exception info" from "acknowledge it" Peter Maydell
` (29 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:02 UTC (permalink / raw)
To: qemu-devel
In order to support derived exceptions (exceptions generated in
the course of trying to take an exception), we need to be able
to handle prioritizing whether to take the original exception
or the derived exception.
We do this by introducing a new function
armv7m_nvic_set_pending_derived() which the exception-taking code in
helper.c will call when a derived exception occurs. Derived
exceptions are dealt with mostly like normal pending exceptions, so
we share the implementation with the armv7m_nvic_set_pending()
function.
Note that the way we structure this is significantly different
from the v8M Arm ARM pseudocode: that does all the prioritization
logic in the DerivedLateArrival() function, whereas we choose to
let the existing "identify highest priority exception" logic
do the prioritization for us. The effect is the same, though.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 1517324542-6607-2-git-send-email-peter.maydell@linaro.org
---
target/arm/cpu.h | 13 ++++++++++
hw/intc/armv7m_nvic.c | 68 +++++++++++++++++++++++++++++++++++++++++++++++++--
hw/intc/trace-events | 2 +-
3 files changed, 80 insertions(+), 3 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 8d41f783dc..b3d4da3048 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1505,6 +1505,19 @@ static inline bool armv7m_nvic_can_take_pending_exception(void *opaque)
* of architecturally banked exceptions.
*/
void armv7m_nvic_set_pending(void *opaque, int irq, bool secure);
+/**
+ * armv7m_nvic_set_pending_derived: mark this derived exception as pending
+ * @opaque: the NVIC
+ * @irq: the exception number to mark pending
+ * @secure: false for non-banked exceptions or for the nonsecure
+ * version of a banked exception, true for the secure version of a banked
+ * exception.
+ *
+ * Similar to armv7m_nvic_set_pending(), but specifically for derived
+ * exceptions (exceptions generated in the course of trying to take
+ * a different exception).
+ */
+void armv7m_nvic_set_pending_derived(void *opaque, int irq, bool secure);
/**
* armv7m_nvic_acknowledge_irq: make highest priority pending exception active
* @opaque: the NVIC
diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index 8ca6ceeb9b..b4a6e7c62e 100644
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -503,8 +503,25 @@ static void armv7m_nvic_clear_pending(void *opaque, int irq, bool secure)
}
}
-void armv7m_nvic_set_pending(void *opaque, int irq, bool secure)
+static void do_armv7m_nvic_set_pending(void *opaque, int irq, bool secure,
+ bool derived)
{
+ /* Pend an exception, including possibly escalating it to HardFault.
+ *
+ * This function handles both "normal" pending of interrupts and
+ * exceptions, and also derived exceptions (ones which occur as
+ * a result of trying to take some other exception).
+ *
+ * If derived == true, the caller guarantees that we are part way through
+ * trying to take an exception (but have not yet called
+ * armv7m_nvic_acknowledge_irq() to make it active), and so:
+ * - s->vectpending is the "original exception" we were trying to take
+ * - irq is the "derived exception"
+ * - nvic_exec_prio(s) gives the priority before exception entry
+ * Here we handle the prioritization logic which the pseudocode puts
+ * in the DerivedLateArrival() function.
+ */
+
NVICState *s = (NVICState *)opaque;
bool banked = exc_is_banked(irq);
VecInfo *vec;
@@ -514,7 +531,44 @@ void armv7m_nvic_set_pending(void *opaque, int irq, bool secure)
vec = (banked && secure) ? &s->sec_vectors[irq] : &s->vectors[irq];
- trace_nvic_set_pending(irq, secure, vec->enabled, vec->prio);
+ trace_nvic_set_pending(irq, secure, derived, vec->enabled, vec->prio);
+
+ if (derived) {
+ /* Derived exceptions are always synchronous. */
+ assert(irq >= ARMV7M_EXCP_HARD && irq < ARMV7M_EXCP_PENDSV);
+
+ if (irq == ARMV7M_EXCP_DEBUG &&
+ exc_group_prio(s, vec->prio, secure) >= nvic_exec_prio(s)) {
+ /* DebugMonitorFault, but its priority is lower than the
+ * preempted exception priority: just ignore it.
+ */
+ return;
+ }
+
+ if (irq == ARMV7M_EXCP_HARD && vec->prio >= s->vectpending_prio) {
+ /* If this is a terminal exception (one which means we cannot
+ * take the original exception, like a failure to read its
+ * vector table entry), then we must take the derived exception.
+ * If the derived exception can't take priority over the
+ * original exception, then we go into Lockup.
+ *
+ * For QEMU, we rely on the fact that a derived exception is
+ * terminal if and only if it's reported to us as HardFault,
+ * which saves having to have an extra argument is_terminal
+ * that we'd only use in one place.
+ */
+ cpu_abort(&s->cpu->parent_obj,
+ "Lockup: can't take terminal derived exception "
+ "(original exception priority %d)\n",
+ s->vectpending_prio);
+ }
+ /* We now continue with the same code as for a normal pending
+ * exception, which will cause us to pend the derived exception.
+ * We'll then take either the original or the derived exception
+ * based on which is higher priority by the usual mechanism
+ * for selecting the highest priority pending interrupt.
+ */
+ }
if (irq >= ARMV7M_EXCP_HARD && irq < ARMV7M_EXCP_PENDSV) {
/* If a synchronous exception is pending then it may be
@@ -585,6 +639,16 @@ void armv7m_nvic_set_pending(void *opaque, int irq, bool secure)
}
}
+void armv7m_nvic_set_pending(void *opaque, int irq, bool secure)
+{
+ do_armv7m_nvic_set_pending(opaque, irq, secure, false);
+}
+
+void armv7m_nvic_set_pending_derived(void *opaque, int irq, bool secure)
+{
+ do_armv7m_nvic_set_pending(opaque, irq, secure, true);
+}
+
/* Make pending IRQ active. */
bool armv7m_nvic_acknowledge_irq(void *opaque)
{
diff --git a/hw/intc/trace-events b/hw/intc/trace-events
index be769186fc..09e87d14bd 100644
--- a/hw/intc/trace-events
+++ b/hw/intc/trace-events
@@ -177,7 +177,7 @@ nvic_set_prio(int irq, bool secure, uint8_t prio) "NVIC set irq %d secure-bank %
nvic_irq_update(int vectpending, int pendprio, int exception_prio, int level) "NVIC vectpending %d pending prio %d exception_prio %d: setting irq line to %d"
nvic_escalate_prio(int irq, int irqprio, int runprio) "NVIC escalating irq %d to HardFault: insufficient priority %d >= %d"
nvic_escalate_disabled(int irq) "NVIC escalating irq %d to HardFault: disabled"
-nvic_set_pending(int irq, bool secure, int en, int prio) "NVIC set pending irq %d secure-bank %d (enabled: %d priority %d)"
+nvic_set_pending(int irq, bool secure, bool derived, int en, int prio) "NVIC set pending irq %d secure-bank %d derived %d (enabled: %d priority %d)"
nvic_clear_pending(int irq, bool secure, int en, int prio) "NVIC clear pending irq %d secure-bank %d (enabled: %d priority %d)"
nvic_set_pending_level(int irq) "NVIC set pending: irq %d higher prio than vectpending: setting irq line to 1"
nvic_acknowledge_irq(int irq, int prio, bool targets_secure) "NVIC acknowledge IRQ: %d now active (prio %d targets_secure %d)"
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 02/30] target/arm: Split "get pending exception info" from "acknowledge it"
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 01/30] target/arm: Add armv7m_nvic_set_pending_derived() Peter Maydell
@ 2018-02-09 11:02 ` Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 03/30] target/arm: Add ignore_stackfaults argument to v7m_exception_taken() Peter Maydell
` (28 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:02 UTC (permalink / raw)
To: qemu-devel
Currently armv7m_nvic_acknowledge_irq() does three things:
* make the current highest priority pending interrupt active
* return a bool indicating whether that interrupt is targeting
Secure or NonSecure state
* implicitly tell the caller which is the highest priority
pending interrupt by setting env->v7m.exception
We need to split these jobs, because v7m_exception_taken()
needs to know whether the pending interrupt targets Secure so
it can choose to stack callee-saves registers or not, but it
must not make the interrupt active until after it has done
that stacking, in case the stacking causes a derived exception.
Similarly, it needs to know the number of the pending interrupt
so it can read the correct vector table entry before the
interrupt is made active, because vector table reads might
also cause a derived exception.
Create a new armv7m_nvic_get_pending_irq_info() function which simply
returns information about the highest priority pending interrupt, and
use it to rearrange the v7m_exception_taken() code so we don't
acknowledge the exception until we've done all the things which could
possibly cause a derived exception.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 1517324542-6607-3-git-send-email-peter.maydell@linaro.org
---
target/arm/cpu.h | 19 ++++++++++++++++---
hw/intc/armv7m_nvic.c | 30 +++++++++++++++++++++++-------
target/arm/helper.c | 16 ++++++++++++----
hw/intc/trace-events | 3 ++-
4 files changed, 53 insertions(+), 15 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index b3d4da3048..3533bb8e9a 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1518,6 +1518,21 @@ void armv7m_nvic_set_pending(void *opaque, int irq, bool secure);
* a different exception).
*/
void armv7m_nvic_set_pending_derived(void *opaque, int irq, bool secure);
+/**
+ * armv7m_nvic_get_pending_irq_info: return highest priority pending
+ * exception, and whether it targets Secure state
+ * @opaque: the NVIC
+ * @pirq: set to pending exception number
+ * @ptargets_secure: set to whether pending exception targets Secure
+ *
+ * This function writes the number of the highest priority pending
+ * exception (the one which would be made active by
+ * armv7m_nvic_acknowledge_irq()) to @pirq, and sets @ptargets_secure
+ * to true if the current highest priority pending exception should
+ * be taken to Secure state, false for NS.
+ */
+void armv7m_nvic_get_pending_irq_info(void *opaque, int *pirq,
+ bool *ptargets_secure);
/**
* armv7m_nvic_acknowledge_irq: make highest priority pending exception active
* @opaque: the NVIC
@@ -1525,10 +1540,8 @@ void armv7m_nvic_set_pending_derived(void *opaque, int irq, bool secure);
* Move the current highest priority pending exception from the pending
* state to the active state, and update v7m.exception to indicate that
* it is the exception currently being handled.
- *
- * Returns: true if exception should be taken to Secure state, false for NS
*/
-bool armv7m_nvic_acknowledge_irq(void *opaque);
+void armv7m_nvic_acknowledge_irq(void *opaque);
/**
* armv7m_nvic_complete_irq: complete specified interrupt or exception
* @opaque: the NVIC
diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index b4a6e7c62e..360889d30b 100644
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -650,24 +650,20 @@ void armv7m_nvic_set_pending_derived(void *opaque, int irq, bool secure)
}
/* Make pending IRQ active. */
-bool armv7m_nvic_acknowledge_irq(void *opaque)
+void armv7m_nvic_acknowledge_irq(void *opaque)
{
NVICState *s = (NVICState *)opaque;
CPUARMState *env = &s->cpu->env;
const int pending = s->vectpending;
const int running = nvic_exec_prio(s);
VecInfo *vec;
- bool targets_secure;
assert(pending > ARMV7M_EXCP_RESET && pending < s->num_irq);
if (s->vectpending_is_s_banked) {
vec = &s->sec_vectors[pending];
- targets_secure = true;
} else {
vec = &s->vectors[pending];
- targets_secure = !exc_is_banked(s->vectpending) &&
- exc_targets_secure(s, s->vectpending);
}
assert(vec->enabled);
@@ -675,7 +671,7 @@ bool armv7m_nvic_acknowledge_irq(void *opaque)
assert(s->vectpending_prio < running);
- trace_nvic_acknowledge_irq(pending, s->vectpending_prio, targets_secure);
+ trace_nvic_acknowledge_irq(pending, s->vectpending_prio);
vec->active = 1;
vec->pending = 0;
@@ -683,8 +679,28 @@ bool armv7m_nvic_acknowledge_irq(void *opaque)
write_v7m_exception(env, s->vectpending);
nvic_irq_update(s);
+}
+
+void armv7m_nvic_get_pending_irq_info(void *opaque,
+ int *pirq, bool *ptargets_secure)
+{
+ NVICState *s = (NVICState *)opaque;
+ const int pending = s->vectpending;
+ bool targets_secure;
+
+ assert(pending > ARMV7M_EXCP_RESET && pending < s->num_irq);
+
+ if (s->vectpending_is_s_banked) {
+ targets_secure = true;
+ } else {
+ targets_secure = !exc_is_banked(pending) &&
+ exc_targets_secure(s, pending);
+ }
+
+ trace_nvic_get_pending_irq_info(pending, targets_secure);
- return targets_secure;
+ *ptargets_secure = targets_secure;
+ *pirq = pending;
}
int armv7m_nvic_complete_irq(void *opaque, int irq, bool secure)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index bfce09643b..6062f380d4 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6395,12 +6395,12 @@ static uint32_t *get_v7m_sp_ptr(CPUARMState *env, bool secure, bool threadmode,
}
}
-static uint32_t arm_v7m_load_vector(ARMCPU *cpu, bool targets_secure)
+static uint32_t arm_v7m_load_vector(ARMCPU *cpu, int exc, bool targets_secure)
{
CPUState *cs = CPU(cpu);
CPUARMState *env = &cpu->env;
MemTxResult result;
- hwaddr vec = env->v7m.vecbase[targets_secure] + env->v7m.exception * 4;
+ hwaddr vec = env->v7m.vecbase[targets_secure] + exc * 4;
uint32_t addr;
addr = address_space_ldl(cs->as, vec,
@@ -6462,8 +6462,9 @@ static void v7m_exception_taken(ARMCPU *cpu, uint32_t lr, bool dotailchain)
CPUARMState *env = &cpu->env;
uint32_t addr;
bool targets_secure;
+ int exc;
- targets_secure = armv7m_nvic_acknowledge_irq(env->nvic);
+ armv7m_nvic_get_pending_irq_info(env->nvic, &exc, &targets_secure);
if (arm_feature(env, ARM_FEATURE_V8)) {
if (arm_feature(env, ARM_FEATURE_M_SECURITY) &&
@@ -6531,6 +6532,14 @@ static void v7m_exception_taken(ARMCPU *cpu, uint32_t lr, bool dotailchain)
}
}
+ addr = arm_v7m_load_vector(cpu, exc, targets_secure);
+
+ /* Now we've done everything that might cause a derived exception
+ * we can go ahead and activate whichever exception we're going to
+ * take (which might now be the derived exception).
+ */
+ armv7m_nvic_acknowledge_irq(env->nvic);
+
/* Switch to target security state -- must do this before writing SPSEL */
switch_v7m_security_state(env, targets_secure);
write_v7m_control_spsel(env, 0);
@@ -6538,7 +6547,6 @@ static void v7m_exception_taken(ARMCPU *cpu, uint32_t lr, bool dotailchain)
/* Clear IT bits */
env->condexec_bits = 0;
env->regs[14] = lr;
- addr = arm_v7m_load_vector(cpu, targets_secure);
env->regs[15] = addr & 0xfffffffe;
env->thumb = addr & 1;
}
diff --git a/hw/intc/trace-events b/hw/intc/trace-events
index 09e87d14bd..4092d2825e 100644
--- a/hw/intc/trace-events
+++ b/hw/intc/trace-events
@@ -180,7 +180,8 @@ nvic_escalate_disabled(int irq) "NVIC escalating irq %d to HardFault: disabled"
nvic_set_pending(int irq, bool secure, bool derived, int en, int prio) "NVIC set pending irq %d secure-bank %d derived %d (enabled: %d priority %d)"
nvic_clear_pending(int irq, bool secure, int en, int prio) "NVIC clear pending irq %d secure-bank %d (enabled: %d priority %d)"
nvic_set_pending_level(int irq) "NVIC set pending: irq %d higher prio than vectpending: setting irq line to 1"
-nvic_acknowledge_irq(int irq, int prio, bool targets_secure) "NVIC acknowledge IRQ: %d now active (prio %d targets_secure %d)"
+nvic_acknowledge_irq(int irq, int prio) "NVIC acknowledge IRQ: %d now active (prio %d)"
+nvic_get_pending_irq_info(int irq, bool secure) "NVIC next IRQ %d: targets_secure: %d"
nvic_complete_irq(int irq, bool secure) "NVIC complete IRQ %d (secure %d)"
nvic_set_irq_level(int irq, int level) "NVIC external irq %d level set to %d"
nvic_sysreg_read(uint64_t addr, uint32_t value, unsigned size) "NVIC sysreg read addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u"
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 03/30] target/arm: Add ignore_stackfaults argument to v7m_exception_taken()
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 01/30] target/arm: Add armv7m_nvic_set_pending_derived() Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 02/30] target/arm: Split "get pending exception info" from "acknowledge it" Peter Maydell
@ 2018-02-09 11:02 ` Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 04/30] target/arm: Make v7M exception entry stack push check MPU Peter Maydell
` (27 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:02 UTC (permalink / raw)
To: qemu-devel
In the v8M architecture, if the process of taking an exception
results in a further exception this is called a derived exception
(for example, an MPU exception when writing the exception frame to
memory). If the derived exception happens while pushing the initial
stack frame, we must ignore any subsequent possible exception
pushing the callee-saves registers.
In preparation for making the stack writes check for exceptions,
add a return value from v7m_push_stack() and a new parameter to
v7m_exception_taken(), so that the former can tell the latter that
it needs to ignore failures to write to the stack. We also plumb
the argument through to v7m_push_callee_stack(), which is where
the code to ignore the failures will be.
(Note that the v8M ARM pseudocode structures this slightly differently:
derived exceptions cause the attempt to process the original
exception to be abandoned; then at the top level it calls
DerivedLateArrival to prioritize the derived exception and call
TakeException from there. We choose to let the NVIC do the prioritization
and continue forward with a call to TakeException which will then
take either the original or the derived exception. The effect is
the same, but this structure works better for QEMU because we don't
have a convenient top level place to do the abandon-and-retry logic.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 1517324542-6607-4-git-send-email-peter.maydell@linaro.org
---
target/arm/helper.c | 35 +++++++++++++++++++++++------------
1 file changed, 23 insertions(+), 12 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 6062f380d4..c713eea424 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6419,7 +6419,8 @@ static uint32_t arm_v7m_load_vector(ARMCPU *cpu, int exc, bool targets_secure)
return addr;
}
-static void v7m_push_callee_stack(ARMCPU *cpu, uint32_t lr, bool dotailchain)
+static void v7m_push_callee_stack(ARMCPU *cpu, uint32_t lr, bool dotailchain,
+ bool ignore_faults)
{
/* For v8M, push the callee-saves register part of the stack frame.
* Compare the v8M pseudocode PushCalleeStack().
@@ -6453,7 +6454,8 @@ static void v7m_push_callee_stack(ARMCPU *cpu, uint32_t lr, bool dotailchain)
*frame_sp_p = frameptr;
}
-static void v7m_exception_taken(ARMCPU *cpu, uint32_t lr, bool dotailchain)
+static void v7m_exception_taken(ARMCPU *cpu, uint32_t lr, bool dotailchain,
+ bool ignore_stackfaults)
{
/* Do the "take the exception" parts of exception entry,
* but not the pushing of state to the stack. This is
@@ -6490,7 +6492,8 @@ static void v7m_exception_taken(ARMCPU *cpu, uint32_t lr, bool dotailchain)
*/
if (lr & R_V7M_EXCRET_DCRS_MASK &&
!(dotailchain && (lr & R_V7M_EXCRET_ES_MASK))) {
- v7m_push_callee_stack(cpu, lr, dotailchain);
+ v7m_push_callee_stack(cpu, lr, dotailchain,
+ ignore_stackfaults);
}
lr |= R_V7M_EXCRET_DCRS_MASK;
}
@@ -6551,10 +6554,13 @@ static void v7m_exception_taken(ARMCPU *cpu, uint32_t lr, bool dotailchain)
env->thumb = addr & 1;
}
-static void v7m_push_stack(ARMCPU *cpu)
+static bool v7m_push_stack(ARMCPU *cpu)
{
/* Do the "set up stack frame" part of exception entry,
* similar to pseudocode PushStack().
+ * Return true if we generate a derived exception (and so
+ * should ignore further stack faults trying to process
+ * that derived exception.)
*/
CPUARMState *env = &cpu->env;
uint32_t xpsr = xpsr_read(env);
@@ -6574,6 +6580,8 @@ static void v7m_push_stack(ARMCPU *cpu)
v7m_push(env, env->regs[2]);
v7m_push(env, env->regs[1]);
v7m_push(env, env->regs[0]);
+
+ return false;
}
static void do_v7m_exception_exit(ARMCPU *cpu)
@@ -6719,7 +6727,7 @@ static void do_v7m_exception_exit(ARMCPU *cpu)
if (sfault) {
env->v7m.sfsr |= R_V7M_SFSR_INVER_MASK;
armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SECURE, false);
- v7m_exception_taken(cpu, excret, true);
+ v7m_exception_taken(cpu, excret, true, false);
qemu_log_mask(CPU_LOG_INT, "...taking SecureFault on existing "
"stackframe: failed EXC_RETURN.ES validity check\n");
return;
@@ -6731,7 +6739,7 @@ static void do_v7m_exception_exit(ARMCPU *cpu)
*/
env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_INVPC_MASK;
armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, env->v7m.secure);
- v7m_exception_taken(cpu, excret, true);
+ v7m_exception_taken(cpu, excret, true, false);
qemu_log_mask(CPU_LOG_INT, "...taking UsageFault on existing "
"stackframe: failed exception return integrity check\n");
return;
@@ -6779,7 +6787,7 @@ static void do_v7m_exception_exit(ARMCPU *cpu)
/* Take a SecureFault on the current stack */
env->v7m.sfsr |= R_V7M_SFSR_INVIS_MASK;
armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SECURE, false);
- v7m_exception_taken(cpu, excret, true);
+ v7m_exception_taken(cpu, excret, true, false);
qemu_log_mask(CPU_LOG_INT, "...taking SecureFault on existing "
"stackframe: failed exception return integrity "
"signature check\n");
@@ -6844,7 +6852,7 @@ static void do_v7m_exception_exit(ARMCPU *cpu)
armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE,
env->v7m.secure);
env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_INVPC_MASK;
- v7m_exception_taken(cpu, excret, true);
+ v7m_exception_taken(cpu, excret, true, false);
qemu_log_mask(CPU_LOG_INT, "...taking UsageFault on existing "
"stackframe: failed exception return integrity "
"check\n");
@@ -6877,11 +6885,13 @@ static void do_v7m_exception_exit(ARMCPU *cpu)
/* Take an INVPC UsageFault by pushing the stack again;
* we know we're v7M so this is never a Secure UsageFault.
*/
+ bool ignore_stackfaults;
+
assert(!arm_feature(env, ARM_FEATURE_V8));
armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, false);
env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_INVPC_MASK;
- v7m_push_stack(cpu);
- v7m_exception_taken(cpu, excret, false);
+ ignore_stackfaults = v7m_push_stack(cpu);
+ v7m_exception_taken(cpu, excret, false, ignore_stackfaults);
qemu_log_mask(CPU_LOG_INT, "...taking UsageFault on new stackframe: "
"failed exception return integrity check\n");
return;
@@ -7122,6 +7132,7 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
ARMCPU *cpu = ARM_CPU(cs);
CPUARMState *env = &cpu->env;
uint32_t lr;
+ bool ignore_stackfaults;
arm_log_exception(cs->exception_index);
@@ -7296,8 +7307,8 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
lr |= R_V7M_EXCRET_MODE_MASK;
}
- v7m_push_stack(cpu);
- v7m_exception_taken(cpu, lr, false);
+ ignore_stackfaults = v7m_push_stack(cpu);
+ v7m_exception_taken(cpu, lr, false, ignore_stackfaults);
qemu_log_mask(CPU_LOG_INT, "... as %d\n", env->v7m.exception);
}
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 04/30] target/arm: Make v7M exception entry stack push check MPU
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (2 preceding siblings ...)
2018-02-09 11:02 ` [Qemu-devel] [PULL 03/30] target/arm: Add ignore_stackfaults argument to v7m_exception_taken() Peter Maydell
@ 2018-02-09 11:02 ` Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 05/30] target/arm: Make v7m_push_callee_stack() honour MPU Peter Maydell
` (26 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:02 UTC (permalink / raw)
To: qemu-devel
The memory writes done to push registers on the stack
on exception entry in M profile CPUs are supposed to
go via MPU permissions checks, which may cause us to
take a derived exception instead of the original one of
the MPU lookup fails. We were implementing these as
always-succeeds direct writes to physical memory.
Rewrite v7m_push_stack() to do the necessary checks.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 1517324542-6607-5-git-send-email-peter.maydell@linaro.org
---
target/arm/helper.c | 103 ++++++++++++++++++++++++++++++++++++++++++++--------
1 file changed, 87 insertions(+), 16 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index c713eea424..f31472a044 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6161,12 +6161,66 @@ uint32_t arm_phys_excp_target_el(CPUState *cs, uint32_t excp_idx,
return target_el;
}
-static void v7m_push(CPUARMState *env, uint32_t val)
+static bool v7m_stack_write(ARMCPU *cpu, uint32_t addr, uint32_t value,
+ ARMMMUIdx mmu_idx, bool ignfault)
{
- CPUState *cs = CPU(arm_env_get_cpu(env));
+ CPUState *cs = CPU(cpu);
+ CPUARMState *env = &cpu->env;
+ MemTxAttrs attrs = {};
+ MemTxResult txres;
+ target_ulong page_size;
+ hwaddr physaddr;
+ int prot;
+ ARMMMUFaultInfo fi;
+ bool secure = mmu_idx & ARM_MMU_IDX_M_S;
+ int exc;
+ bool exc_secure;
- env->regs[13] -= 4;
- stl_phys(cs->as, env->regs[13], val);
+ if (get_phys_addr(env, addr, MMU_DATA_STORE, mmu_idx, &physaddr,
+ &attrs, &prot, &page_size, &fi, NULL)) {
+ /* MPU/SAU lookup failed */
+ if (fi.type == ARMFault_QEMU_SFault) {
+ qemu_log_mask(CPU_LOG_INT,
+ "...SecureFault with SFSR.AUVIOL during stacking\n");
+ env->v7m.sfsr |= R_V7M_SFSR_AUVIOL_MASK | R_V7M_SFSR_SFARVALID_MASK;
+ env->v7m.sfar = addr;
+ exc = ARMV7M_EXCP_SECURE;
+ exc_secure = false;
+ } else {
+ qemu_log_mask(CPU_LOG_INT, "...MemManageFault with CFSR.MSTKERR\n");
+ env->v7m.cfsr[secure] |= R_V7M_CFSR_MSTKERR_MASK;
+ exc = ARMV7M_EXCP_MEM;
+ exc_secure = secure;
+ }
+ goto pend_fault;
+ }
+ address_space_stl_le(arm_addressspace(cs, attrs), physaddr, value,
+ attrs, &txres);
+ if (txres != MEMTX_OK) {
+ /* BusFault trying to write the data */
+ qemu_log_mask(CPU_LOG_INT, "...BusFault with BFSR.STKERR\n");
+ env->v7m.cfsr[M_REG_NS] |= R_V7M_CFSR_STKERR_MASK;
+ exc = ARMV7M_EXCP_BUS;
+ exc_secure = false;
+ goto pend_fault;
+ }
+ return true;
+
+pend_fault:
+ /* By pending the exception at this point we are making
+ * the IMPDEF choice "overridden exceptions pended" (see the
+ * MergeExcInfo() pseudocode). The other choice would be to not
+ * pend them now and then make a choice about which to throw away
+ * later if we have two derived exceptions.
+ * The only case when we must not pend the exception but instead
+ * throw it away is if we are doing the push of the callee registers
+ * and we've already generated a derived exception. Even in this
+ * case we will still update the fault status registers.
+ */
+ if (!ignfault) {
+ armv7m_nvic_set_pending_derived(env->nvic, exc, exc_secure);
+ }
+ return false;
}
/* Return true if we're using the process stack pointer (not the MSP) */
@@ -6562,26 +6616,43 @@ static bool v7m_push_stack(ARMCPU *cpu)
* should ignore further stack faults trying to process
* that derived exception.)
*/
+ bool stacked_ok;
CPUARMState *env = &cpu->env;
uint32_t xpsr = xpsr_read(env);
+ uint32_t frameptr = env->regs[13];
+ ARMMMUIdx mmu_idx = core_to_arm_mmu_idx(env, cpu_mmu_index(env, false));
/* Align stack pointer if the guest wants that */
- if ((env->regs[13] & 4) &&
+ if ((frameptr & 4) &&
(env->v7m.ccr[env->v7m.secure] & R_V7M_CCR_STKALIGN_MASK)) {
- env->regs[13] -= 4;
+ frameptr -= 4;
xpsr |= XPSR_SPREALIGN;
}
- /* Switch to the handler mode. */
- v7m_push(env, xpsr);
- v7m_push(env, env->regs[15]);
- v7m_push(env, env->regs[14]);
- v7m_push(env, env->regs[12]);
- v7m_push(env, env->regs[3]);
- v7m_push(env, env->regs[2]);
- v7m_push(env, env->regs[1]);
- v7m_push(env, env->regs[0]);
- return false;
+ frameptr -= 0x20;
+
+ /* Write as much of the stack frame as we can. If we fail a stack
+ * write this will result in a derived exception being pended
+ * (which may be taken in preference to the one we started with
+ * if it has higher priority).
+ */
+ stacked_ok =
+ v7m_stack_write(cpu, frameptr, env->regs[0], mmu_idx, false) &&
+ v7m_stack_write(cpu, frameptr + 4, env->regs[1], mmu_idx, false) &&
+ v7m_stack_write(cpu, frameptr + 8, env->regs[2], mmu_idx, false) &&
+ v7m_stack_write(cpu, frameptr + 12, env->regs[3], mmu_idx, false) &&
+ v7m_stack_write(cpu, frameptr + 16, env->regs[12], mmu_idx, false) &&
+ v7m_stack_write(cpu, frameptr + 20, env->regs[14], mmu_idx, false) &&
+ v7m_stack_write(cpu, frameptr + 24, env->regs[15], mmu_idx, false) &&
+ v7m_stack_write(cpu, frameptr + 28, xpsr, mmu_idx, false);
+
+ /* Update SP regardless of whether any of the stack accesses failed.
+ * When we implement v8M stack limit checking then this attempt to
+ * update SP might also fail and result in a derived exception.
+ */
+ env->regs[13] = frameptr;
+
+ return !stacked_ok;
}
static void do_v7m_exception_exit(ARMCPU *cpu)
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 05/30] target/arm: Make v7m_push_callee_stack() honour MPU
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (3 preceding siblings ...)
2018-02-09 11:02 ` [Qemu-devel] [PULL 04/30] target/arm: Make v7M exception entry stack push check MPU Peter Maydell
@ 2018-02-09 11:02 ` Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 06/30] target/arm: Make exception vector loads honour the SAU Peter Maydell
` (25 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:02 UTC (permalink / raw)
To: qemu-devel
Make v7m_push_callee_stack() honour the MPU by using the
new v7m_stack_write() function. We return a flag to indicate
whether the pushes failed, which we can then use in
v7m_exception_taken() to cause us to handle the derived
exception correctly.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 1517324542-6607-6-git-send-email-peter.maydell@linaro.org
---
target/arm/helper.c | 64 ++++++++++++++++++++++++++++++++++++++++-------------
1 file changed, 49 insertions(+), 15 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index f31472a044..614162dd1e 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6473,7 +6473,7 @@ static uint32_t arm_v7m_load_vector(ARMCPU *cpu, int exc, bool targets_secure)
return addr;
}
-static void v7m_push_callee_stack(ARMCPU *cpu, uint32_t lr, bool dotailchain,
+static bool v7m_push_callee_stack(ARMCPU *cpu, uint32_t lr, bool dotailchain,
bool ignore_faults)
{
/* For v8M, push the callee-saves register part of the stack frame.
@@ -6481,31 +6481,55 @@ static void v7m_push_callee_stack(ARMCPU *cpu, uint32_t lr, bool dotailchain,
* In the tailchaining case this may not be the current stack.
*/
CPUARMState *env = &cpu->env;
- CPUState *cs = CPU(cpu);
uint32_t *frame_sp_p;
uint32_t frameptr;
+ ARMMMUIdx mmu_idx;
+ bool stacked_ok;
if (dotailchain) {
- frame_sp_p = get_v7m_sp_ptr(env, true,
- lr & R_V7M_EXCRET_MODE_MASK,
+ bool mode = lr & R_V7M_EXCRET_MODE_MASK;
+ bool priv = !(env->v7m.control[M_REG_S] & R_V7M_CONTROL_NPRIV_MASK) ||
+ !mode;
+
+ mmu_idx = arm_v7m_mmu_idx_for_secstate_and_priv(env, M_REG_S, priv);
+ frame_sp_p = get_v7m_sp_ptr(env, M_REG_S, mode,
lr & R_V7M_EXCRET_SPSEL_MASK);
} else {
+ mmu_idx = core_to_arm_mmu_idx(env, cpu_mmu_index(env, false));
frame_sp_p = &env->regs[13];
}
frameptr = *frame_sp_p - 0x28;
- stl_phys(cs->as, frameptr, 0xfefa125b);
- stl_phys(cs->as, frameptr + 0x8, env->regs[4]);
- stl_phys(cs->as, frameptr + 0xc, env->regs[5]);
- stl_phys(cs->as, frameptr + 0x10, env->regs[6]);
- stl_phys(cs->as, frameptr + 0x14, env->regs[7]);
- stl_phys(cs->as, frameptr + 0x18, env->regs[8]);
- stl_phys(cs->as, frameptr + 0x1c, env->regs[9]);
- stl_phys(cs->as, frameptr + 0x20, env->regs[10]);
- stl_phys(cs->as, frameptr + 0x24, env->regs[11]);
+ /* Write as much of the stack frame as we can. A write failure may
+ * cause us to pend a derived exception.
+ */
+ stacked_ok =
+ v7m_stack_write(cpu, frameptr, 0xfefa125b, mmu_idx, ignore_faults) &&
+ v7m_stack_write(cpu, frameptr + 0x8, env->regs[4], mmu_idx,
+ ignore_faults) &&
+ v7m_stack_write(cpu, frameptr + 0xc, env->regs[5], mmu_idx,
+ ignore_faults) &&
+ v7m_stack_write(cpu, frameptr + 0x10, env->regs[6], mmu_idx,
+ ignore_faults) &&
+ v7m_stack_write(cpu, frameptr + 0x14, env->regs[7], mmu_idx,
+ ignore_faults) &&
+ v7m_stack_write(cpu, frameptr + 0x18, env->regs[8], mmu_idx,
+ ignore_faults) &&
+ v7m_stack_write(cpu, frameptr + 0x1c, env->regs[9], mmu_idx,
+ ignore_faults) &&
+ v7m_stack_write(cpu, frameptr + 0x20, env->regs[10], mmu_idx,
+ ignore_faults) &&
+ v7m_stack_write(cpu, frameptr + 0x24, env->regs[11], mmu_idx,
+ ignore_faults);
+ /* Update SP regardless of whether any of the stack accesses failed.
+ * When we implement v8M stack limit checking then this attempt to
+ * update SP might also fail and result in a derived exception.
+ */
*frame_sp_p = frameptr;
+
+ return !stacked_ok;
}
static void v7m_exception_taken(ARMCPU *cpu, uint32_t lr, bool dotailchain,
@@ -6519,6 +6543,7 @@ static void v7m_exception_taken(ARMCPU *cpu, uint32_t lr, bool dotailchain,
uint32_t addr;
bool targets_secure;
int exc;
+ bool push_failed = false;
armv7m_nvic_get_pending_irq_info(env->nvic, &exc, &targets_secure);
@@ -6546,8 +6571,8 @@ static void v7m_exception_taken(ARMCPU *cpu, uint32_t lr, bool dotailchain,
*/
if (lr & R_V7M_EXCRET_DCRS_MASK &&
!(dotailchain && (lr & R_V7M_EXCRET_ES_MASK))) {
- v7m_push_callee_stack(cpu, lr, dotailchain,
- ignore_stackfaults);
+ push_failed = v7m_push_callee_stack(cpu, lr, dotailchain,
+ ignore_stackfaults);
}
lr |= R_V7M_EXCRET_DCRS_MASK;
}
@@ -6589,6 +6614,15 @@ static void v7m_exception_taken(ARMCPU *cpu, uint32_t lr, bool dotailchain,
}
}
+ if (push_failed && !ignore_stackfaults) {
+ /* Derived exception on callee-saves register stacking:
+ * we might now want to take a different exception which
+ * targets a different security state, so try again from the top.
+ */
+ v7m_exception_taken(cpu, lr, true, true);
+ return;
+ }
+
addr = arm_v7m_load_vector(cpu, exc, targets_secure);
/* Now we've done everything that might cause a derived exception
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 06/30] target/arm: Make exception vector loads honour the SAU
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (4 preceding siblings ...)
2018-02-09 11:02 ` [Qemu-devel] [PULL 05/30] target/arm: Make v7m_push_callee_stack() honour MPU Peter Maydell
@ 2018-02-09 11:02 ` Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 07/30] target/arm: Handle exceptions during exception stack pop Peter Maydell
` (24 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:02 UTC (permalink / raw)
To: qemu-devel
Make the load of the exception vector from the vector table honour
the SAU and any bus error on the load (possibly provoking a derived
exception), rather than simply aborting if the load fails.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 1517324542-6607-7-git-send-email-peter.maydell@linaro.org
---
target/arm/helper.c | 71 +++++++++++++++++++++++++++++++++++++++++------------
1 file changed, 55 insertions(+), 16 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 614162dd1e..c74f076d9d 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6449,28 +6449,63 @@ static uint32_t *get_v7m_sp_ptr(CPUARMState *env, bool secure, bool threadmode,
}
}
-static uint32_t arm_v7m_load_vector(ARMCPU *cpu, int exc, bool targets_secure)
+static bool arm_v7m_load_vector(ARMCPU *cpu, int exc, bool targets_secure,
+ uint32_t *pvec)
{
CPUState *cs = CPU(cpu);
CPUARMState *env = &cpu->env;
MemTxResult result;
- hwaddr vec = env->v7m.vecbase[targets_secure] + exc * 4;
- uint32_t addr;
+ uint32_t addr = env->v7m.vecbase[targets_secure] + exc * 4;
+ uint32_t vector_entry;
+ MemTxAttrs attrs = {};
+ ARMMMUIdx mmu_idx;
+ bool exc_secure;
+
+ mmu_idx = arm_v7m_mmu_idx_for_secstate_and_priv(env, targets_secure, true);
- addr = address_space_ldl(cs->as, vec,
- MEMTXATTRS_UNSPECIFIED, &result);
+ /* We don't do a get_phys_addr() here because the rules for vector
+ * loads are special: they always use the default memory map, and
+ * the default memory map permits reads from all addresses.
+ * Since there's no easy way to pass through to pmsav8_mpu_lookup()
+ * that we want this special case which would always say "yes",
+ * we just do the SAU lookup here followed by a direct physical load.
+ */
+ attrs.secure = targets_secure;
+ attrs.user = false;
+
+ if (arm_feature(env, ARM_FEATURE_M_SECURITY)) {
+ V8M_SAttributes sattrs = {};
+
+ v8m_security_lookup(env, addr, MMU_DATA_LOAD, mmu_idx, &sattrs);
+ if (sattrs.ns) {
+ attrs.secure = false;
+ } else if (!targets_secure) {
+ /* NS access to S memory */
+ goto load_fail;
+ }
+ }
+
+ vector_entry = address_space_ldl(arm_addressspace(cs, attrs), addr,
+ attrs, &result);
if (result != MEMTX_OK) {
- /* Architecturally this should cause a HardFault setting HSFR.VECTTBL,
- * which would then be immediately followed by our failing to load
- * the entry vector for that HardFault, which is a Lockup case.
- * Since we don't model Lockup, we just report this guest error
- * via cpu_abort().
- */
- cpu_abort(cs, "Failed to read from %s exception vector table "
- "entry %08x\n", targets_secure ? "secure" : "nonsecure",
- (unsigned)vec);
+ goto load_fail;
}
- return addr;
+ *pvec = vector_entry;
+ return true;
+
+load_fail:
+ /* All vector table fetch fails are reported as HardFault, with
+ * HFSR.VECTTBL and .FORCED set. (FORCED is set because
+ * technically the underlying exception is a MemManage or BusFault
+ * that is escalated to HardFault.) This is a terminal exception,
+ * so we will either take the HardFault immediately or else enter
+ * lockup (the latter case is handled in armv7m_nvic_set_pending_derived()).
+ */
+ exc_secure = targets_secure ||
+ !(cpu->env.v7m.aircr & R_V7M_AIRCR_BFHFNMINS_MASK);
+ env->v7m.hfsr |= R_V7M_HFSR_VECTTBL_MASK | R_V7M_HFSR_FORCED_MASK;
+ armv7m_nvic_set_pending_derived(env->nvic, ARMV7M_EXCP_HARD, exc_secure);
+ return false;
}
static bool v7m_push_callee_stack(ARMCPU *cpu, uint32_t lr, bool dotailchain,
@@ -6623,7 +6658,11 @@ static void v7m_exception_taken(ARMCPU *cpu, uint32_t lr, bool dotailchain,
return;
}
- addr = arm_v7m_load_vector(cpu, exc, targets_secure);
+ if (!arm_v7m_load_vector(cpu, exc, targets_secure, &addr)) {
+ /* Vector load failed: derived exception */
+ v7m_exception_taken(cpu, lr, true, true);
+ return;
+ }
/* Now we've done everything that might cause a derived exception
* we can go ahead and activate whichever exception we're going to
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 07/30] target/arm: Handle exceptions during exception stack pop
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (5 preceding siblings ...)
2018-02-09 11:02 ` [Qemu-devel] [PULL 06/30] target/arm: Make exception vector loads honour the SAU Peter Maydell
@ 2018-02-09 11:02 ` Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 08/30] target/arm: implement SHA-512 instructions Peter Maydell
` (23 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:02 UTC (permalink / raw)
To: qemu-devel
Handle possible MPU faults, SAU faults or bus errors when
popping register state off the stack during exception return.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 1517324542-6607-8-git-send-email-peter.maydell@linaro.org
---
target/arm/helper.c | 115 ++++++++++++++++++++++++++++++++++++++++++----------
1 file changed, 94 insertions(+), 21 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index c74f076d9d..c6e3b3913e 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6223,6 +6223,67 @@ pend_fault:
return false;
}
+static bool v7m_stack_read(ARMCPU *cpu, uint32_t *dest, uint32_t addr,
+ ARMMMUIdx mmu_idx)
+{
+ CPUState *cs = CPU(cpu);
+ CPUARMState *env = &cpu->env;
+ MemTxAttrs attrs = {};
+ MemTxResult txres;
+ target_ulong page_size;
+ hwaddr physaddr;
+ int prot;
+ ARMMMUFaultInfo fi;
+ bool secure = mmu_idx & ARM_MMU_IDX_M_S;
+ int exc;
+ bool exc_secure;
+ uint32_t value;
+
+ if (get_phys_addr(env, addr, MMU_DATA_LOAD, mmu_idx, &physaddr,
+ &attrs, &prot, &page_size, &fi, NULL)) {
+ /* MPU/SAU lookup failed */
+ if (fi.type == ARMFault_QEMU_SFault) {
+ qemu_log_mask(CPU_LOG_INT,
+ "...SecureFault with SFSR.AUVIOL during unstack\n");
+ env->v7m.sfsr |= R_V7M_SFSR_AUVIOL_MASK | R_V7M_SFSR_SFARVALID_MASK;
+ env->v7m.sfar = addr;
+ exc = ARMV7M_EXCP_SECURE;
+ exc_secure = false;
+ } else {
+ qemu_log_mask(CPU_LOG_INT,
+ "...MemManageFault with CFSR.MUNSTKERR\n");
+ env->v7m.cfsr[secure] |= R_V7M_CFSR_MUNSTKERR_MASK;
+ exc = ARMV7M_EXCP_MEM;
+ exc_secure = secure;
+ }
+ goto pend_fault;
+ }
+
+ value = address_space_ldl(arm_addressspace(cs, attrs), physaddr,
+ attrs, &txres);
+ if (txres != MEMTX_OK) {
+ /* BusFault trying to read the data */
+ qemu_log_mask(CPU_LOG_INT, "...BusFault with BFSR.UNSTKERR\n");
+ env->v7m.cfsr[M_REG_NS] |= R_V7M_CFSR_UNSTKERR_MASK;
+ exc = ARMV7M_EXCP_BUS;
+ exc_secure = false;
+ goto pend_fault;
+ }
+
+ *dest = value;
+ return true;
+
+pend_fault:
+ /* By pending the exception at this point we are making
+ * the IMPDEF choice "overridden exceptions pended" (see the
+ * MergeExcInfo() pseudocode). The other choice would be to not
+ * pend them now and then make a choice about which to throw away
+ * later if we have two derived exceptions.
+ */
+ armv7m_nvic_set_pending(env->nvic, exc, exc_secure);
+ return false;
+}
+
/* Return true if we're using the process stack pointer (not the MSP) */
static bool v7m_using_psp(CPUARMState *env)
{
@@ -6912,6 +6973,11 @@ static void do_v7m_exception_exit(ARMCPU *cpu)
!return_to_handler,
return_to_sp_process);
uint32_t frameptr = *frame_sp_p;
+ bool pop_ok = true;
+ ARMMMUIdx mmu_idx;
+
+ mmu_idx = arm_v7m_mmu_idx_for_secstate_and_priv(env, return_to_secure,
+ !return_to_handler);
if (!QEMU_IS_ALIGNED(frameptr, 8) &&
arm_feature(env, ARM_FEATURE_V8)) {
@@ -6938,29 +7004,38 @@ static void do_v7m_exception_exit(ARMCPU *cpu)
return;
}
- env->regs[4] = ldl_phys(cs->as, frameptr + 0x8);
- env->regs[5] = ldl_phys(cs->as, frameptr + 0xc);
- env->regs[6] = ldl_phys(cs->as, frameptr + 0x10);
- env->regs[7] = ldl_phys(cs->as, frameptr + 0x14);
- env->regs[8] = ldl_phys(cs->as, frameptr + 0x18);
- env->regs[9] = ldl_phys(cs->as, frameptr + 0x1c);
- env->regs[10] = ldl_phys(cs->as, frameptr + 0x20);
- env->regs[11] = ldl_phys(cs->as, frameptr + 0x24);
+ pop_ok =
+ v7m_stack_read(cpu, &env->regs[4], frameptr + 0x8, mmu_idx) &&
+ v7m_stack_read(cpu, &env->regs[4], frameptr + 0x8, mmu_idx) &&
+ v7m_stack_read(cpu, &env->regs[5], frameptr + 0xc, mmu_idx) &&
+ v7m_stack_read(cpu, &env->regs[6], frameptr + 0x10, mmu_idx) &&
+ v7m_stack_read(cpu, &env->regs[7], frameptr + 0x14, mmu_idx) &&
+ v7m_stack_read(cpu, &env->regs[8], frameptr + 0x18, mmu_idx) &&
+ v7m_stack_read(cpu, &env->regs[9], frameptr + 0x1c, mmu_idx) &&
+ v7m_stack_read(cpu, &env->regs[10], frameptr + 0x20, mmu_idx) &&
+ v7m_stack_read(cpu, &env->regs[11], frameptr + 0x24, mmu_idx);
frameptr += 0x28;
}
- /* Pop registers. TODO: make these accesses use the correct
- * attributes and address space (S/NS, priv/unpriv) and handle
- * memory transaction failures.
- */
- env->regs[0] = ldl_phys(cs->as, frameptr);
- env->regs[1] = ldl_phys(cs->as, frameptr + 0x4);
- env->regs[2] = ldl_phys(cs->as, frameptr + 0x8);
- env->regs[3] = ldl_phys(cs->as, frameptr + 0xc);
- env->regs[12] = ldl_phys(cs->as, frameptr + 0x10);
- env->regs[14] = ldl_phys(cs->as, frameptr + 0x14);
- env->regs[15] = ldl_phys(cs->as, frameptr + 0x18);
+ /* Pop registers */
+ pop_ok = pop_ok &&
+ v7m_stack_read(cpu, &env->regs[0], frameptr, mmu_idx) &&
+ v7m_stack_read(cpu, &env->regs[1], frameptr + 0x4, mmu_idx) &&
+ v7m_stack_read(cpu, &env->regs[2], frameptr + 0x8, mmu_idx) &&
+ v7m_stack_read(cpu, &env->regs[3], frameptr + 0xc, mmu_idx) &&
+ v7m_stack_read(cpu, &env->regs[12], frameptr + 0x10, mmu_idx) &&
+ v7m_stack_read(cpu, &env->regs[14], frameptr + 0x14, mmu_idx) &&
+ v7m_stack_read(cpu, &env->regs[15], frameptr + 0x18, mmu_idx) &&
+ v7m_stack_read(cpu, &xpsr, frameptr + 0x1c, mmu_idx);
+
+ if (!pop_ok) {
+ /* v7m_stack_read() pended a fault, so take it (as a tail
+ * chained exception on the same stack frame)
+ */
+ v7m_exception_taken(cpu, excret, true, false);
+ return;
+ }
/* Returning from an exception with a PC with bit 0 set is defined
* behaviour on v8M (bit 0 is ignored), but for v7M it was specified
@@ -6979,8 +7054,6 @@ static void do_v7m_exception_exit(ARMCPU *cpu)
}
}
- xpsr = ldl_phys(cs->as, frameptr + 0x1c);
-
if (arm_feature(env, ARM_FEATURE_V8)) {
/* For v8M we have to check whether the xPSR exception field
* matches the EXCRET value for return to handler/thread
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 08/30] target/arm: implement SHA-512 instructions
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (6 preceding siblings ...)
2018-02-09 11:02 ` [Qemu-devel] [PULL 07/30] target/arm: Handle exceptions during exception stack pop Peter Maydell
@ 2018-02-09 11:02 ` Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 09/30] target/arm: implement SHA-3 instructions Peter Maydell
` (22 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:02 UTC (permalink / raw)
To: qemu-devel
From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
This implements emulation of the new SHA-512 instructions that have
been added as an optional extensions to the ARMv8 Crypto Extensions
in ARM v8.2.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Message-id: 20180207111729.15737-2-ard.biesheuvel@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/cpu.h | 1 +
target/arm/helper.h | 5 +++
target/arm/crypto_helper.c | 90 ++++++++++++++++++++++++++++++++++++-
target/arm/translate-a64.c | 110 +++++++++++++++++++++++++++++++++++++++++++++
4 files changed, 205 insertions(+), 1 deletion(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 3533bb8e9a..4d380fb3e5 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1341,6 +1341,7 @@ enum arm_features {
ARM_FEATURE_M_SECURITY, /* M profile Security Extension */
ARM_FEATURE_JAZELLE, /* has (trivial) Jazelle implementation */
ARM_FEATURE_SVE, /* has Scalable Vector Extension */
+ ARM_FEATURE_V8_SHA512, /* implements SHA512 part of v8 Crypto Extensions */
};
static inline int arm_feature(CPUARMState *env, int feature)
diff --git a/target/arm/helper.h b/target/arm/helper.h
index 5dec2e6262..81d4607028 100644
--- a/target/arm/helper.h
+++ b/target/arm/helper.h
@@ -534,6 +534,11 @@ DEF_HELPER_FLAGS_3(crypto_sha256h2, TCG_CALL_NO_RWG, void, ptr, ptr, ptr)
DEF_HELPER_FLAGS_2(crypto_sha256su0, TCG_CALL_NO_RWG, void, ptr, ptr)
DEF_HELPER_FLAGS_3(crypto_sha256su1, TCG_CALL_NO_RWG, void, ptr, ptr, ptr)
+DEF_HELPER_FLAGS_3(crypto_sha512h, TCG_CALL_NO_RWG, void, ptr, ptr, ptr)
+DEF_HELPER_FLAGS_3(crypto_sha512h2, TCG_CALL_NO_RWG, void, ptr, ptr, ptr)
+DEF_HELPER_FLAGS_2(crypto_sha512su0, TCG_CALL_NO_RWG, void, ptr, ptr)
+DEF_HELPER_FLAGS_3(crypto_sha512su1, TCG_CALL_NO_RWG, void, ptr, ptr, ptr)
+
DEF_HELPER_FLAGS_3(crc32, TCG_CALL_NO_RWG_SE, i32, i32, i32, i32)
DEF_HELPER_FLAGS_3(crc32c, TCG_CALL_NO_RWG_SE, i32, i32, i32, i32)
DEF_HELPER_2(dc_zva, void, env, i64)
diff --git a/target/arm/crypto_helper.c b/target/arm/crypto_helper.c
index 9ca0bdead7..3d8d1fb5e7 100644
--- a/target/arm/crypto_helper.c
+++ b/target/arm/crypto_helper.c
@@ -1,7 +1,7 @@
/*
* crypto_helper.c - emulate v8 Crypto Extensions instructions
*
- * Copyright (C) 2013 - 2014 Linaro Ltd <ard.biesheuvel@linaro.org>
+ * Copyright (C) 2013 - 2018 Linaro Ltd <ard.biesheuvel@linaro.org>
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
@@ -419,3 +419,91 @@ void HELPER(crypto_sha256su1)(void *vd, void *vn, void *vm)
rd[0] = d.l[0];
rd[1] = d.l[1];
}
+
+/*
+ * The SHA-512 logical functions (same as above but using 64-bit operands)
+ */
+
+static uint64_t cho512(uint64_t x, uint64_t y, uint64_t z)
+{
+ return (x & (y ^ z)) ^ z;
+}
+
+static uint64_t maj512(uint64_t x, uint64_t y, uint64_t z)
+{
+ return (x & y) | ((x | y) & z);
+}
+
+static uint64_t S0_512(uint64_t x)
+{
+ return ror64(x, 28) ^ ror64(x, 34) ^ ror64(x, 39);
+}
+
+static uint64_t S1_512(uint64_t x)
+{
+ return ror64(x, 14) ^ ror64(x, 18) ^ ror64(x, 41);
+}
+
+static uint64_t s0_512(uint64_t x)
+{
+ return ror64(x, 1) ^ ror64(x, 8) ^ (x >> 7);
+}
+
+static uint64_t s1_512(uint64_t x)
+{
+ return ror64(x, 19) ^ ror64(x, 61) ^ (x >> 6);
+}
+
+void HELPER(crypto_sha512h)(void *vd, void *vn, void *vm)
+{
+ uint64_t *rd = vd;
+ uint64_t *rn = vn;
+ uint64_t *rm = vm;
+ uint64_t d0 = rd[0];
+ uint64_t d1 = rd[1];
+
+ d1 += S1_512(rm[1]) + cho512(rm[1], rn[0], rn[1]);
+ d0 += S1_512(d1 + rm[0]) + cho512(d1 + rm[0], rm[1], rn[0]);
+
+ rd[0] = d0;
+ rd[1] = d1;
+}
+
+void HELPER(crypto_sha512h2)(void *vd, void *vn, void *vm)
+{
+ uint64_t *rd = vd;
+ uint64_t *rn = vn;
+ uint64_t *rm = vm;
+ uint64_t d0 = rd[0];
+ uint64_t d1 = rd[1];
+
+ d1 += S0_512(rm[0]) + maj512(rn[0], rm[1], rm[0]);
+ d0 += S0_512(d1) + maj512(d1, rm[0], rm[1]);
+
+ rd[0] = d0;
+ rd[1] = d1;
+}
+
+void HELPER(crypto_sha512su0)(void *vd, void *vn)
+{
+ uint64_t *rd = vd;
+ uint64_t *rn = vn;
+ uint64_t d0 = rd[0];
+ uint64_t d1 = rd[1];
+
+ d0 += s0_512(rd[1]);
+ d1 += s0_512(rn[0]);
+
+ rd[0] = d0;
+ rd[1] = d1;
+}
+
+void HELPER(crypto_sha512su1)(void *vd, void *vn, void *vm)
+{
+ uint64_t *rd = vd;
+ uint64_t *rn = vn;
+ uint64_t *rm = vm;
+
+ rd[0] += s1_512(rn[0]) + rm[0];
+ rd[1] += s1_512(rn[1]) + rm[1];
+}
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 0830c3f1c8..095aa5dea4 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -11587,6 +11587,114 @@ static void disas_crypto_two_reg_sha(DisasContext *s, uint32_t insn)
tcg_temp_free_ptr(tcg_rn_ptr);
}
+/* Crypto three-reg SHA512
+ * 31 21 20 16 15 14 13 12 11 10 9 5 4 0
+ * +-----------------------+------+---+---+-----+--------+------+------+
+ * | 1 1 0 0 1 1 1 0 0 1 1 | Rm | 1 | O | 0 0 | opcode | Rn | Rd |
+ * +-----------------------+------+---+---+-----+--------+------+------+
+ */
+static void disas_crypto_three_reg_sha512(DisasContext *s, uint32_t insn)
+{
+ int opcode = extract32(insn, 10, 2);
+ int o = extract32(insn, 14, 1);
+ int rm = extract32(insn, 16, 5);
+ int rn = extract32(insn, 5, 5);
+ int rd = extract32(insn, 0, 5);
+ int feature;
+ CryptoThreeOpFn *genfn;
+
+ if (o == 0) {
+ switch (opcode) {
+ case 0: /* SHA512H */
+ feature = ARM_FEATURE_V8_SHA512;
+ genfn = gen_helper_crypto_sha512h;
+ break;
+ case 1: /* SHA512H2 */
+ feature = ARM_FEATURE_V8_SHA512;
+ genfn = gen_helper_crypto_sha512h2;
+ break;
+ case 2: /* SHA512SU1 */
+ feature = ARM_FEATURE_V8_SHA512;
+ genfn = gen_helper_crypto_sha512su1;
+ break;
+ default:
+ unallocated_encoding(s);
+ return;
+ }
+ } else {
+ unallocated_encoding(s);
+ return;
+ }
+
+ if (!arm_dc_feature(s, feature)) {
+ unallocated_encoding(s);
+ return;
+ }
+
+ if (!fp_access_check(s)) {
+ return;
+ }
+
+ if (genfn) {
+ TCGv_ptr tcg_rd_ptr, tcg_rn_ptr, tcg_rm_ptr;
+
+ tcg_rd_ptr = vec_full_reg_ptr(s, rd);
+ tcg_rn_ptr = vec_full_reg_ptr(s, rn);
+ tcg_rm_ptr = vec_full_reg_ptr(s, rm);
+
+ genfn(tcg_rd_ptr, tcg_rn_ptr, tcg_rm_ptr);
+
+ tcg_temp_free_ptr(tcg_rd_ptr);
+ tcg_temp_free_ptr(tcg_rn_ptr);
+ tcg_temp_free_ptr(tcg_rm_ptr);
+ } else {
+ g_assert_not_reached();
+ }
+}
+
+/* Crypto two-reg SHA512
+ * 31 12 11 10 9 5 4 0
+ * +-----------------------------------------+--------+------+------+
+ * | 1 1 0 0 1 1 1 0 1 1 0 0 0 0 0 0 1 0 0 0 | opcode | Rn | Rd |
+ * +-----------------------------------------+--------+------+------+
+ */
+static void disas_crypto_two_reg_sha512(DisasContext *s, uint32_t insn)
+{
+ int opcode = extract32(insn, 10, 2);
+ int rn = extract32(insn, 5, 5);
+ int rd = extract32(insn, 0, 5);
+ TCGv_ptr tcg_rd_ptr, tcg_rn_ptr;
+ int feature;
+ CryptoTwoOpFn *genfn;
+
+ switch (opcode) {
+ case 0: /* SHA512SU0 */
+ feature = ARM_FEATURE_V8_SHA512;
+ genfn = gen_helper_crypto_sha512su0;
+ break;
+ default:
+ unallocated_encoding(s);
+ return;
+ }
+
+ if (!arm_dc_feature(s, feature)) {
+ unallocated_encoding(s);
+ return;
+ }
+
+ if (!fp_access_check(s)) {
+ return;
+ }
+
+ tcg_rd_ptr = vec_full_reg_ptr(s, rd);
+ tcg_rn_ptr = vec_full_reg_ptr(s, rn);
+
+ genfn(tcg_rd_ptr, tcg_rn_ptr);
+
+ tcg_temp_free_ptr(tcg_rd_ptr);
+ tcg_temp_free_ptr(tcg_rn_ptr);
+}
+
/* C3.6 Data processing - SIMD, inc Crypto
*
* As the decode gets a little complex we are using a table based
@@ -11616,6 +11724,8 @@ static const AArch64DecodeTable data_proc_simd[] = {
{ 0x4e280800, 0xff3e0c00, disas_crypto_aes },
{ 0x5e000000, 0xff208c00, disas_crypto_three_reg_sha },
{ 0x5e280800, 0xff3e0c00, disas_crypto_two_reg_sha },
+ { 0xce608000, 0xffe0b000, disas_crypto_three_reg_sha512 },
+ { 0xcec08000, 0xfffff000, disas_crypto_two_reg_sha512 },
{ 0x00000000, 0x00000000, NULL }
};
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 09/30] target/arm: implement SHA-3 instructions
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (7 preceding siblings ...)
2018-02-09 11:02 ` [Qemu-devel] [PULL 08/30] target/arm: implement SHA-512 instructions Peter Maydell
@ 2018-02-09 11:02 ` Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 10/30] target/arm: implement SM3 instructions Peter Maydell
` (21 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:02 UTC (permalink / raw)
To: qemu-devel
From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
This implements emulation of the new SHA-3 instructions that have
been added as an optional extensions to the ARMv8 Crypto Extensions
in ARM v8.2.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Message-id: 20180207111729.15737-3-ard.biesheuvel@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/cpu.h | 1 +
target/arm/translate-a64.c | 148 +++++++++++++++++++++++++++++++++++++++++++--
2 files changed, 145 insertions(+), 4 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 4d380fb3e5..86411320aa 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1342,6 +1342,7 @@ enum arm_features {
ARM_FEATURE_JAZELLE, /* has (trivial) Jazelle implementation */
ARM_FEATURE_SVE, /* has Scalable Vector Extension */
ARM_FEATURE_V8_SHA512, /* implements SHA512 part of v8 Crypto Extensions */
+ ARM_FEATURE_V8_SHA3, /* implements SHA3 part of v8 Crypto Extensions */
};
static inline int arm_feature(CPUARMState *env, int feature)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 095aa5dea4..19804fd110 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -11617,9 +11617,10 @@ static void disas_crypto_three_reg_sha512(DisasContext *s, uint32_t insn)
feature = ARM_FEATURE_V8_SHA512;
genfn = gen_helper_crypto_sha512su1;
break;
- default:
- unallocated_encoding(s);
- return;
+ case 3: /* RAX1 */
+ feature = ARM_FEATURE_V8_SHA3;
+ genfn = NULL;
+ break;
}
} else {
unallocated_encoding(s);
@@ -11648,7 +11649,28 @@ static void disas_crypto_three_reg_sha512(DisasContext *s, uint32_t insn)
tcg_temp_free_ptr(tcg_rn_ptr);
tcg_temp_free_ptr(tcg_rm_ptr);
} else {
- g_assert_not_reached();
+ TCGv_i64 tcg_op1, tcg_op2, tcg_res[2];
+ int pass;
+
+ tcg_op1 = tcg_temp_new_i64();
+ tcg_op2 = tcg_temp_new_i64();
+ tcg_res[0] = tcg_temp_new_i64();
+ tcg_res[1] = tcg_temp_new_i64();
+
+ for (pass = 0; pass < 2; pass++) {
+ read_vec_element(s, tcg_op1, rn, pass, MO_64);
+ read_vec_element(s, tcg_op2, rm, pass, MO_64);
+
+ tcg_gen_rotli_i64(tcg_res[pass], tcg_op2, 1);
+ tcg_gen_xor_i64(tcg_res[pass], tcg_res[pass], tcg_op1);
+ }
+ write_vec_element(s, tcg_res[0], rd, 0, MO_64);
+ write_vec_element(s, tcg_res[1], rd, 1, MO_64);
+
+ tcg_temp_free_i64(tcg_op1);
+ tcg_temp_free_i64(tcg_op2);
+ tcg_temp_free_i64(tcg_res[0]);
+ tcg_temp_free_i64(tcg_res[1]);
}
}
@@ -11695,6 +11717,122 @@ static void disas_crypto_two_reg_sha512(DisasContext *s, uint32_t insn)
tcg_temp_free_ptr(tcg_rn_ptr);
}
+/* Crypto four-register
+ * 31 23 22 21 20 16 15 14 10 9 5 4 0
+ * +-------------------+-----+------+---+------+------+------+
+ * | 1 1 0 0 1 1 1 0 0 | Op0 | Rm | 0 | Ra | Rn | Rd |
+ * +-------------------+-----+------+---+------+------+------+
+ */
+static void disas_crypto_four_reg(DisasContext *s, uint32_t insn)
+{
+ int op0 = extract32(insn, 21, 2);
+ int rm = extract32(insn, 16, 5);
+ int ra = extract32(insn, 10, 5);
+ int rn = extract32(insn, 5, 5);
+ int rd = extract32(insn, 0, 5);
+ int feature;
+
+ switch (op0) {
+ case 0: /* EOR3 */
+ case 1: /* BCAX */
+ feature = ARM_FEATURE_V8_SHA3;
+ break;
+ default:
+ unallocated_encoding(s);
+ return;
+ }
+
+ if (!arm_dc_feature(s, feature)) {
+ unallocated_encoding(s);
+ return;
+ }
+
+ if (!fp_access_check(s)) {
+ return;
+ }
+
+ if (op0 < 2) {
+ TCGv_i64 tcg_op1, tcg_op2, tcg_op3, tcg_res[2];
+ int pass;
+
+ tcg_op1 = tcg_temp_new_i64();
+ tcg_op2 = tcg_temp_new_i64();
+ tcg_op3 = tcg_temp_new_i64();
+ tcg_res[0] = tcg_temp_new_i64();
+ tcg_res[1] = tcg_temp_new_i64();
+
+ for (pass = 0; pass < 2; pass++) {
+ read_vec_element(s, tcg_op1, rn, pass, MO_64);
+ read_vec_element(s, tcg_op2, rm, pass, MO_64);
+ read_vec_element(s, tcg_op3, ra, pass, MO_64);
+
+ if (op0 == 0) {
+ /* EOR3 */
+ tcg_gen_xor_i64(tcg_res[pass], tcg_op2, tcg_op3);
+ } else {
+ /* BCAX */
+ tcg_gen_andc_i64(tcg_res[pass], tcg_op2, tcg_op3);
+ }
+ tcg_gen_xor_i64(tcg_res[pass], tcg_res[pass], tcg_op1);
+ }
+ write_vec_element(s, tcg_res[0], rd, 0, MO_64);
+ write_vec_element(s, tcg_res[1], rd, 1, MO_64);
+
+ tcg_temp_free_i64(tcg_op1);
+ tcg_temp_free_i64(tcg_op2);
+ tcg_temp_free_i64(tcg_op3);
+ tcg_temp_free_i64(tcg_res[0]);
+ tcg_temp_free_i64(tcg_res[1]);
+ } else {
+ g_assert_not_reached();
+ }
+}
+
+/* Crypto XAR
+ * 31 21 20 16 15 10 9 5 4 0
+ * +-----------------------+------+--------+------+------+
+ * | 1 1 0 0 1 1 1 0 1 0 0 | Rm | imm6 | Rn | Rd |
+ * +-----------------------+------+--------+------+------+
+ */
+static void disas_crypto_xar(DisasContext *s, uint32_t insn)
+{
+ int rm = extract32(insn, 16, 5);
+ int imm6 = extract32(insn, 10, 6);
+ int rn = extract32(insn, 5, 5);
+ int rd = extract32(insn, 0, 5);
+ TCGv_i64 tcg_op1, tcg_op2, tcg_res[2];
+ int pass;
+
+ if (!arm_dc_feature(s, ARM_FEATURE_V8_SHA3)) {
+ unallocated_encoding(s);
+ return;
+ }
+
+ if (!fp_access_check(s)) {
+ return;
+ }
+
+ tcg_op1 = tcg_temp_new_i64();
+ tcg_op2 = tcg_temp_new_i64();
+ tcg_res[0] = tcg_temp_new_i64();
+ tcg_res[1] = tcg_temp_new_i64();
+
+ for (pass = 0; pass < 2; pass++) {
+ read_vec_element(s, tcg_op1, rn, pass, MO_64);
+ read_vec_element(s, tcg_op2, rm, pass, MO_64);
+
+ tcg_gen_xor_i64(tcg_res[pass], tcg_op1, tcg_op2);
+ tcg_gen_rotri_i64(tcg_res[pass], tcg_res[pass], imm6);
+ }
+ write_vec_element(s, tcg_res[0], rd, 0, MO_64);
+ write_vec_element(s, tcg_res[1], rd, 1, MO_64);
+
+ tcg_temp_free_i64(tcg_op1);
+ tcg_temp_free_i64(tcg_op2);
+ tcg_temp_free_i64(tcg_res[0]);
+ tcg_temp_free_i64(tcg_res[1]);
+}
+
/* C3.6 Data processing - SIMD, inc Crypto
*
* As the decode gets a little complex we are using a table based
@@ -11726,6 +11864,8 @@ static const AArch64DecodeTable data_proc_simd[] = {
{ 0x5e280800, 0xff3e0c00, disas_crypto_two_reg_sha },
{ 0xce608000, 0xffe0b000, disas_crypto_three_reg_sha512 },
{ 0xcec08000, 0xfffff000, disas_crypto_two_reg_sha512 },
+ { 0xce000000, 0xff808000, disas_crypto_four_reg },
+ { 0xce800000, 0xffe00000, disas_crypto_xar },
{ 0x00000000, 0x00000000, NULL }
};
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 10/30] target/arm: implement SM3 instructions
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (8 preceding siblings ...)
2018-02-09 11:02 ` [Qemu-devel] [PULL 09/30] target/arm: implement SHA-3 instructions Peter Maydell
@ 2018-02-09 11:02 ` Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 11/30] target/arm: implement SM4 instructions Peter Maydell
` (20 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:02 UTC (permalink / raw)
To: qemu-devel
From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
This implements emulation of the new SM3 instructions that have
been added as an optional extension to the ARMv8 Crypto Extensions
in ARM v8.2.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Message-id: 20180207111729.15737-4-ard.biesheuvel@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/cpu.h | 1 +
target/arm/helper.h | 4 ++
target/arm/crypto_helper.c | 96 ++++++++++++++++++++++++++++++++++++++++++++++
target/arm/translate-a64.c | 88 ++++++++++++++++++++++++++++++++++++++++--
4 files changed, 186 insertions(+), 3 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 86411320aa..f63b6e174a 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1343,6 +1343,7 @@ enum arm_features {
ARM_FEATURE_SVE, /* has Scalable Vector Extension */
ARM_FEATURE_V8_SHA512, /* implements SHA512 part of v8 Crypto Extensions */
ARM_FEATURE_V8_SHA3, /* implements SHA3 part of v8 Crypto Extensions */
+ ARM_FEATURE_V8_SM3, /* implements SM3 part of v8 Crypto Extensions */
};
static inline int arm_feature(CPUARMState *env, int feature)
diff --git a/target/arm/helper.h b/target/arm/helper.h
index 81d4607028..9d9f42cc89 100644
--- a/target/arm/helper.h
+++ b/target/arm/helper.h
@@ -539,6 +539,10 @@ DEF_HELPER_FLAGS_3(crypto_sha512h2, TCG_CALL_NO_RWG, void, ptr, ptr, ptr)
DEF_HELPER_FLAGS_2(crypto_sha512su0, TCG_CALL_NO_RWG, void, ptr, ptr)
DEF_HELPER_FLAGS_3(crypto_sha512su1, TCG_CALL_NO_RWG, void, ptr, ptr, ptr)
+DEF_HELPER_FLAGS_5(crypto_sm3tt, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32, i32)
+DEF_HELPER_FLAGS_3(crypto_sm3partw1, TCG_CALL_NO_RWG, void, ptr, ptr, ptr)
+DEF_HELPER_FLAGS_3(crypto_sm3partw2, TCG_CALL_NO_RWG, void, ptr, ptr, ptr)
+
DEF_HELPER_FLAGS_3(crc32, TCG_CALL_NO_RWG_SE, i32, i32, i32, i32)
DEF_HELPER_FLAGS_3(crc32c, TCG_CALL_NO_RWG_SE, i32, i32, i32, i32)
DEF_HELPER_2(dc_zva, void, env, i64)
diff --git a/target/arm/crypto_helper.c b/target/arm/crypto_helper.c
index 3d8d1fb5e7..2f6744edb0 100644
--- a/target/arm/crypto_helper.c
+++ b/target/arm/crypto_helper.c
@@ -507,3 +507,99 @@ void HELPER(crypto_sha512su1)(void *vd, void *vn, void *vm)
rd[0] += s1_512(rn[0]) + rm[0];
rd[1] += s1_512(rn[1]) + rm[1];
}
+
+void HELPER(crypto_sm3partw1)(void *vd, void *vn, void *vm)
+{
+ uint64_t *rd = vd;
+ uint64_t *rn = vn;
+ uint64_t *rm = vm;
+ union CRYPTO_STATE d = { .l = { rd[0], rd[1] } };
+ union CRYPTO_STATE n = { .l = { rn[0], rn[1] } };
+ union CRYPTO_STATE m = { .l = { rm[0], rm[1] } };
+ uint32_t t;
+
+ t = CR_ST_WORD(d, 0) ^ CR_ST_WORD(n, 0) ^ ror32(CR_ST_WORD(m, 1), 17);
+ CR_ST_WORD(d, 0) = t ^ ror32(t, 17) ^ ror32(t, 9);
+
+ t = CR_ST_WORD(d, 1) ^ CR_ST_WORD(n, 1) ^ ror32(CR_ST_WORD(m, 2), 17);
+ CR_ST_WORD(d, 1) = t ^ ror32(t, 17) ^ ror32(t, 9);
+
+ t = CR_ST_WORD(d, 2) ^ CR_ST_WORD(n, 2) ^ ror32(CR_ST_WORD(m, 3), 17);
+ CR_ST_WORD(d, 2) = t ^ ror32(t, 17) ^ ror32(t, 9);
+
+ t = CR_ST_WORD(d, 3) ^ CR_ST_WORD(n, 3) ^ ror32(CR_ST_WORD(d, 0), 17);
+ CR_ST_WORD(d, 3) = t ^ ror32(t, 17) ^ ror32(t, 9);
+
+ rd[0] = d.l[0];
+ rd[1] = d.l[1];
+}
+
+void HELPER(crypto_sm3partw2)(void *vd, void *vn, void *vm)
+{
+ uint64_t *rd = vd;
+ uint64_t *rn = vn;
+ uint64_t *rm = vm;
+ union CRYPTO_STATE d = { .l = { rd[0], rd[1] } };
+ union CRYPTO_STATE n = { .l = { rn[0], rn[1] } };
+ union CRYPTO_STATE m = { .l = { rm[0], rm[1] } };
+ uint32_t t = CR_ST_WORD(n, 0) ^ ror32(CR_ST_WORD(m, 0), 25);
+
+ CR_ST_WORD(d, 0) ^= t;
+ CR_ST_WORD(d, 1) ^= CR_ST_WORD(n, 1) ^ ror32(CR_ST_WORD(m, 1), 25);
+ CR_ST_WORD(d, 2) ^= CR_ST_WORD(n, 2) ^ ror32(CR_ST_WORD(m, 2), 25);
+ CR_ST_WORD(d, 3) ^= CR_ST_WORD(n, 3) ^ ror32(CR_ST_WORD(m, 3), 25) ^
+ ror32(t, 17) ^ ror32(t, 2) ^ ror32(t, 26);
+
+ rd[0] = d.l[0];
+ rd[1] = d.l[1];
+}
+
+void HELPER(crypto_sm3tt)(void *vd, void *vn, void *vm, uint32_t imm2,
+ uint32_t opcode)
+{
+ uint64_t *rd = vd;
+ uint64_t *rn = vn;
+ uint64_t *rm = vm;
+ union CRYPTO_STATE d = { .l = { rd[0], rd[1] } };
+ union CRYPTO_STATE n = { .l = { rn[0], rn[1] } };
+ union CRYPTO_STATE m = { .l = { rm[0], rm[1] } };
+ uint32_t t;
+
+ assert(imm2 < 4);
+
+ if (opcode == 0 || opcode == 2) {
+ /* SM3TT1A, SM3TT2A */
+ t = par(CR_ST_WORD(d, 3), CR_ST_WORD(d, 2), CR_ST_WORD(d, 1));
+ } else if (opcode == 1) {
+ /* SM3TT1B */
+ t = maj(CR_ST_WORD(d, 3), CR_ST_WORD(d, 2), CR_ST_WORD(d, 1));
+ } else if (opcode == 3) {
+ /* SM3TT2B */
+ t = cho(CR_ST_WORD(d, 3), CR_ST_WORD(d, 2), CR_ST_WORD(d, 1));
+ } else {
+ g_assert_not_reached();
+ }
+
+ t += CR_ST_WORD(d, 0) + CR_ST_WORD(m, imm2);
+
+ CR_ST_WORD(d, 0) = CR_ST_WORD(d, 1);
+
+ if (opcode < 2) {
+ /* SM3TT1A, SM3TT1B */
+ t += CR_ST_WORD(n, 3) ^ ror32(CR_ST_WORD(d, 3), 20);
+
+ CR_ST_WORD(d, 1) = ror32(CR_ST_WORD(d, 2), 23);
+ } else {
+ /* SM3TT2A, SM3TT2B */
+ t += CR_ST_WORD(n, 3);
+ t ^= rol32(t, 9) ^ rol32(t, 17);
+
+ CR_ST_WORD(d, 1) = ror32(CR_ST_WORD(d, 2), 13);
+ }
+
+ CR_ST_WORD(d, 2) = CR_ST_WORD(d, 3);
+ CR_ST_WORD(d, 3) = t;
+
+ rd[0] = d.l[0];
+ rd[1] = d.l[1];
+}
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 19804fd110..2f8b4e6150 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -11623,8 +11623,19 @@ static void disas_crypto_three_reg_sha512(DisasContext *s, uint32_t insn)
break;
}
} else {
- unallocated_encoding(s);
- return;
+ switch (opcode) {
+ case 0: /* SM3PARTW1 */
+ feature = ARM_FEATURE_V8_SM3;
+ genfn = gen_helper_crypto_sm3partw1;
+ break;
+ case 1: /* SM3PARTW2 */
+ feature = ARM_FEATURE_V8_SM3;
+ genfn = gen_helper_crypto_sm3partw2;
+ break;
+ default:
+ unallocated_encoding(s);
+ return;
+ }
}
if (!arm_dc_feature(s, feature)) {
@@ -11737,6 +11748,9 @@ static void disas_crypto_four_reg(DisasContext *s, uint32_t insn)
case 1: /* BCAX */
feature = ARM_FEATURE_V8_SHA3;
break;
+ case 2: /* SM3SS1 */
+ feature = ARM_FEATURE_V8_SM3;
+ break;
default:
unallocated_encoding(s);
return;
@@ -11784,7 +11798,33 @@ static void disas_crypto_four_reg(DisasContext *s, uint32_t insn)
tcg_temp_free_i64(tcg_res[0]);
tcg_temp_free_i64(tcg_res[1]);
} else {
- g_assert_not_reached();
+ TCGv_i32 tcg_op1, tcg_op2, tcg_op3, tcg_res, tcg_zero;
+
+ tcg_op1 = tcg_temp_new_i32();
+ tcg_op2 = tcg_temp_new_i32();
+ tcg_op3 = tcg_temp_new_i32();
+ tcg_res = tcg_temp_new_i32();
+ tcg_zero = tcg_const_i32(0);
+
+ read_vec_element_i32(s, tcg_op1, rn, 3, MO_32);
+ read_vec_element_i32(s, tcg_op2, rm, 3, MO_32);
+ read_vec_element_i32(s, tcg_op3, ra, 3, MO_32);
+
+ tcg_gen_rotri_i32(tcg_res, tcg_op1, 20);
+ tcg_gen_add_i32(tcg_res, tcg_res, tcg_op2);
+ tcg_gen_add_i32(tcg_res, tcg_res, tcg_op3);
+ tcg_gen_rotri_i32(tcg_res, tcg_res, 25);
+
+ write_vec_element_i32(s, tcg_zero, rd, 0, MO_32);
+ write_vec_element_i32(s, tcg_zero, rd, 1, MO_32);
+ write_vec_element_i32(s, tcg_zero, rd, 2, MO_32);
+ write_vec_element_i32(s, tcg_res, rd, 3, MO_32);
+
+ tcg_temp_free_i32(tcg_op1);
+ tcg_temp_free_i32(tcg_op2);
+ tcg_temp_free_i32(tcg_op3);
+ tcg_temp_free_i32(tcg_res);
+ tcg_temp_free_i32(tcg_zero);
}
}
@@ -11833,6 +11873,47 @@ static void disas_crypto_xar(DisasContext *s, uint32_t insn)
tcg_temp_free_i64(tcg_res[1]);
}
+/* Crypto three-reg imm2
+ * 31 21 20 16 15 14 13 12 11 10 9 5 4 0
+ * +-----------------------+------+-----+------+--------+------+------+
+ * | 1 1 0 0 1 1 1 0 0 1 0 | Rm | 1 0 | imm2 | opcode | Rn | Rd |
+ * +-----------------------+------+-----+------+--------+------+------+
+ */
+static void disas_crypto_three_reg_imm2(DisasContext *s, uint32_t insn)
+{
+ int opcode = extract32(insn, 10, 2);
+ int imm2 = extract32(insn, 12, 2);
+ int rm = extract32(insn, 16, 5);
+ int rn = extract32(insn, 5, 5);
+ int rd = extract32(insn, 0, 5);
+ TCGv_ptr tcg_rd_ptr, tcg_rn_ptr, tcg_rm_ptr;
+ TCGv_i32 tcg_imm2, tcg_opcode;
+
+ if (!arm_dc_feature(s, ARM_FEATURE_V8_SM3)) {
+ unallocated_encoding(s);
+ return;
+ }
+
+ if (!fp_access_check(s)) {
+ return;
+ }
+
+ tcg_rd_ptr = vec_full_reg_ptr(s, rd);
+ tcg_rn_ptr = vec_full_reg_ptr(s, rn);
+ tcg_rm_ptr = vec_full_reg_ptr(s, rm);
+ tcg_imm2 = tcg_const_i32(imm2);
+ tcg_opcode = tcg_const_i32(opcode);
+
+ gen_helper_crypto_sm3tt(tcg_rd_ptr, tcg_rn_ptr, tcg_rm_ptr, tcg_imm2,
+ tcg_opcode);
+
+ tcg_temp_free_ptr(tcg_rd_ptr);
+ tcg_temp_free_ptr(tcg_rn_ptr);
+ tcg_temp_free_ptr(tcg_rm_ptr);
+ tcg_temp_free_i32(tcg_imm2);
+ tcg_temp_free_i32(tcg_opcode);
+}
+
/* C3.6 Data processing - SIMD, inc Crypto
*
* As the decode gets a little complex we are using a table based
@@ -11866,6 +11947,7 @@ static const AArch64DecodeTable data_proc_simd[] = {
{ 0xcec08000, 0xfffff000, disas_crypto_two_reg_sha512 },
{ 0xce000000, 0xff808000, disas_crypto_four_reg },
{ 0xce800000, 0xffe00000, disas_crypto_xar },
+ { 0xce408000, 0xffe0c000, disas_crypto_three_reg_imm2 },
{ 0x00000000, 0x00000000, NULL }
};
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 11/30] target/arm: implement SM4 instructions
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (9 preceding siblings ...)
2018-02-09 11:02 ` [Qemu-devel] [PULL 10/30] target/arm: implement SM3 instructions Peter Maydell
@ 2018-02-09 11:02 ` Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 12/30] target/arm: enable user-mode SHA-3, SM3, SM4 and SHA-512 instruction support Peter Maydell
` (19 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:02 UTC (permalink / raw)
To: qemu-devel
From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
This implements emulation of the new SM4 instructions that have
been added as an optional extension to the ARMv8 Crypto Extensions
in ARM v8.2.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Message-id: 20180207111729.15737-5-ard.biesheuvel@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/cpu.h | 1 +
target/arm/helper.h | 3 ++
target/arm/crypto_helper.c | 91 ++++++++++++++++++++++++++++++++++++++++++++++
target/arm/translate-a64.c | 8 ++++
4 files changed, 103 insertions(+)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index f63b6e174a..57be0b000b 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1344,6 +1344,7 @@ enum arm_features {
ARM_FEATURE_V8_SHA512, /* implements SHA512 part of v8 Crypto Extensions */
ARM_FEATURE_V8_SHA3, /* implements SHA3 part of v8 Crypto Extensions */
ARM_FEATURE_V8_SM3, /* implements SM3 part of v8 Crypto Extensions */
+ ARM_FEATURE_V8_SM4, /* implements SM4 part of v8 Crypto Extensions */
};
static inline int arm_feature(CPUARMState *env, int feature)
diff --git a/target/arm/helper.h b/target/arm/helper.h
index 9d9f42cc89..6383d7d09e 100644
--- a/target/arm/helper.h
+++ b/target/arm/helper.h
@@ -543,6 +543,9 @@ DEF_HELPER_FLAGS_5(crypto_sm3tt, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32, i32)
DEF_HELPER_FLAGS_3(crypto_sm3partw1, TCG_CALL_NO_RWG, void, ptr, ptr, ptr)
DEF_HELPER_FLAGS_3(crypto_sm3partw2, TCG_CALL_NO_RWG, void, ptr, ptr, ptr)
+DEF_HELPER_FLAGS_2(crypto_sm4e, TCG_CALL_NO_RWG, void, ptr, ptr)
+DEF_HELPER_FLAGS_3(crypto_sm4ekey, TCG_CALL_NO_RWG, void, ptr, ptr, ptr)
+
DEF_HELPER_FLAGS_3(crc32, TCG_CALL_NO_RWG_SE, i32, i32, i32, i32)
DEF_HELPER_FLAGS_3(crc32c, TCG_CALL_NO_RWG_SE, i32, i32, i32, i32)
DEF_HELPER_2(dc_zva, void, env, i64)
diff --git a/target/arm/crypto_helper.c b/target/arm/crypto_helper.c
index 2f6744edb0..cc339ea7e0 100644
--- a/target/arm/crypto_helper.c
+++ b/target/arm/crypto_helper.c
@@ -603,3 +603,94 @@ void HELPER(crypto_sm3tt)(void *vd, void *vn, void *vm, uint32_t imm2,
rd[0] = d.l[0];
rd[1] = d.l[1];
}
+
+static uint8_t const sm4_sbox[] = {
+ 0xd6, 0x90, 0xe9, 0xfe, 0xcc, 0xe1, 0x3d, 0xb7,
+ 0x16, 0xb6, 0x14, 0xc2, 0x28, 0xfb, 0x2c, 0x05,
+ 0x2b, 0x67, 0x9a, 0x76, 0x2a, 0xbe, 0x04, 0xc3,
+ 0xaa, 0x44, 0x13, 0x26, 0x49, 0x86, 0x06, 0x99,
+ 0x9c, 0x42, 0x50, 0xf4, 0x91, 0xef, 0x98, 0x7a,
+ 0x33, 0x54, 0x0b, 0x43, 0xed, 0xcf, 0xac, 0x62,
+ 0xe4, 0xb3, 0x1c, 0xa9, 0xc9, 0x08, 0xe8, 0x95,
+ 0x80, 0xdf, 0x94, 0xfa, 0x75, 0x8f, 0x3f, 0xa6,
+ 0x47, 0x07, 0xa7, 0xfc, 0xf3, 0x73, 0x17, 0xba,
+ 0x83, 0x59, 0x3c, 0x19, 0xe6, 0x85, 0x4f, 0xa8,
+ 0x68, 0x6b, 0x81, 0xb2, 0x71, 0x64, 0xda, 0x8b,
+ 0xf8, 0xeb, 0x0f, 0x4b, 0x70, 0x56, 0x9d, 0x35,
+ 0x1e, 0x24, 0x0e, 0x5e, 0x63, 0x58, 0xd1, 0xa2,
+ 0x25, 0x22, 0x7c, 0x3b, 0x01, 0x21, 0x78, 0x87,
+ 0xd4, 0x00, 0x46, 0x57, 0x9f, 0xd3, 0x27, 0x52,
+ 0x4c, 0x36, 0x02, 0xe7, 0xa0, 0xc4, 0xc8, 0x9e,
+ 0xea, 0xbf, 0x8a, 0xd2, 0x40, 0xc7, 0x38, 0xb5,
+ 0xa3, 0xf7, 0xf2, 0xce, 0xf9, 0x61, 0x15, 0xa1,
+ 0xe0, 0xae, 0x5d, 0xa4, 0x9b, 0x34, 0x1a, 0x55,
+ 0xad, 0x93, 0x32, 0x30, 0xf5, 0x8c, 0xb1, 0xe3,
+ 0x1d, 0xf6, 0xe2, 0x2e, 0x82, 0x66, 0xca, 0x60,
+ 0xc0, 0x29, 0x23, 0xab, 0x0d, 0x53, 0x4e, 0x6f,
+ 0xd5, 0xdb, 0x37, 0x45, 0xde, 0xfd, 0x8e, 0x2f,
+ 0x03, 0xff, 0x6a, 0x72, 0x6d, 0x6c, 0x5b, 0x51,
+ 0x8d, 0x1b, 0xaf, 0x92, 0xbb, 0xdd, 0xbc, 0x7f,
+ 0x11, 0xd9, 0x5c, 0x41, 0x1f, 0x10, 0x5a, 0xd8,
+ 0x0a, 0xc1, 0x31, 0x88, 0xa5, 0xcd, 0x7b, 0xbd,
+ 0x2d, 0x74, 0xd0, 0x12, 0xb8, 0xe5, 0xb4, 0xb0,
+ 0x89, 0x69, 0x97, 0x4a, 0x0c, 0x96, 0x77, 0x7e,
+ 0x65, 0xb9, 0xf1, 0x09, 0xc5, 0x6e, 0xc6, 0x84,
+ 0x18, 0xf0, 0x7d, 0xec, 0x3a, 0xdc, 0x4d, 0x20,
+ 0x79, 0xee, 0x5f, 0x3e, 0xd7, 0xcb, 0x39, 0x48,
+};
+
+void HELPER(crypto_sm4e)(void *vd, void *vn)
+{
+ uint64_t *rd = vd;
+ uint64_t *rn = vn;
+ union CRYPTO_STATE d = { .l = { rd[0], rd[1] } };
+ union CRYPTO_STATE n = { .l = { rn[0], rn[1] } };
+ uint32_t t, i;
+
+ for (i = 0; i < 4; i++) {
+ t = CR_ST_WORD(d, (i + 1) % 4) ^
+ CR_ST_WORD(d, (i + 2) % 4) ^
+ CR_ST_WORD(d, (i + 3) % 4) ^
+ CR_ST_WORD(n, i);
+
+ t = sm4_sbox[t & 0xff] |
+ sm4_sbox[(t >> 8) & 0xff] << 8 |
+ sm4_sbox[(t >> 16) & 0xff] << 16 |
+ sm4_sbox[(t >> 24) & 0xff] << 24;
+
+ CR_ST_WORD(d, i) ^= t ^ rol32(t, 2) ^ rol32(t, 10) ^ rol32(t, 18) ^
+ rol32(t, 24);
+ }
+
+ rd[0] = d.l[0];
+ rd[1] = d.l[1];
+}
+
+void HELPER(crypto_sm4ekey)(void *vd, void *vn, void* vm)
+{
+ uint64_t *rd = vd;
+ uint64_t *rn = vn;
+ uint64_t *rm = vm;
+ union CRYPTO_STATE d;
+ union CRYPTO_STATE n = { .l = { rn[0], rn[1] } };
+ union CRYPTO_STATE m = { .l = { rm[0], rm[1] } };
+ uint32_t t, i;
+
+ d = n;
+ for (i = 0; i < 4; i++) {
+ t = CR_ST_WORD(d, (i + 1) % 4) ^
+ CR_ST_WORD(d, (i + 2) % 4) ^
+ CR_ST_WORD(d, (i + 3) % 4) ^
+ CR_ST_WORD(m, i);
+
+ t = sm4_sbox[t & 0xff] |
+ sm4_sbox[(t >> 8) & 0xff] << 8 |
+ sm4_sbox[(t >> 16) & 0xff] << 16 |
+ sm4_sbox[(t >> 24) & 0xff] << 24;
+
+ CR_ST_WORD(d, i) ^= t ^ rol32(t, 13) ^ rol32(t, 23);
+ }
+
+ rd[0] = d.l[0];
+ rd[1] = d.l[1];
+}
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 2f8b4e6150..62ece804e2 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -11632,6 +11632,10 @@ static void disas_crypto_three_reg_sha512(DisasContext *s, uint32_t insn)
feature = ARM_FEATURE_V8_SM3;
genfn = gen_helper_crypto_sm3partw2;
break;
+ case 2: /* SM4EKEY */
+ feature = ARM_FEATURE_V8_SM4;
+ genfn = gen_helper_crypto_sm4ekey;
+ break;
default:
unallocated_encoding(s);
return;
@@ -11705,6 +11709,10 @@ static void disas_crypto_two_reg_sha512(DisasContext *s, uint32_t insn)
feature = ARM_FEATURE_V8_SHA512;
genfn = gen_helper_crypto_sha512su0;
break;
+ case 1: /* SM4E */
+ feature = ARM_FEATURE_V8_SM4;
+ genfn = gen_helper_crypto_sm4e;
+ break;
default:
unallocated_encoding(s);
return;
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 12/30] target/arm: enable user-mode SHA-3, SM3, SM4 and SHA-512 instruction support
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (10 preceding siblings ...)
2018-02-09 11:02 ` [Qemu-devel] [PULL 11/30] target/arm: implement SM4 instructions Peter Maydell
@ 2018-02-09 11:02 ` Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 13/30] sdhci: Add i.MX specific subtype of SDHCI Peter Maydell
` (18 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:02 UTC (permalink / raw)
To: qemu-devel
From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Add support for the new ARMv8.2 SHA-3, SM3, SM4 and SHA-512 instructions to
AArch64 user mode emulation.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Message-id: 20180207111729.15737-6-ard.biesheuvel@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
linux-user/elfload.c | 19 +++++++++++++++++++
target/arm/cpu64.c | 4 ++++
2 files changed, 23 insertions(+)
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index 32a47674e6..8bb9a2c3e8 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -512,6 +512,21 @@ enum {
ARM_HWCAP_A64_SHA1 = 1 << 5,
ARM_HWCAP_A64_SHA2 = 1 << 6,
ARM_HWCAP_A64_CRC32 = 1 << 7,
+ ARM_HWCAP_A64_ATOMICS = 1 << 8,
+ ARM_HWCAP_A64_FPHP = 1 << 9,
+ ARM_HWCAP_A64_ASIMDHP = 1 << 10,
+ ARM_HWCAP_A64_CPUID = 1 << 11,
+ ARM_HWCAP_A64_ASIMDRDM = 1 << 12,
+ ARM_HWCAP_A64_JSCVT = 1 << 13,
+ ARM_HWCAP_A64_FCMA = 1 << 14,
+ ARM_HWCAP_A64_LRCPC = 1 << 15,
+ ARM_HWCAP_A64_DCPOP = 1 << 16,
+ ARM_HWCAP_A64_SHA3 = 1 << 17,
+ ARM_HWCAP_A64_SM3 = 1 << 18,
+ ARM_HWCAP_A64_SM4 = 1 << 19,
+ ARM_HWCAP_A64_ASIMDDP = 1 << 20,
+ ARM_HWCAP_A64_SHA512 = 1 << 21,
+ ARM_HWCAP_A64_SVE = 1 << 22,
};
#define ELF_HWCAP get_elf_hwcap()
@@ -532,6 +547,10 @@ static uint32_t get_elf_hwcap(void)
GET_FEATURE(ARM_FEATURE_V8_SHA1, ARM_HWCAP_A64_SHA1);
GET_FEATURE(ARM_FEATURE_V8_SHA256, ARM_HWCAP_A64_SHA2);
GET_FEATURE(ARM_FEATURE_CRC, ARM_HWCAP_A64_CRC32);
+ GET_FEATURE(ARM_FEATURE_V8_SHA3, ARM_HWCAP_A64_SHA3);
+ GET_FEATURE(ARM_FEATURE_V8_SM3, ARM_HWCAP_A64_SM3);
+ GET_FEATURE(ARM_FEATURE_V8_SM4, ARM_HWCAP_A64_SM4);
+ GET_FEATURE(ARM_FEATURE_V8_SHA512, ARM_HWCAP_A64_SHA512);
#undef GET_FEATURE
return hwcaps;
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 670c07ab6e..1c330adc28 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -224,6 +224,10 @@ static void aarch64_any_initfn(Object *obj)
set_feature(&cpu->env, ARM_FEATURE_V8_AES);
set_feature(&cpu->env, ARM_FEATURE_V8_SHA1);
set_feature(&cpu->env, ARM_FEATURE_V8_SHA256);
+ set_feature(&cpu->env, ARM_FEATURE_V8_SHA512);
+ set_feature(&cpu->env, ARM_FEATURE_V8_SHA3);
+ set_feature(&cpu->env, ARM_FEATURE_V8_SM3);
+ set_feature(&cpu->env, ARM_FEATURE_V8_SM4);
set_feature(&cpu->env, ARM_FEATURE_V8_PMULL);
set_feature(&cpu->env, ARM_FEATURE_CRC);
cpu->ctr = 0x80038003; /* 32 byte I and D cacheline size, VIPT icache */
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 13/30] sdhci: Add i.MX specific subtype of SDHCI
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (11 preceding siblings ...)
2018-02-09 11:02 ` [Qemu-devel] [PULL 12/30] target/arm: enable user-mode SHA-3, SM3, SM4 and SHA-512 instruction support Peter Maydell
@ 2018-02-09 11:02 ` Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 14/30] hw: i.MX: Convert i.MX6 to use TYPE_IMX_USDHC Peter Maydell
` (17 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:02 UTC (permalink / raw)
To: qemu-devel
From: Andrey Smirnov <andrew.smirnov@gmail.com>
IP block found on several generations of i.MX family does not use
vanilla SDHCI implementation and it comes with a number of quirks.
Introduce i.MX SDHCI subtype of SDHCI block to add code necessary to
support unmodified Linux guest driver.
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Jason Wang <jasowang@redhat.com>
Cc: Philippe Mathieu-Daudé <f4bug@amsat.org>
Cc: Marcel Apfelbaum <marcel.apfelbaum@zoho.com>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Cc: yurovsky@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
[PMM: define and use ESDHC_UNDOCUMENTED_REG27]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/sd/sdhci-internal.h | 23 +++++
include/hw/sd/sdhci.h | 13 +++
hw/sd/sdhci.c | 230 ++++++++++++++++++++++++++++++++++++++++++++++++-
3 files changed, 265 insertions(+), 1 deletion(-)
diff --git a/hw/sd/sdhci-internal.h b/hw/sd/sdhci-internal.h
index fc807f08f3..0991acd724 100644
--- a/hw/sd/sdhci-internal.h
+++ b/hw/sd/sdhci-internal.h
@@ -84,12 +84,18 @@
/* R/W Host control Register 0x0 */
#define SDHC_HOSTCTL 0x28
+#define SDHC_CTRL_LED 0x01
#define SDHC_CTRL_DMA_CHECK_MASK 0x18
#define SDHC_CTRL_SDMA 0x00
#define SDHC_CTRL_ADMA1_32 0x08
#define SDHC_CTRL_ADMA2_32 0x10
#define SDHC_CTRL_ADMA2_64 0x18
#define SDHC_DMA_TYPE(x) ((x) & SDHC_CTRL_DMA_CHECK_MASK)
+#define SDHC_CTRL_4BITBUS 0x02
+#define SDHC_CTRL_8BITBUS 0x20
+#define SDHC_CTRL_CDTEST_INS 0x40
+#define SDHC_CTRL_CDTEST_EN 0x80
+
/* R/W Power Control Register 0x0 */
#define SDHC_PWRCON 0x29
@@ -226,4 +232,21 @@ enum {
sdhc_gap_write = 2 /* SDHC stopped at block gap during write operation */
};
+extern const VMStateDescription sdhci_vmstate;
+
+
+#define ESDHC_MIX_CTRL 0x48
+#define ESDHC_VENDOR_SPEC 0xc0
+#define ESDHC_DLL_CTRL 0x60
+
+#define ESDHC_TUNING_CTRL 0xcc
+#define ESDHC_TUNE_CTRL_STATUS 0x68
+#define ESDHC_WTMK_LVL 0x44
+
+/* Undocumented register used by guests working around erratum ERR004536 */
+#define ESDHC_UNDOCUMENTED_REG27 0x6c
+
+#define ESDHC_CTRL_4BITBUS (0x1 << 1)
+#define ESDHC_CTRL_8BITBUS (0x2 << 1)
+
#endif
diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h
index 1cf70f8c23..f8d1ba3538 100644
--- a/include/hw/sd/sdhci.h
+++ b/include/hw/sd/sdhci.h
@@ -44,6 +44,7 @@ typedef struct SDHCIState {
AddressSpace sysbus_dma_as;
AddressSpace *dma_as;
MemoryRegion *dma_mr;
+ const MemoryRegionOps *io_ops;
QEMUTimer *insert_timer; /* timer for 'changing' sd card. */
QEMUTimer *transfer_timer;
@@ -91,8 +92,18 @@ typedef struct SDHCIState {
/* Configurable properties */
bool pending_insert_quirk; /* Quirk for Raspberry Pi card insert int */
+ uint32_t quirks;
} SDHCIState;
+/*
+ * Controller does not provide transfer-complete interrupt when not
+ * busy.
+ *
+ * NOTE: This definition is taken out of Linux kernel and so the
+ * original bit number is preserved
+ */
+#define SDHCI_QUIRK_NO_BUSY_IRQ BIT(14)
+
#define TYPE_PCI_SDHCI "sdhci-pci"
#define PCI_SDHCI(obj) OBJECT_CHECK(SDHCIState, (obj), TYPE_PCI_SDHCI)
@@ -100,4 +111,6 @@ typedef struct SDHCIState {
#define SYSBUS_SDHCI(obj) \
OBJECT_CHECK(SDHCIState, (obj), TYPE_SYSBUS_SDHCI)
+#define TYPE_IMX_USDHC "imx-usdhc"
+
#endif /* SDHCI_H */
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index fac7fa5c72..b395ac577d 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -244,7 +244,8 @@ static void sdhci_send_command(SDHCIState *s)
}
}
- if ((s->norintstsen & SDHC_NISEN_TRSCMP) &&
+ if (!(s->quirks & SDHCI_QUIRK_NO_BUSY_IRQ) &&
+ (s->norintstsen & SDHC_NISEN_TRSCMP) &&
(s->cmdreg & SDHC_CMD_RESPONSE) == SDHC_CMD_RSP_WITH_BUSY) {
s->norintsts |= SDHC_NIS_TRSCMP;
}
@@ -1189,6 +1190,8 @@ static void sdhci_initfn(SDHCIState *s)
s->insert_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, sdhci_raise_insertion_irq, s);
s->transfer_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, sdhci_data_transfer, s);
+
+ s->io_ops = &sdhci_mmio_ops;
}
static void sdhci_uninitfn(SDHCIState *s)
@@ -1396,6 +1399,10 @@ static void sdhci_sysbus_realize(DeviceState *dev, Error ** errp)
}
sysbus_init_irq(sbd, &s->irq);
+
+ memory_region_init_io(&s->iomem, OBJECT(s), s->io_ops, s, "sdhci",
+ SDHC_REGISTERS_MAP_SIZE);
+
sysbus_init_mmio(sbd, &s->iomem);
}
@@ -1447,11 +1454,232 @@ static const TypeInfo sdhci_bus_info = {
.class_init = sdhci_bus_class_init,
};
+static uint64_t usdhc_read(void *opaque, hwaddr offset, unsigned size)
+{
+ SDHCIState *s = SYSBUS_SDHCI(opaque);
+ uint32_t ret;
+ uint16_t hostctl;
+
+ switch (offset) {
+ default:
+ return sdhci_read(opaque, offset, size);
+
+ case SDHC_HOSTCTL:
+ /*
+ * For a detailed explanation on the following bit
+ * manipulation code see comments in a similar part of
+ * usdhc_write()
+ */
+ hostctl = SDHC_DMA_TYPE(s->hostctl) << (8 - 3);
+
+ if (s->hostctl & SDHC_CTRL_8BITBUS) {
+ hostctl |= ESDHC_CTRL_8BITBUS;
+ }
+
+ if (s->hostctl & SDHC_CTRL_4BITBUS) {
+ hostctl |= ESDHC_CTRL_4BITBUS;
+ }
+
+ ret = hostctl;
+ ret |= (uint32_t)s->blkgap << 16;
+ ret |= (uint32_t)s->wakcon << 24;
+
+ break;
+
+ case ESDHC_DLL_CTRL:
+ case ESDHC_TUNE_CTRL_STATUS:
+ case ESDHC_UNDOCUMENTED_REG27:
+ case ESDHC_TUNING_CTRL:
+ case ESDHC_VENDOR_SPEC:
+ case ESDHC_MIX_CTRL:
+ case ESDHC_WTMK_LVL:
+ ret = 0;
+ break;
+ }
+
+ return ret;
+}
+
+static void
+usdhc_write(void *opaque, hwaddr offset, uint64_t val, unsigned size)
+{
+ SDHCIState *s = SYSBUS_SDHCI(opaque);
+ uint8_t hostctl;
+ uint32_t value = (uint32_t)val;
+
+ switch (offset) {
+ case ESDHC_DLL_CTRL:
+ case ESDHC_TUNE_CTRL_STATUS:
+ case ESDHC_UNDOCUMENTED_REG27:
+ case ESDHC_TUNING_CTRL:
+ case ESDHC_WTMK_LVL:
+ case ESDHC_VENDOR_SPEC:
+ break;
+
+ case SDHC_HOSTCTL:
+ /*
+ * Here's What ESDHCI has at offset 0x28 (SDHC_HOSTCTL)
+ *
+ * 7 6 5 4 3 2 1 0
+ * |-----------+--------+--------+-----------+----------+---------|
+ * | Card | Card | Endian | DATA3 | Data | Led |
+ * | Detect | Detect | Mode | as Card | Transfer | Control |
+ * | Signal | Test | | Detection | Width | |
+ * | Selection | Level | | Pin | | |
+ * |-----------+--------+--------+-----------+----------+---------|
+ *
+ * and 0x29
+ *
+ * 15 10 9 8
+ * |----------+------|
+ * | Reserved | DMA |
+ * | | Sel. |
+ * | | |
+ * |----------+------|
+ *
+ * and here's what SDCHI spec expects those offsets to be:
+ *
+ * 0x28 (Host Control Register)
+ *
+ * 7 6 5 4 3 2 1 0
+ * |--------+--------+----------+------+--------+----------+---------|
+ * | Card | Card | Extended | DMA | High | Data | LED |
+ * | Detect | Detect | Data | Sel. | Speed | Transfer | Control |
+ * | Signal | Test | Transfer | | Enable | Width | |
+ * | Sel. | Level | Width | | | | |
+ * |--------+--------+----------+------+--------+----------+---------|
+ *
+ * and 0x29 (Power Control Register)
+ *
+ * |----------------------------------|
+ * | Power Control Register |
+ * | |
+ * | Description omitted, |
+ * | since it has no analog in ESDHCI |
+ * | |
+ * |----------------------------------|
+ *
+ * Since offsets 0x2A and 0x2B should be compatible between
+ * both IP specs we only need to reconcile least 16-bit of the
+ * word we've been given.
+ */
+
+ /*
+ * First, save bits 7 6 and 0 since they are identical
+ */
+ hostctl = value & (SDHC_CTRL_LED |
+ SDHC_CTRL_CDTEST_INS |
+ SDHC_CTRL_CDTEST_EN);
+ /*
+ * Second, split "Data Transfer Width" from bits 2 and 1 in to
+ * bits 5 and 1
+ */
+ if (value & ESDHC_CTRL_8BITBUS) {
+ hostctl |= SDHC_CTRL_8BITBUS;
+ }
+
+ if (value & ESDHC_CTRL_4BITBUS) {
+ hostctl |= ESDHC_CTRL_4BITBUS;
+ }
+
+ /*
+ * Third, move DMA select from bits 9 and 8 to bits 4 and 3
+ */
+ hostctl |= SDHC_DMA_TYPE(value >> (8 - 3));
+
+ /*
+ * Now place the corrected value into low 16-bit of the value
+ * we are going to give standard SDHCI write function
+ *
+ * NOTE: This transformation should be the inverse of what can
+ * be found in drivers/mmc/host/sdhci-esdhc-imx.c in Linux
+ * kernel
+ */
+ value &= ~UINT16_MAX;
+ value |= hostctl;
+ value |= (uint16_t)s->pwrcon << 8;
+
+ sdhci_write(opaque, offset, value, size);
+ break;
+
+ case ESDHC_MIX_CTRL:
+ /*
+ * So, when SD/MMC stack in Linux tries to write to "Transfer
+ * Mode Register", ESDHC i.MX quirk code will translate it
+ * into a write to ESDHC_MIX_CTRL, so we do the opposite in
+ * order to get where we started
+ *
+ * Note that Auto CMD23 Enable bit is located in a wrong place
+ * on i.MX, but since it is not used by QEMU we do not care.
+ *
+ * We don't want to call sdhci_write(.., SDHC_TRNMOD, ...)
+ * here becuase it will result in a call to
+ * sdhci_send_command(s) which we don't want.
+ *
+ */
+ s->trnmod = value & UINT16_MAX;
+ break;
+ case SDHC_TRNMOD:
+ /*
+ * Similar to above, but this time a write to "Command
+ * Register" will be translated into a 4-byte write to
+ * "Transfer Mode register" where lower 16-bit of value would
+ * be set to zero. So what we do is fill those bits with
+ * cached value from s->trnmod and let the SDHCI
+ * infrastructure handle the rest
+ */
+ sdhci_write(opaque, offset, val | s->trnmod, size);
+ break;
+ case SDHC_BLKSIZE:
+ /*
+ * ESDHCI does not implement "Host SDMA Buffer Boundary", and
+ * Linux driver will try to zero this field out which will
+ * break the rest of SDHCI emulation.
+ *
+ * Linux defaults to maximum possible setting (512K boundary)
+ * and it seems to be the only option that i.MX IP implements,
+ * so we artificially set it to that value.
+ */
+ val |= 0x7 << 12;
+ /* FALLTHROUGH */
+ default:
+ sdhci_write(opaque, offset, val, size);
+ break;
+ }
+}
+
+
+static const MemoryRegionOps usdhc_mmio_ops = {
+ .read = usdhc_read,
+ .write = usdhc_write,
+ .valid = {
+ .min_access_size = 1,
+ .max_access_size = 4,
+ .unaligned = false
+ },
+ .endianness = DEVICE_LITTLE_ENDIAN,
+};
+
+static void imx_usdhc_init(Object *obj)
+{
+ SDHCIState *s = SYSBUS_SDHCI(obj);
+
+ s->io_ops = &usdhc_mmio_ops;
+ s->quirks = SDHCI_QUIRK_NO_BUSY_IRQ;
+}
+
+static const TypeInfo imx_usdhc_info = {
+ .name = TYPE_IMX_USDHC,
+ .parent = TYPE_SYSBUS_SDHCI,
+ .instance_init = imx_usdhc_init,
+};
+
static void sdhci_register_types(void)
{
type_register_static(&sdhci_pci_info);
type_register_static(&sdhci_sysbus_info);
type_register_static(&sdhci_bus_info);
+ type_register_static(&imx_usdhc_info);
}
type_init(sdhci_register_types)
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 14/30] hw: i.MX: Convert i.MX6 to use TYPE_IMX_USDHC
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (12 preceding siblings ...)
2018-02-09 11:02 ` [Qemu-devel] [PULL 13/30] sdhci: Add i.MX specific subtype of SDHCI Peter Maydell
@ 2018-02-09 11:02 ` Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 15/30] i.MX: Add code to emulate i.MX7 CCM, PMU and ANALOG IP blocks Peter Maydell
` (16 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:02 UTC (permalink / raw)
To: qemu-devel
From: Andrey Smirnov <andrew.smirnov@gmail.com>
Convert i.MX6 to use TYPE_IMX_USDHC since that's what real HW comes
with.
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Jason Wang <jasowang@redhat.com>
Cc: Philippe Mathieu-Daudé <f4bug@amsat.org>
Cc: Marcel Apfelbaum <marcel.apfelbaum@zoho.com>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Cc: yurovsky@gmail.com
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/fsl-imx6.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index b0d4088290..e6559a8b12 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -93,7 +93,7 @@ static void fsl_imx6_init(Object *obj)
}
for (i = 0; i < FSL_IMX6_NUM_ESDHCS; i++) {
- object_initialize(&s->esdhc[i], sizeof(s->esdhc[i]), TYPE_SYSBUS_SDHCI);
+ object_initialize(&s->esdhc[i], sizeof(s->esdhc[i]), TYPE_IMX_USDHC);
qdev_set_parent_bus(DEVICE(&s->esdhc[i]), sysbus_get_default());
snprintf(name, NAME_SIZE, "sdhc%d", i + 1);
object_property_add_child(obj, name, OBJECT(&s->esdhc[i]), NULL);
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 15/30] i.MX: Add code to emulate i.MX7 CCM, PMU and ANALOG IP blocks
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (13 preceding siblings ...)
2018-02-09 11:02 ` [Qemu-devel] [PULL 14/30] hw: i.MX: Convert i.MX6 to use TYPE_IMX_USDHC Peter Maydell
@ 2018-02-09 11:02 ` Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 16/30] i.MX: Add code to emulate i.MX2 watchdog IP block Peter Maydell
` (15 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:02 UTC (permalink / raw)
To: qemu-devel
From: Andrey Smirnov <andrew.smirnov@gmail.com>
Add minimal code needed to allow upstream Linux guest to boot.
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Jason Wang <jasowang@redhat.com>
Cc: Philippe Mathieu-Daudé <f4bug@amsat.org>
Cc: Marcel Apfelbaum <marcel.apfelbaum@zoho.com>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Cc: yurovsky@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/misc/Makefile.objs | 1 +
include/hw/misc/imx7_ccm.h | 139 +++++++++++++++++++++++
hw/misc/imx7_ccm.c | 277 +++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 417 insertions(+)
create mode 100644 include/hw/misc/imx7_ccm.h
create mode 100644 hw/misc/imx7_ccm.c
diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
index d517f83e81..a28e5e49b0 100644
--- a/hw/misc/Makefile.objs
+++ b/hw/misc/Makefile.objs
@@ -33,6 +33,7 @@ obj-$(CONFIG_IMX) += imx31_ccm.o
obj-$(CONFIG_IMX) += imx25_ccm.o
obj-$(CONFIG_IMX) += imx6_ccm.o
obj-$(CONFIG_IMX) += imx6_src.o
+obj-$(CONFIG_IMX) += imx7_ccm.o
obj-$(CONFIG_MILKYMIST) += milkymist-hpdmc.o
obj-$(CONFIG_MILKYMIST) += milkymist-pfpu.o
obj-$(CONFIG_MAINSTONE) += mst_fpga.o
diff --git a/include/hw/misc/imx7_ccm.h b/include/hw/misc/imx7_ccm.h
new file mode 100644
index 0000000000..9538f37d98
--- /dev/null
+++ b/include/hw/misc/imx7_ccm.h
@@ -0,0 +1,139 @@
+/*
+ * Copyright (c) 2017, Impinj, Inc.
+ *
+ * i.MX7 CCM, PMU and ANALOG IP blocks emulation code
+ *
+ * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+#ifndef IMX7_CCM_H
+#define IMX7_CCM_H
+
+#include "hw/misc/imx_ccm.h"
+#include "qemu/bitops.h"
+
+enum IMX7AnalogRegisters {
+ ANALOG_PLL_ARM,
+ ANALOG_PLL_ARM_SET,
+ ANALOG_PLL_ARM_CLR,
+ ANALOG_PLL_ARM_TOG,
+ ANALOG_PLL_DDR,
+ ANALOG_PLL_DDR_SET,
+ ANALOG_PLL_DDR_CLR,
+ ANALOG_PLL_DDR_TOG,
+ ANALOG_PLL_DDR_SS,
+ ANALOG_PLL_DDR_SS_SET,
+ ANALOG_PLL_DDR_SS_CLR,
+ ANALOG_PLL_DDR_SS_TOG,
+ ANALOG_PLL_DDR_NUM,
+ ANALOG_PLL_DDR_NUM_SET,
+ ANALOG_PLL_DDR_NUM_CLR,
+ ANALOG_PLL_DDR_NUM_TOG,
+ ANALOG_PLL_DDR_DENOM,
+ ANALOG_PLL_DDR_DENOM_SET,
+ ANALOG_PLL_DDR_DENOM_CLR,
+ ANALOG_PLL_DDR_DENOM_TOG,
+ ANALOG_PLL_480,
+ ANALOG_PLL_480_SET,
+ ANALOG_PLL_480_CLR,
+ ANALOG_PLL_480_TOG,
+ ANALOG_PLL_480A,
+ ANALOG_PLL_480A_SET,
+ ANALOG_PLL_480A_CLR,
+ ANALOG_PLL_480A_TOG,
+ ANALOG_PLL_480B,
+ ANALOG_PLL_480B_SET,
+ ANALOG_PLL_480B_CLR,
+ ANALOG_PLL_480B_TOG,
+ ANALOG_PLL_ENET,
+ ANALOG_PLL_ENET_SET,
+ ANALOG_PLL_ENET_CLR,
+ ANALOG_PLL_ENET_TOG,
+ ANALOG_PLL_AUDIO,
+ ANALOG_PLL_AUDIO_SET,
+ ANALOG_PLL_AUDIO_CLR,
+ ANALOG_PLL_AUDIO_TOG,
+ ANALOG_PLL_AUDIO_SS,
+ ANALOG_PLL_AUDIO_SS_SET,
+ ANALOG_PLL_AUDIO_SS_CLR,
+ ANALOG_PLL_AUDIO_SS_TOG,
+ ANALOG_PLL_AUDIO_NUM,
+ ANALOG_PLL_AUDIO_NUM_SET,
+ ANALOG_PLL_AUDIO_NUM_CLR,
+ ANALOG_PLL_AUDIO_NUM_TOG,
+ ANALOG_PLL_AUDIO_DENOM,
+ ANALOG_PLL_AUDIO_DENOM_SET,
+ ANALOG_PLL_AUDIO_DENOM_CLR,
+ ANALOG_PLL_AUDIO_DENOM_TOG,
+ ANALOG_PLL_VIDEO,
+ ANALOG_PLL_VIDEO_SET,
+ ANALOG_PLL_VIDEO_CLR,
+ ANALOG_PLL_VIDEO_TOG,
+ ANALOG_PLL_VIDEO_SS,
+ ANALOG_PLL_VIDEO_SS_SET,
+ ANALOG_PLL_VIDEO_SS_CLR,
+ ANALOG_PLL_VIDEO_SS_TOG,
+ ANALOG_PLL_VIDEO_NUM,
+ ANALOG_PLL_VIDEO_NUM_SET,
+ ANALOG_PLL_VIDEO_NUM_CLR,
+ ANALOG_PLL_VIDEO_NUM_TOG,
+ ANALOG_PLL_VIDEO_DENOM,
+ ANALOG_PLL_VIDEO_DENOM_SET,
+ ANALOG_PLL_VIDEO_DENOM_CLR,
+ ANALOG_PLL_VIDEO_DENOM_TOG,
+ ANALOG_PLL_MISC0,
+ ANALOG_PLL_MISC0_SET,
+ ANALOG_PLL_MISC0_CLR,
+ ANALOG_PLL_MISC0_TOG,
+
+ ANALOG_DIGPROG = 0x800 / sizeof(uint32_t),
+ ANALOG_MAX,
+
+ ANALOG_PLL_LOCK = BIT(31)
+};
+
+enum IMX7CCMRegisters {
+ CCM_MAX = 0xBE00 / sizeof(uint32_t) + 1,
+};
+
+enum IMX7PMURegisters {
+ PMU_MAX = 0x140 / sizeof(uint32_t),
+};
+
+#define TYPE_IMX7_CCM "imx7.ccm"
+#define IMX7_CCM(obj) OBJECT_CHECK(IMX7CCMState, (obj), TYPE_IMX7_CCM)
+
+typedef struct IMX7CCMState {
+ /* <private> */
+ IMXCCMState parent_obj;
+
+ /* <public> */
+ MemoryRegion iomem;
+
+ uint32_t ccm[CCM_MAX];
+} IMX7CCMState;
+
+
+#define TYPE_IMX7_ANALOG "imx7.analog"
+#define IMX7_ANALOG(obj) OBJECT_CHECK(IMX7AnalogState, (obj), TYPE_IMX7_ANALOG)
+
+typedef struct IMX7AnalogState {
+ /* <private> */
+ IMXCCMState parent_obj;
+
+ /* <public> */
+ struct {
+ MemoryRegion container;
+ MemoryRegion analog;
+ MemoryRegion digprog;
+ MemoryRegion pmu;
+ } mmio;
+
+ uint32_t analog[ANALOG_MAX];
+ uint32_t pmu[PMU_MAX];
+} IMX7AnalogState;
+
+#endif /* IMX7_CCM_H */
diff --git a/hw/misc/imx7_ccm.c b/hw/misc/imx7_ccm.c
new file mode 100644
index 0000000000..d90c48bfec
--- /dev/null
+++ b/hw/misc/imx7_ccm.c
@@ -0,0 +1,277 @@
+/*
+ * Copyright (c) 2018, Impinj, Inc.
+ *
+ * i.MX7 CCM, PMU and ANALOG IP blocks emulation code
+ *
+ * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/log.h"
+
+#include "hw/misc/imx7_ccm.h"
+
+static void imx7_analog_reset(DeviceState *dev)
+{
+ IMX7AnalogState *s = IMX7_ANALOG(dev);
+
+ memset(s->pmu, 0, sizeof(s->pmu));
+ memset(s->analog, 0, sizeof(s->analog));
+
+ s->analog[ANALOG_PLL_ARM] = 0x00002042;
+ s->analog[ANALOG_PLL_DDR] = 0x0060302c;
+ s->analog[ANALOG_PLL_DDR_SS] = 0x00000000;
+ s->analog[ANALOG_PLL_DDR_NUM] = 0x06aaac4d;
+ s->analog[ANALOG_PLL_DDR_DENOM] = 0x100003ec;
+ s->analog[ANALOG_PLL_480] = 0x00002000;
+ s->analog[ANALOG_PLL_480A] = 0x52605a56;
+ s->analog[ANALOG_PLL_480B] = 0x52525216;
+ s->analog[ANALOG_PLL_ENET] = 0x00001fc0;
+ s->analog[ANALOG_PLL_AUDIO] = 0x0001301b;
+ s->analog[ANALOG_PLL_AUDIO_SS] = 0x00000000;
+ s->analog[ANALOG_PLL_AUDIO_NUM] = 0x05f5e100;
+ s->analog[ANALOG_PLL_AUDIO_DENOM] = 0x2964619c;
+ s->analog[ANALOG_PLL_VIDEO] = 0x0008201b;
+ s->analog[ANALOG_PLL_VIDEO_SS] = 0x00000000;
+ s->analog[ANALOG_PLL_VIDEO_NUM] = 0x0000f699;
+ s->analog[ANALOG_PLL_VIDEO_DENOM] = 0x000f4240;
+ s->analog[ANALOG_PLL_MISC0] = 0x00000000;
+
+ /* all PLLs need to be locked */
+ s->analog[ANALOG_PLL_ARM] |= ANALOG_PLL_LOCK;
+ s->analog[ANALOG_PLL_DDR] |= ANALOG_PLL_LOCK;
+ s->analog[ANALOG_PLL_480] |= ANALOG_PLL_LOCK;
+ s->analog[ANALOG_PLL_480A] |= ANALOG_PLL_LOCK;
+ s->analog[ANALOG_PLL_480B] |= ANALOG_PLL_LOCK;
+ s->analog[ANALOG_PLL_ENET] |= ANALOG_PLL_LOCK;
+ s->analog[ANALOG_PLL_AUDIO] |= ANALOG_PLL_LOCK;
+ s->analog[ANALOG_PLL_VIDEO] |= ANALOG_PLL_LOCK;
+ s->analog[ANALOG_PLL_MISC0] |= ANALOG_PLL_LOCK;
+
+ /*
+ * Since I couldn't find any info about this in the reference
+ * manual the value of this register is based strictly on matching
+ * what Linux kernel expects it to be.
+ */
+ s->analog[ANALOG_DIGPROG] = 0x720000;
+ /*
+ * Set revision to be 1.0 (Arbitrary choice, no particular
+ * reason).
+ */
+ s->analog[ANALOG_DIGPROG] |= 0x000010;
+}
+
+static void imx7_ccm_reset(DeviceState *dev)
+{
+ IMX7CCMState *s = IMX7_CCM(dev);
+
+ memset(s->ccm, 0, sizeof(s->ccm));
+}
+
+#define CCM_INDEX(offset) (((offset) & ~(hwaddr)0xF) / sizeof(uint32_t))
+#define CCM_BITOP(offset) ((offset) & (hwaddr)0xF)
+
+enum {
+ CCM_BITOP_NONE = 0x00,
+ CCM_BITOP_SET = 0x04,
+ CCM_BITOP_CLR = 0x08,
+ CCM_BITOP_TOG = 0x0C,
+};
+
+static uint64_t imx7_set_clr_tog_read(void *opaque, hwaddr offset,
+ unsigned size)
+{
+ const uint32_t *mmio = opaque;
+
+ return mmio[CCM_INDEX(offset)];
+}
+
+static void imx7_set_clr_tog_write(void *opaque, hwaddr offset,
+ uint64_t value, unsigned size)
+{
+ const uint8_t bitop = CCM_BITOP(offset);
+ const uint32_t index = CCM_INDEX(offset);
+ uint32_t *mmio = opaque;
+
+ switch (bitop) {
+ case CCM_BITOP_NONE:
+ mmio[index] = value;
+ break;
+ case CCM_BITOP_SET:
+ mmio[index] |= value;
+ break;
+ case CCM_BITOP_CLR:
+ mmio[index] &= ~value;
+ break;
+ case CCM_BITOP_TOG:
+ mmio[index] ^= value;
+ break;
+ };
+}
+
+static const struct MemoryRegionOps imx7_set_clr_tog_ops = {
+ .read = imx7_set_clr_tog_read,
+ .write = imx7_set_clr_tog_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .impl = {
+ /*
+ * Our device would not work correctly if the guest was doing
+ * unaligned access. This might not be a limitation on the real
+ * device but in practice there is no reason for a guest to access
+ * this device unaligned.
+ */
+ .min_access_size = 4,
+ .max_access_size = 4,
+ .unaligned = false,
+ },
+};
+
+static const struct MemoryRegionOps imx7_digprog_ops = {
+ .read = imx7_set_clr_tog_read,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .impl = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ .unaligned = false,
+ },
+};
+
+static void imx7_ccm_init(Object *obj)
+{
+ SysBusDevice *sd = SYS_BUS_DEVICE(obj);
+ IMX7CCMState *s = IMX7_CCM(obj);
+
+ memory_region_init_io(&s->iomem,
+ obj,
+ &imx7_set_clr_tog_ops,
+ s->ccm,
+ TYPE_IMX7_CCM ".ccm",
+ sizeof(s->ccm));
+
+ sysbus_init_mmio(sd, &s->iomem);
+}
+
+static void imx7_analog_init(Object *obj)
+{
+ SysBusDevice *sd = SYS_BUS_DEVICE(obj);
+ IMX7AnalogState *s = IMX7_ANALOG(obj);
+
+ memory_region_init(&s->mmio.container, obj, TYPE_IMX7_ANALOG,
+ 0x10000);
+
+ memory_region_init_io(&s->mmio.analog,
+ obj,
+ &imx7_set_clr_tog_ops,
+ s->analog,
+ TYPE_IMX7_ANALOG,
+ sizeof(s->analog));
+
+ memory_region_add_subregion(&s->mmio.container,
+ 0x60, &s->mmio.analog);
+
+ memory_region_init_io(&s->mmio.pmu,
+ obj,
+ &imx7_set_clr_tog_ops,
+ s->pmu,
+ TYPE_IMX7_ANALOG ".pmu",
+ sizeof(s->pmu));
+
+ memory_region_add_subregion(&s->mmio.container,
+ 0x200, &s->mmio.pmu);
+
+ memory_region_init_io(&s->mmio.digprog,
+ obj,
+ &imx7_digprog_ops,
+ &s->analog[ANALOG_DIGPROG],
+ TYPE_IMX7_ANALOG ".digprog",
+ sizeof(uint32_t));
+
+ memory_region_add_subregion_overlap(&s->mmio.container,
+ 0x800, &s->mmio.digprog, 10);
+
+
+ sysbus_init_mmio(sd, &s->mmio.container);
+}
+
+static const VMStateDescription vmstate_imx7_ccm = {
+ .name = TYPE_IMX7_CCM,
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT32_ARRAY(ccm, IMX7CCMState, CCM_MAX),
+ VMSTATE_END_OF_LIST()
+ },
+};
+
+static uint32_t imx7_ccm_get_clock_frequency(IMXCCMState *dev, IMXClk clock)
+{
+ /*
+ * This function is "consumed" by GPT emulation code, however on
+ * i.MX7 each GPT block can have their own clock root. This means
+ * that this functions needs somehow to know requester's identity
+ * and the way to pass it: be it via additional IMXClk constants
+ * or by adding another argument to this method needs to be
+ * figured out
+ */
+ qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Not implemented\n",
+ TYPE_IMX7_CCM, __func__);
+ return 0;
+}
+
+static void imx7_ccm_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ IMXCCMClass *ccm = IMX_CCM_CLASS(klass);
+
+ dc->reset = imx7_ccm_reset;
+ dc->vmsd = &vmstate_imx7_ccm;
+ dc->desc = "i.MX7 Clock Control Module";
+
+ ccm->get_clock_frequency = imx7_ccm_get_clock_frequency;
+}
+
+static const TypeInfo imx7_ccm_info = {
+ .name = TYPE_IMX7_CCM,
+ .parent = TYPE_IMX_CCM,
+ .instance_size = sizeof(IMX7CCMState),
+ .instance_init = imx7_ccm_init,
+ .class_init = imx7_ccm_class_init,
+};
+
+static const VMStateDescription vmstate_imx7_analog = {
+ .name = TYPE_IMX7_ANALOG,
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT32_ARRAY(analog, IMX7AnalogState, ANALOG_MAX),
+ VMSTATE_UINT32_ARRAY(pmu, IMX7AnalogState, PMU_MAX),
+ VMSTATE_END_OF_LIST()
+ },
+};
+
+static void imx7_analog_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ dc->reset = imx7_analog_reset;
+ dc->vmsd = &vmstate_imx7_analog;
+ dc->desc = "i.MX7 Analog Module";
+}
+
+static const TypeInfo imx7_analog_info = {
+ .name = TYPE_IMX7_ANALOG,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(IMX7AnalogState),
+ .instance_init = imx7_analog_init,
+ .class_init = imx7_analog_class_init,
+};
+
+static void imx7_ccm_register_type(void)
+{
+ type_register_static(&imx7_ccm_info);
+ type_register_static(&imx7_analog_info);
+}
+type_init(imx7_ccm_register_type)
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 16/30] i.MX: Add code to emulate i.MX2 watchdog IP block
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (14 preceding siblings ...)
2018-02-09 11:02 ` [Qemu-devel] [PULL 15/30] i.MX: Add code to emulate i.MX7 CCM, PMU and ANALOG IP blocks Peter Maydell
@ 2018-02-09 11:03 ` Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 17/30] i.MX: Add code to emulate i.MX7 SNVS IP-block Peter Maydell
` (14 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:03 UTC (permalink / raw)
To: qemu-devel
From: Andrey Smirnov <andrew.smirnov@gmail.com>
Add enough code to emulate i.MX2 watchdog IP block so it would be
possible to reboot the machine running Linux Guest.
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Jason Wang <jasowang@redhat.com>
Cc: Philippe Mathieu-Daudé <f4bug@amsat.org>
Cc: Marcel Apfelbaum <marcel.apfelbaum@zoho.com>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Cc: yurovsky@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/misc/Makefile.objs | 1 +
include/hw/misc/imx2_wdt.h | 33 +++++++++++++++++
hw/misc/imx2_wdt.c | 89 ++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 123 insertions(+)
create mode 100644 include/hw/misc/imx2_wdt.h
create mode 100644 hw/misc/imx2_wdt.c
diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
index a28e5e49b0..4b2b705a6c 100644
--- a/hw/misc/Makefile.objs
+++ b/hw/misc/Makefile.objs
@@ -34,6 +34,7 @@ obj-$(CONFIG_IMX) += imx25_ccm.o
obj-$(CONFIG_IMX) += imx6_ccm.o
obj-$(CONFIG_IMX) += imx6_src.o
obj-$(CONFIG_IMX) += imx7_ccm.o
+obj-$(CONFIG_IMX) += imx2_wdt.o
obj-$(CONFIG_MILKYMIST) += milkymist-hpdmc.o
obj-$(CONFIG_MILKYMIST) += milkymist-pfpu.o
obj-$(CONFIG_MAINSTONE) += mst_fpga.o
diff --git a/include/hw/misc/imx2_wdt.h b/include/hw/misc/imx2_wdt.h
new file mode 100644
index 0000000000..8afc99a10e
--- /dev/null
+++ b/include/hw/misc/imx2_wdt.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2017, Impinj, Inc.
+ *
+ * i.MX2 Watchdog IP block
+ *
+ * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+#ifndef IMX2_WDT_H
+#define IMX2_WDT_H
+
+#include "hw/sysbus.h"
+
+#define TYPE_IMX2_WDT "imx2.wdt"
+#define IMX2_WDT(obj) OBJECT_CHECK(IMX2WdtState, (obj), TYPE_IMX2_WDT)
+
+enum IMX2WdtRegisters {
+ IMX2_WDT_WCR = 0x0000,
+ IMX2_WDT_REG_NUM = 0x0008 / sizeof(uint16_t) + 1,
+};
+
+
+typedef struct IMX2WdtState {
+ /* <private> */
+ SysBusDevice parent_obj;
+
+ MemoryRegion mmio;
+} IMX2WdtState;
+
+#endif /* IMX7_SNVS_H */
diff --git a/hw/misc/imx2_wdt.c b/hw/misc/imx2_wdt.c
new file mode 100644
index 0000000000..e47e442592
--- /dev/null
+++ b/hw/misc/imx2_wdt.c
@@ -0,0 +1,89 @@
+/*
+ * Copyright (c) 2018, Impinj, Inc.
+ *
+ * i.MX2 Watchdog IP block
+ *
+ * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/bitops.h"
+#include "sysemu/watchdog.h"
+
+#include "hw/misc/imx2_wdt.h"
+
+#define IMX2_WDT_WCR_WDA BIT(5) /* -> External Reset WDOG_B */
+#define IMX2_WDT_WCR_SRS BIT(4) /* -> Software Reset Signal */
+
+static uint64_t imx2_wdt_read(void *opaque, hwaddr addr,
+ unsigned int size)
+{
+ return 0;
+}
+
+static void imx2_wdt_write(void *opaque, hwaddr addr,
+ uint64_t value, unsigned int size)
+{
+ if (addr == IMX2_WDT_WCR &&
+ (value & (IMX2_WDT_WCR_WDA | IMX2_WDT_WCR_SRS))) {
+ watchdog_perform_action();
+ }
+}
+
+static const MemoryRegionOps imx2_wdt_ops = {
+ .read = imx2_wdt_read,
+ .write = imx2_wdt_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .impl = {
+ /*
+ * Our device would not work correctly if the guest was doing
+ * unaligned access. This might not be a limitation on the
+ * real device but in practice there is no reason for a guest
+ * to access this device unaligned.
+ */
+ .min_access_size = 4,
+ .max_access_size = 4,
+ .unaligned = false,
+ },
+};
+
+static void imx2_wdt_realize(DeviceState *dev, Error **errp)
+{
+ IMX2WdtState *s = IMX2_WDT(dev);
+
+ memory_region_init_io(&s->mmio, OBJECT(dev),
+ &imx2_wdt_ops, s,
+ TYPE_IMX2_WDT".mmio",
+ IMX2_WDT_REG_NUM * sizeof(uint16_t));
+ sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->mmio);
+}
+
+static void imx2_wdt_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ dc->realize = imx2_wdt_realize;
+ set_bit(DEVICE_CATEGORY_MISC, dc->categories);
+}
+
+static const TypeInfo imx2_wdt_info = {
+ .name = TYPE_IMX2_WDT,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(IMX2WdtState),
+ .class_init = imx2_wdt_class_init,
+};
+
+static WatchdogTimerModel model = {
+ .wdt_name = "imx2-watchdog",
+ .wdt_description = "i.MX2 Watchdog",
+};
+
+static void imx2_wdt_register_type(void)
+{
+ watchdog_add_model(&model);
+ type_register_static(&imx2_wdt_info);
+}
+type_init(imx2_wdt_register_type)
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 17/30] i.MX: Add code to emulate i.MX7 SNVS IP-block
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (15 preceding siblings ...)
2018-02-09 11:03 ` [Qemu-devel] [PULL 16/30] i.MX: Add code to emulate i.MX2 watchdog IP block Peter Maydell
@ 2018-02-09 11:03 ` Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 18/30] i.MX: Add code to emulate GPCv2 IP block Peter Maydell
` (13 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:03 UTC (permalink / raw)
To: qemu-devel
From: Andrey Smirnov <andrew.smirnov@gmail.com>
Add code to emulate SNVS IP-block. Currently only the bits needed to
be able to emulate machine shutdown are implemented.
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Jason Wang <jasowang@redhat.com>
Cc: Philippe Mathieu-Daudé <f4bug@amsat.org>
Cc: Marcel Apfelbaum <marcel.apfelbaum@zoho.com>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Cc: yurovsky@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/misc/Makefile.objs | 1 +
include/hw/misc/imx7_snvs.h | 35 +++++++++++++++++++
hw/misc/imx7_snvs.c | 83 +++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 119 insertions(+)
create mode 100644 include/hw/misc/imx7_snvs.h
create mode 100644 hw/misc/imx7_snvs.c
diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
index 4b2b705a6c..019886912c 100644
--- a/hw/misc/Makefile.objs
+++ b/hw/misc/Makefile.objs
@@ -35,6 +35,7 @@ obj-$(CONFIG_IMX) += imx6_ccm.o
obj-$(CONFIG_IMX) += imx6_src.o
obj-$(CONFIG_IMX) += imx7_ccm.o
obj-$(CONFIG_IMX) += imx2_wdt.o
+obj-$(CONFIG_IMX) += imx7_snvs.o
obj-$(CONFIG_MILKYMIST) += milkymist-hpdmc.o
obj-$(CONFIG_MILKYMIST) += milkymist-pfpu.o
obj-$(CONFIG_MAINSTONE) += mst_fpga.o
diff --git a/include/hw/misc/imx7_snvs.h b/include/hw/misc/imx7_snvs.h
new file mode 100644
index 0000000000..255f8f26f9
--- /dev/null
+++ b/include/hw/misc/imx7_snvs.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2017, Impinj, Inc.
+ *
+ * i.MX7 SNVS block emulation code
+ *
+ * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+#ifndef IMX7_SNVS_H
+#define IMX7_SNVS_H
+
+#include "qemu/bitops.h"
+#include "hw/sysbus.h"
+
+
+enum IMX7SNVSRegisters {
+ SNVS_LPCR = 0x38,
+ SNVS_LPCR_TOP = BIT(6),
+ SNVS_LPCR_DP_EN = BIT(5)
+};
+
+#define TYPE_IMX7_SNVS "imx7.snvs"
+#define IMX7_SNVS(obj) OBJECT_CHECK(IMX7SNVSState, (obj), TYPE_IMX7_SNVS)
+
+typedef struct IMX7SNVSState {
+ /* <private> */
+ SysBusDevice parent_obj;
+
+ MemoryRegion mmio;
+} IMX7SNVSState;
+
+#endif /* IMX7_SNVS_H */
diff --git a/hw/misc/imx7_snvs.c b/hw/misc/imx7_snvs.c
new file mode 100644
index 0000000000..4df482b282
--- /dev/null
+++ b/hw/misc/imx7_snvs.c
@@ -0,0 +1,83 @@
+/*
+ * IMX7 Secure Non-Volatile Storage
+ *
+ * Copyright (c) 2018, Impinj, Inc.
+ *
+ * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ *
+ * Bare minimum emulation code needed to support being able to shut
+ * down linux guest gracefully.
+ */
+
+#include "qemu/osdep.h"
+#include "hw/misc/imx7_snvs.h"
+#include "qemu/log.h"
+#include "sysemu/sysemu.h"
+
+static uint64_t imx7_snvs_read(void *opaque, hwaddr offset, unsigned size)
+{
+ return 0;
+}
+
+static void imx7_snvs_write(void *opaque, hwaddr offset,
+ uint64_t v, unsigned size)
+{
+ const uint32_t value = v;
+ const uint32_t mask = SNVS_LPCR_TOP | SNVS_LPCR_DP_EN;
+
+ if (offset == SNVS_LPCR && ((value & mask) == mask)) {
+ qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
+ }
+}
+
+static const struct MemoryRegionOps imx7_snvs_ops = {
+ .read = imx7_snvs_read,
+ .write = imx7_snvs_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .impl = {
+ /*
+ * Our device would not work correctly if the guest was doing
+ * unaligned access. This might not be a limitation on the real
+ * device but in practice there is no reason for a guest to access
+ * this device unaligned.
+ */
+ .min_access_size = 4,
+ .max_access_size = 4,
+ .unaligned = false,
+ },
+};
+
+static void imx7_snvs_init(Object *obj)
+{
+ SysBusDevice *sd = SYS_BUS_DEVICE(obj);
+ IMX7SNVSState *s = IMX7_SNVS(obj);
+
+ memory_region_init_io(&s->mmio, obj, &imx7_snvs_ops, s,
+ TYPE_IMX7_SNVS, 0x1000);
+
+ sysbus_init_mmio(sd, &s->mmio);
+}
+
+static void imx7_snvs_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ dc->desc = "i.MX7 Secure Non-Volatile Storage Module";
+}
+
+static const TypeInfo imx7_snvs_info = {
+ .name = TYPE_IMX7_SNVS,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(IMX7SNVSState),
+ .instance_init = imx7_snvs_init,
+ .class_init = imx7_snvs_class_init,
+};
+
+static void imx7_snvs_register_type(void)
+{
+ type_register_static(&imx7_snvs_info);
+}
+type_init(imx7_snvs_register_type)
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 18/30] i.MX: Add code to emulate GPCv2 IP block
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (16 preceding siblings ...)
2018-02-09 11:03 ` [Qemu-devel] [PULL 17/30] i.MX: Add code to emulate i.MX7 SNVS IP-block Peter Maydell
@ 2018-02-09 11:03 ` Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 19/30] i.MX: Add i.MX7 GPT variant Peter Maydell
` (12 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:03 UTC (permalink / raw)
To: qemu-devel
From: Andrey Smirnov <andrew.smirnov@gmail.com>
Add minimal code needed to allow upstream Linux guest to boot.
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Jason Wang <jasowang@redhat.com>
Cc: Philippe Mathieu-Daudé <f4bug@amsat.org>
Cc: Marcel Apfelbaum <marcel.apfelbaum@zoho.com>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Cc: yurovsky@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/intc/Makefile.objs | 2 +-
include/hw/intc/imx_gpcv2.h | 22 ++++++++
hw/intc/imx_gpcv2.c | 125 ++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 148 insertions(+), 1 deletion(-)
create mode 100644 include/hw/intc/imx_gpcv2.h
create mode 100644 hw/intc/imx_gpcv2.c
diff --git a/hw/intc/Makefile.objs b/hw/intc/Makefile.objs
index 571e094a14..0e9963f5ee 100644
--- a/hw/intc/Makefile.objs
+++ b/hw/intc/Makefile.objs
@@ -6,7 +6,7 @@ common-obj-$(CONFIG_XILINX) += xilinx_intc.o
common-obj-$(CONFIG_XLNX_ZYNQMP) += xlnx-pmu-iomod-intc.o
common-obj-$(CONFIG_XLNX_ZYNQMP) += xlnx-zynqmp-ipi.o
common-obj-$(CONFIG_ETRAXFS) += etraxfs_pic.o
-common-obj-$(CONFIG_IMX) += imx_avic.o
+common-obj-$(CONFIG_IMX) += imx_avic.o imx_gpcv2.o
common-obj-$(CONFIG_LM32) += lm32_pic.o
common-obj-$(CONFIG_REALVIEW) += realview_gic.o
common-obj-$(CONFIG_SLAVIO) += slavio_intctl.o
diff --git a/include/hw/intc/imx_gpcv2.h b/include/hw/intc/imx_gpcv2.h
new file mode 100644
index 0000000000..ed978b24bb
--- /dev/null
+++ b/include/hw/intc/imx_gpcv2.h
@@ -0,0 +1,22 @@
+#ifndef IMX_GPCV2_H
+#define IMX_GPCV2_H
+
+#include "hw/sysbus.h"
+
+enum IMXGPCv2Registers {
+ GPC_NUM = 0xE00 / sizeof(uint32_t),
+};
+
+typedef struct IMXGPCv2State {
+ /*< private >*/
+ SysBusDevice parent_obj;
+
+ /*< public >*/
+ MemoryRegion iomem;
+ uint32_t regs[GPC_NUM];
+} IMXGPCv2State;
+
+#define TYPE_IMX_GPCV2 "imx-gpcv2"
+#define IMX_GPCV2(obj) OBJECT_CHECK(IMXGPCv2State, (obj), TYPE_IMX_GPCV2)
+
+#endif /* IMX_GPCV2_H */
diff --git a/hw/intc/imx_gpcv2.c b/hw/intc/imx_gpcv2.c
new file mode 100644
index 0000000000..4eb9ce2668
--- /dev/null
+++ b/hw/intc/imx_gpcv2.c
@@ -0,0 +1,125 @@
+/*
+ * Copyright (c) 2018, Impinj, Inc.
+ *
+ * i.MX7 GPCv2 block emulation code
+ *
+ * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+#include "qemu/osdep.h"
+#include "hw/intc/imx_gpcv2.h"
+#include "qemu/log.h"
+
+#define GPC_PU_PGC_SW_PUP_REQ 0x0f8
+#define GPC_PU_PGC_SW_PDN_REQ 0x104
+
+#define USB_HSIC_PHY_SW_Pxx_REQ BIT(4)
+#define USB_OTG2_PHY_SW_Pxx_REQ BIT(3)
+#define USB_OTG1_PHY_SW_Pxx_REQ BIT(2)
+#define PCIE_PHY_SW_Pxx_REQ BIT(1)
+#define MIPI_PHY_SW_Pxx_REQ BIT(0)
+
+
+static void imx_gpcv2_reset(DeviceState *dev)
+{
+ IMXGPCv2State *s = IMX_GPCV2(dev);
+
+ memset(s->regs, 0, sizeof(s->regs));
+}
+
+static uint64_t imx_gpcv2_read(void *opaque, hwaddr offset,
+ unsigned size)
+{
+ IMXGPCv2State *s = opaque;
+
+ return s->regs[offset / sizeof(uint32_t)];
+}
+
+static void imx_gpcv2_write(void *opaque, hwaddr offset,
+ uint64_t value, unsigned size)
+{
+ IMXGPCv2State *s = opaque;
+ const size_t idx = offset / sizeof(uint32_t);
+
+ s->regs[idx] = value;
+
+ /*
+ * Real HW will clear those bits once as a way to indicate that
+ * power up request is complete
+ */
+ if (offset == GPC_PU_PGC_SW_PUP_REQ ||
+ offset == GPC_PU_PGC_SW_PDN_REQ) {
+ s->regs[idx] &= ~(USB_HSIC_PHY_SW_Pxx_REQ |
+ USB_OTG2_PHY_SW_Pxx_REQ |
+ USB_OTG1_PHY_SW_Pxx_REQ |
+ PCIE_PHY_SW_Pxx_REQ |
+ MIPI_PHY_SW_Pxx_REQ);
+ }
+}
+
+static const struct MemoryRegionOps imx_gpcv2_ops = {
+ .read = imx_gpcv2_read,
+ .write = imx_gpcv2_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .impl = {
+ /*
+ * Our device would not work correctly if the guest was doing
+ * unaligned access. This might not be a limitation on the real
+ * device but in practice there is no reason for a guest to access
+ * this device unaligned.
+ */
+ .min_access_size = 4,
+ .max_access_size = 4,
+ .unaligned = false,
+ },
+};
+
+static void imx_gpcv2_init(Object *obj)
+{
+ SysBusDevice *sd = SYS_BUS_DEVICE(obj);
+ IMXGPCv2State *s = IMX_GPCV2(obj);
+
+ memory_region_init_io(&s->iomem,
+ obj,
+ &imx_gpcv2_ops,
+ s,
+ TYPE_IMX_GPCV2 ".iomem",
+ sizeof(s->regs));
+ sysbus_init_mmio(sd, &s->iomem);
+}
+
+static const VMStateDescription vmstate_imx_gpcv2 = {
+ .name = TYPE_IMX_GPCV2,
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT32_ARRAY(regs, IMXGPCv2State, GPC_NUM),
+ VMSTATE_END_OF_LIST()
+ },
+};
+
+static void imx_gpcv2_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ dc->reset = imx_gpcv2_reset;
+ dc->vmsd = &vmstate_imx_gpcv2;
+ dc->desc = "i.MX GPCv2 Module";
+}
+
+static const TypeInfo imx_gpcv2_info = {
+ .name = TYPE_IMX_GPCV2,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(IMXGPCv2State),
+ .instance_init = imx_gpcv2_init,
+ .class_init = imx_gpcv2_class_init,
+};
+
+static void imx_gpcv2_register_type(void)
+{
+ type_register_static(&imx_gpcv2_info);
+}
+type_init(imx_gpcv2_register_type)
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 19/30] i.MX: Add i.MX7 GPT variant
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (17 preceding siblings ...)
2018-02-09 11:03 ` [Qemu-devel] [PULL 18/30] i.MX: Add code to emulate GPCv2 IP block Peter Maydell
@ 2018-02-09 11:03 ` Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 20/30] i.MX: Add implementation of i.MX7 GPR IP block Peter Maydell
` (11 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:03 UTC (permalink / raw)
To: qemu-devel
From: Andrey Smirnov <andrew.smirnov@gmail.com>
Add minimal code needed to allow upstream Linux guest to boot.
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Jason Wang <jasowang@redhat.com>
Cc: Philippe Mathieu-Daudé <f4bug@amsat.org>
Cc: Marcel Apfelbaum <marcel.apfelbaum@zoho.com>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Cc: yurovsky@gmail.com
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/timer/imx_gpt.h | 1 +
hw/timer/imx_gpt.c | 25 +++++++++++++++++++++++++
2 files changed, 26 insertions(+)
diff --git a/include/hw/timer/imx_gpt.h b/include/hw/timer/imx_gpt.h
index eac59b2a70..20ccb327c4 100644
--- a/include/hw/timer/imx_gpt.h
+++ b/include/hw/timer/imx_gpt.h
@@ -77,6 +77,7 @@
#define TYPE_IMX25_GPT "imx25.gpt"
#define TYPE_IMX31_GPT "imx31.gpt"
#define TYPE_IMX6_GPT "imx6.gpt"
+#define TYPE_IMX7_GPT "imx7.gpt"
#define TYPE_IMX_GPT TYPE_IMX25_GPT
diff --git a/hw/timer/imx_gpt.c b/hw/timer/imx_gpt.c
index 4b9b54bf2e..65e4ee6bcf 100644
--- a/hw/timer/imx_gpt.c
+++ b/hw/timer/imx_gpt.c
@@ -113,6 +113,17 @@ static const IMXClk imx6_gpt_clocks[] = {
CLK_HIGH, /* 111 reference clock */
};
+static const IMXClk imx7_gpt_clocks[] = {
+ CLK_NONE, /* 000 No clock source */
+ CLK_IPG, /* 001 ipg_clk, 532MHz*/
+ CLK_IPG_HIGH, /* 010 ipg_clk_highfreq */
+ CLK_EXT, /* 011 External clock */
+ CLK_32k, /* 100 ipg_clk_32k */
+ CLK_HIGH, /* 101 reference clock */
+ CLK_NONE, /* 110 not defined */
+ CLK_NONE, /* 111 not defined */
+};
+
static void imx_gpt_set_freq(IMXGPTState *s)
{
uint32_t clksrc = extract32(s->cr, GPT_CR_CLKSRC_SHIFT, 3);
@@ -512,6 +523,13 @@ static void imx6_gpt_init(Object *obj)
s->clocks = imx6_gpt_clocks;
}
+static void imx7_gpt_init(Object *obj)
+{
+ IMXGPTState *s = IMX_GPT(obj);
+
+ s->clocks = imx7_gpt_clocks;
+}
+
static const TypeInfo imx25_gpt_info = {
.name = TYPE_IMX25_GPT,
.parent = TYPE_SYS_BUS_DEVICE,
@@ -532,11 +550,18 @@ static const TypeInfo imx6_gpt_info = {
.instance_init = imx6_gpt_init,
};
+static const TypeInfo imx7_gpt_info = {
+ .name = TYPE_IMX7_GPT,
+ .parent = TYPE_IMX25_GPT,
+ .instance_init = imx7_gpt_init,
+};
+
static void imx_gpt_register_types(void)
{
type_register_static(&imx25_gpt_info);
type_register_static(&imx31_gpt_info);
type_register_static(&imx6_gpt_info);
+ type_register_static(&imx7_gpt_info);
}
type_init(imx_gpt_register_types)
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 20/30] i.MX: Add implementation of i.MX7 GPR IP block
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (18 preceding siblings ...)
2018-02-09 11:03 ` [Qemu-devel] [PULL 19/30] i.MX: Add i.MX7 GPT variant Peter Maydell
@ 2018-02-09 11:03 ` Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 21/30] usb: Add basic code to emulate Chipidea USB IP Peter Maydell
` (10 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:03 UTC (permalink / raw)
To: qemu-devel
From: Andrey Smirnov <andrew.smirnov@gmail.com>
Add minimal code needed to allow upstream Linux guest to boot.
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Jason Wang <jasowang@redhat.com>
Cc: Philippe Mathieu-Daudé <f4bug@amsat.org>
Cc: Marcel Apfelbaum <marcel.apfelbaum@zoho.com>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Cc: yurovsky@gmail.com
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/misc/Makefile.objs | 1 +
include/hw/misc/imx7_gpr.h | 28 ++++++++++
hw/misc/imx7_gpr.c | 124 +++++++++++++++++++++++++++++++++++++++++++++
hw/misc/trace-events | 4 ++
4 files changed, 157 insertions(+)
create mode 100644 include/hw/misc/imx7_gpr.h
create mode 100644 hw/misc/imx7_gpr.c
diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
index 019886912c..fce426eb75 100644
--- a/hw/misc/Makefile.objs
+++ b/hw/misc/Makefile.objs
@@ -36,6 +36,7 @@ obj-$(CONFIG_IMX) += imx6_src.o
obj-$(CONFIG_IMX) += imx7_ccm.o
obj-$(CONFIG_IMX) += imx2_wdt.o
obj-$(CONFIG_IMX) += imx7_snvs.o
+obj-$(CONFIG_IMX) += imx7_gpr.o
obj-$(CONFIG_MILKYMIST) += milkymist-hpdmc.o
obj-$(CONFIG_MILKYMIST) += milkymist-pfpu.o
obj-$(CONFIG_MAINSTONE) += mst_fpga.o
diff --git a/include/hw/misc/imx7_gpr.h b/include/hw/misc/imx7_gpr.h
new file mode 100644
index 0000000000..e19373d274
--- /dev/null
+++ b/include/hw/misc/imx7_gpr.h
@@ -0,0 +1,28 @@
+/*
+ * Copyright (c) 2017, Impinj, Inc.
+ *
+ * i.MX7 GPR IP block emulation code
+ *
+ * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+#ifndef IMX7_GPR_H
+#define IMX7_GPR_H
+
+#include "qemu/bitops.h"
+#include "hw/sysbus.h"
+
+#define TYPE_IMX7_GPR "imx7.gpr"
+#define IMX7_GPR(obj) OBJECT_CHECK(IMX7GPRState, (obj), TYPE_IMX7_GPR)
+
+typedef struct IMX7GPRState {
+ /* <private> */
+ SysBusDevice parent_obj;
+
+ MemoryRegion mmio;
+} IMX7GPRState;
+
+#endif /* IMX7_GPR_H */
diff --git a/hw/misc/imx7_gpr.c b/hw/misc/imx7_gpr.c
new file mode 100644
index 0000000000..c2a9df29c6
--- /dev/null
+++ b/hw/misc/imx7_gpr.c
@@ -0,0 +1,124 @@
+/*
+ * Copyright (c) 2018, Impinj, Inc.
+ *
+ * i.MX7 GPR IP block emulation code
+ *
+ * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ *
+ * Bare minimum emulation code needed to support being able to shut
+ * down linux guest gracefully.
+ */
+
+#include "qemu/osdep.h"
+#include "hw/misc/imx7_gpr.h"
+#include "qemu/log.h"
+#include "sysemu/sysemu.h"
+
+#include "trace.h"
+
+enum IMX7GPRRegisters {
+ IOMUXC_GPR0 = 0x00,
+ IOMUXC_GPR1 = 0x04,
+ IOMUXC_GPR2 = 0x08,
+ IOMUXC_GPR3 = 0x0c,
+ IOMUXC_GPR4 = 0x10,
+ IOMUXC_GPR5 = 0x14,
+ IOMUXC_GPR6 = 0x18,
+ IOMUXC_GPR7 = 0x1c,
+ IOMUXC_GPR8 = 0x20,
+ IOMUXC_GPR9 = 0x24,
+ IOMUXC_GPR10 = 0x28,
+ IOMUXC_GPR11 = 0x2c,
+ IOMUXC_GPR12 = 0x30,
+ IOMUXC_GPR13 = 0x34,
+ IOMUXC_GPR14 = 0x38,
+ IOMUXC_GPR15 = 0x3c,
+ IOMUXC_GPR16 = 0x40,
+ IOMUXC_GPR17 = 0x44,
+ IOMUXC_GPR18 = 0x48,
+ IOMUXC_GPR19 = 0x4c,
+ IOMUXC_GPR20 = 0x50,
+ IOMUXC_GPR21 = 0x54,
+ IOMUXC_GPR22 = 0x58,
+};
+
+#define IMX7D_GPR1_IRQ_MASK BIT(12)
+#define IMX7D_GPR1_ENET1_TX_CLK_SEL_MASK BIT(13)
+#define IMX7D_GPR1_ENET2_TX_CLK_SEL_MASK BIT(14)
+#define IMX7D_GPR1_ENET_TX_CLK_SEL_MASK (0x3 << 13)
+#define IMX7D_GPR1_ENET1_CLK_DIR_MASK BIT(17)
+#define IMX7D_GPR1_ENET2_CLK_DIR_MASK BIT(18)
+#define IMX7D_GPR1_ENET_CLK_DIR_MASK (0x3 << 17)
+
+#define IMX7D_GPR5_CSI_MUX_CONTROL_MIPI BIT(4)
+#define IMX7D_GPR12_PCIE_PHY_REFCLK_SEL BIT(5)
+#define IMX7D_GPR22_PCIE_PHY_PLL_LOCKED BIT(31)
+
+
+static uint64_t imx7_gpr_read(void *opaque, hwaddr offset, unsigned size)
+{
+ trace_imx7_gpr_read(offset);
+
+ if (offset == IOMUXC_GPR22) {
+ return IMX7D_GPR22_PCIE_PHY_PLL_LOCKED;
+ }
+
+ return 0;
+}
+
+static void imx7_gpr_write(void *opaque, hwaddr offset,
+ uint64_t v, unsigned size)
+{
+ trace_imx7_gpr_write(offset, v);
+}
+
+static const struct MemoryRegionOps imx7_gpr_ops = {
+ .read = imx7_gpr_read,
+ .write = imx7_gpr_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .impl = {
+ /*
+ * Our device would not work correctly if the guest was doing
+ * unaligned access. This might not be a limitation on the
+ * real device but in practice there is no reason for a guest
+ * to access this device unaligned.
+ */
+ .min_access_size = 4,
+ .max_access_size = 4,
+ .unaligned = false,
+ },
+};
+
+static void imx7_gpr_init(Object *obj)
+{
+ SysBusDevice *sd = SYS_BUS_DEVICE(obj);
+ IMX7GPRState *s = IMX7_GPR(obj);
+
+ memory_region_init_io(&s->mmio, obj, &imx7_gpr_ops, s,
+ TYPE_IMX7_GPR, 64 * 1024);
+ sysbus_init_mmio(sd, &s->mmio);
+}
+
+static void imx7_gpr_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ dc->desc = "i.MX7 General Purpose Registers Module";
+}
+
+static const TypeInfo imx7_gpr_info = {
+ .name = TYPE_IMX7_GPR,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(IMX7GPRState),
+ .instance_init = imx7_gpr_init,
+ .class_init = imx7_gpr_class_init,
+};
+
+static void imx7_gpr_register_type(void)
+{
+ type_register_static(&imx7_gpr_info);
+}
+type_init(imx7_gpr_register_type)
diff --git a/hw/misc/trace-events b/hw/misc/trace-events
index 616579a403..e6070f280d 100644
--- a/hw/misc/trace-events
+++ b/hw/misc/trace-events
@@ -66,3 +66,7 @@ mps2_scc_cfg_read(unsigned function, unsigned device, uint32_t value) "MPS2 SCC
msf2_sysreg_write(uint64_t offset, uint32_t val, uint32_t prev) "msf2-sysreg write: addr 0x%08" HWADDR_PRIx " data 0x%" PRIx32 " prev 0x%" PRIx32
msf2_sysreg_read(uint64_t offset, uint32_t val) "msf2-sysreg read: addr 0x%08" HWADDR_PRIx " data 0x%08" PRIx32
msf2_sysreg_write_pll_status(void) "Invalid write to read only PLL status register"
+
+#hw/misc/imx7_gpr.c
+imx7_gpr_read(uint64_t offset) "addr 0x%08" HWADDR_PRIx
+imx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" HWADDR_PRIx "value 0x%08" HWADDR_PRIx
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 21/30] usb: Add basic code to emulate Chipidea USB IP
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (19 preceding siblings ...)
2018-02-09 11:03 ` [Qemu-devel] [PULL 20/30] i.MX: Add implementation of i.MX7 GPR IP block Peter Maydell
@ 2018-02-09 11:03 ` Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 22/30] hw/arm: Move virt's PSCI DT fixup code to arm/boot.c Peter Maydell
` (9 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:03 UTC (permalink / raw)
To: qemu-devel
From: Andrey Smirnov <andrew.smirnov@gmail.com>
Add code to emulate Chipidea USB IP (used in i.MX SoCs). Tested to
work against:
-usb -drive if=none,id=stick,file=usb.img,format=raw -device \
usb-storage,bus=usb-bus.0,drive=stick
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Jason Wang <jasowang@redhat.com>
Cc: Philippe Mathieu-Daudé <f4bug@amsat.org>
Cc: Marcel Apfelbaum <marcel.apfelbaum@zoho.com>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Cc: yurovsky@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/usb/Makefile.objs | 1 +
include/hw/usb/chipidea.h | 16 +++++
hw/usb/chipidea.c | 176 ++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 193 insertions(+)
create mode 100644 include/hw/usb/chipidea.h
create mode 100644 hw/usb/chipidea.c
diff --git a/hw/usb/Makefile.objs b/hw/usb/Makefile.objs
index fbcd498c59..41be700812 100644
--- a/hw/usb/Makefile.objs
+++ b/hw/usb/Makefile.objs
@@ -12,6 +12,7 @@ common-obj-$(CONFIG_USB_XHCI_NEC) += hcd-xhci-nec.o
common-obj-$(CONFIG_USB_MUSB) += hcd-musb.o
obj-$(CONFIG_TUSB6010) += tusb6010.o
+obj-$(CONFIG_IMX) += chipidea.o
# emulated usb devices
common-obj-$(CONFIG_USB) += dev-hub.o
diff --git a/include/hw/usb/chipidea.h b/include/hw/usb/chipidea.h
new file mode 100644
index 0000000000..1ec2e9dbda
--- /dev/null
+++ b/include/hw/usb/chipidea.h
@@ -0,0 +1,16 @@
+#ifndef CHIPIDEA_H
+#define CHIPIDEA_H
+
+#include "hw/usb/hcd-ehci.h"
+
+typedef struct ChipideaState {
+ /*< private >*/
+ EHCISysBusState parent_obj;
+
+ MemoryRegion iomem[3];
+} ChipideaState;
+
+#define TYPE_CHIPIDEA "usb-chipidea"
+#define CHIPIDEA(obj) OBJECT_CHECK(ChipideaState, (obj), TYPE_CHIPIDEA)
+
+#endif /* CHIPIDEA_H */
diff --git a/hw/usb/chipidea.c b/hw/usb/chipidea.c
new file mode 100644
index 0000000000..60d67f88b8
--- /dev/null
+++ b/hw/usb/chipidea.c
@@ -0,0 +1,176 @@
+/*
+ * Copyright (c) 2018, Impinj, Inc.
+ *
+ * Chipidea USB block emulation code
+ *
+ * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+#include "qemu/osdep.h"
+#include "hw/usb/hcd-ehci.h"
+#include "hw/usb/chipidea.h"
+#include "qemu/log.h"
+
+enum {
+ CHIPIDEA_USBx_DCIVERSION = 0x000,
+ CHIPIDEA_USBx_DCCPARAMS = 0x004,
+ CHIPIDEA_USBx_DCCPARAMS_HC = BIT(8),
+};
+
+static uint64_t chipidea_read(void *opaque, hwaddr offset,
+ unsigned size)
+{
+ return 0;
+}
+
+static void chipidea_write(void *opaque, hwaddr offset,
+ uint64_t value, unsigned size)
+{
+}
+
+static const struct MemoryRegionOps chipidea_ops = {
+ .read = chipidea_read,
+ .write = chipidea_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .impl = {
+ /*
+ * Our device would not work correctly if the guest was doing
+ * unaligned access. This might not be a limitation on the
+ * real device but in practice there is no reason for a guest
+ * to access this device unaligned.
+ */
+ .min_access_size = 4,
+ .max_access_size = 4,
+ .unaligned = false,
+ },
+};
+
+static uint64_t chipidea_dc_read(void *opaque, hwaddr offset,
+ unsigned size)
+{
+ switch (offset) {
+ case CHIPIDEA_USBx_DCIVERSION:
+ return 0x1;
+ case CHIPIDEA_USBx_DCCPARAMS:
+ /*
+ * Real hardware (at least i.MX7) will also report the
+ * controller as "Device Capable" (and 8 supported endpoints),
+ * but there doesn't seem to be much point in doing so, since
+ * we don't emulate that part.
+ */
+ return CHIPIDEA_USBx_DCCPARAMS_HC;
+ }
+
+ return 0;
+}
+
+static void chipidea_dc_write(void *opaque, hwaddr offset,
+ uint64_t value, unsigned size)
+{
+}
+
+static const struct MemoryRegionOps chipidea_dc_ops = {
+ .read = chipidea_dc_read,
+ .write = chipidea_dc_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .impl = {
+ /*
+ * Our device would not work correctly if the guest was doing
+ * unaligned access. This might not be a limitation on the real
+ * device but in practice there is no reason for a guest to access
+ * this device unaligned.
+ */
+ .min_access_size = 4,
+ .max_access_size = 4,
+ .unaligned = false,
+ },
+};
+
+static void chipidea_init(Object *obj)
+{
+ EHCIState *ehci = &SYS_BUS_EHCI(obj)->ehci;
+ ChipideaState *ci = CHIPIDEA(obj);
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(ci->iomem); i++) {
+ const struct {
+ const char *name;
+ hwaddr offset;
+ uint64_t size;
+ const struct MemoryRegionOps *ops;
+ } regions[ARRAY_SIZE(ci->iomem)] = {
+ /*
+ * Registers located between offsets 0x000 and 0xFC
+ */
+ {
+ .name = TYPE_CHIPIDEA ".misc",
+ .offset = 0x000,
+ .size = 0x100,
+ .ops = &chipidea_ops,
+ },
+ /*
+ * Registers located between offsets 0x1A4 and 0x1DC
+ */
+ {
+ .name = TYPE_CHIPIDEA ".endpoints",
+ .offset = 0x1A4,
+ .size = 0x1DC - 0x1A4 + 4,
+ .ops = &chipidea_ops,
+ },
+ /*
+ * USB_x_DCIVERSION and USB_x_DCCPARAMS
+ */
+ {
+ .name = TYPE_CHIPIDEA ".dc",
+ .offset = 0x120,
+ .size = 8,
+ .ops = &chipidea_dc_ops,
+ },
+ };
+
+ memory_region_init_io(&ci->iomem[i],
+ obj,
+ regions[i].ops,
+ ci,
+ regions[i].name,
+ regions[i].size);
+
+ memory_region_add_subregion(&ehci->mem,
+ regions[i].offset,
+ &ci->iomem[i]);
+ }
+}
+
+static void chipidea_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ SysBusEHCIClass *sec = SYS_BUS_EHCI_CLASS(klass);
+
+ /*
+ * Offsets used were taken from i.MX7Dual Applications Processor
+ * Reference Manual, Rev 0.1, p. 3177, Table 11-59
+ */
+ sec->capsbase = 0x100;
+ sec->opregbase = 0x140;
+ sec->portnr = 1;
+
+ set_bit(DEVICE_CATEGORY_USB, dc->categories);
+ dc->desc = "Chipidea USB Module";
+}
+
+static const TypeInfo chipidea_info = {
+ .name = TYPE_CHIPIDEA,
+ .parent = TYPE_SYS_BUS_EHCI,
+ .instance_size = sizeof(ChipideaState),
+ .instance_init = chipidea_init,
+ .class_init = chipidea_class_init,
+};
+
+static void chipidea_register_type(void)
+{
+ type_register_static(&chipidea_info);
+}
+type_init(chipidea_register_type)
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 22/30] hw/arm: Move virt's PSCI DT fixup code to arm/boot.c
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (20 preceding siblings ...)
2018-02-09 11:03 ` [Qemu-devel] [PULL 21/30] usb: Add basic code to emulate Chipidea USB IP Peter Maydell
@ 2018-02-09 11:03 ` Peter Maydell
2018-03-27 14:22 ` [Qemu-devel] [PULL, " Marc Zyngier
2018-02-09 11:03 ` [Qemu-devel] [PULL 23/30] target/arm: Expand vector registers for SVE Peter Maydell
` (8 subsequent siblings)
30 siblings, 1 reply; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:03 UTC (permalink / raw)
To: qemu-devel
From: Andrey Smirnov <andrew.smirnov@gmail.com>
Move virt's PSCI DT fixup code to arm/boot.c and set this fixup to
happen automatically for every board that doesn't mark "psci-conduit"
as disabled. This way emulated boards other than "virt" that rely on
PSIC for SMP could benefit from that code.
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Jason Wang <jasowang@redhat.com>
Cc: Philippe Mathieu-Daudé <f4bug@amsat.org>
Cc: Marcel Apfelbaum <marcel.apfelbaum@zoho.com>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Cc: yurovsky@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/boot.c | 65 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
hw/arm/virt.c | 61 -------------------------------------------------------
2 files changed, 65 insertions(+), 61 deletions(-)
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index bb244ec359..9b174b982c 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -385,6 +385,69 @@ static void set_kernel_args_old(const struct arm_boot_info *info)
}
}
+static void fdt_add_psci_node(void *fdt)
+{
+ uint32_t cpu_suspend_fn;
+ uint32_t cpu_off_fn;
+ uint32_t cpu_on_fn;
+ uint32_t migrate_fn;
+ ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(0));
+ const char *psci_method;
+ int64_t psci_conduit;
+
+ psci_conduit = object_property_get_int(OBJECT(armcpu),
+ "psci-conduit",
+ &error_abort);
+ switch (psci_conduit) {
+ case QEMU_PSCI_CONDUIT_DISABLED:
+ return;
+ case QEMU_PSCI_CONDUIT_HVC:
+ psci_method = "hvc";
+ break;
+ case QEMU_PSCI_CONDUIT_SMC:
+ psci_method = "smc";
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
+ qemu_fdt_add_subnode(fdt, "/psci");
+ if (armcpu->psci_version == 2) {
+ const char comp[] = "arm,psci-0.2\0arm,psci";
+ qemu_fdt_setprop(fdt, "/psci", "compatible", comp, sizeof(comp));
+
+ cpu_off_fn = QEMU_PSCI_0_2_FN_CPU_OFF;
+ if (arm_feature(&armcpu->env, ARM_FEATURE_AARCH64)) {
+ cpu_suspend_fn = QEMU_PSCI_0_2_FN64_CPU_SUSPEND;
+ cpu_on_fn = QEMU_PSCI_0_2_FN64_CPU_ON;
+ migrate_fn = QEMU_PSCI_0_2_FN64_MIGRATE;
+ } else {
+ cpu_suspend_fn = QEMU_PSCI_0_2_FN_CPU_SUSPEND;
+ cpu_on_fn = QEMU_PSCI_0_2_FN_CPU_ON;
+ migrate_fn = QEMU_PSCI_0_2_FN_MIGRATE;
+ }
+ } else {
+ qemu_fdt_setprop_string(fdt, "/psci", "compatible", "arm,psci");
+
+ cpu_suspend_fn = QEMU_PSCI_0_1_FN_CPU_SUSPEND;
+ cpu_off_fn = QEMU_PSCI_0_1_FN_CPU_OFF;
+ cpu_on_fn = QEMU_PSCI_0_1_FN_CPU_ON;
+ migrate_fn = QEMU_PSCI_0_1_FN_MIGRATE;
+ }
+
+ /* We adopt the PSCI spec's nomenclature, and use 'conduit' to refer
+ * to the instruction that should be used to invoke PSCI functions.
+ * However, the device tree binding uses 'method' instead, so that is
+ * what we should use here.
+ */
+ qemu_fdt_setprop_string(fdt, "/psci", "method", psci_method);
+
+ qemu_fdt_setprop_cell(fdt, "/psci", "cpu_suspend", cpu_suspend_fn);
+ qemu_fdt_setprop_cell(fdt, "/psci", "cpu_off", cpu_off_fn);
+ qemu_fdt_setprop_cell(fdt, "/psci", "cpu_on", cpu_on_fn);
+ qemu_fdt_setprop_cell(fdt, "/psci", "migrate", migrate_fn);
+}
+
/**
* load_dtb() - load a device tree binary image into memory
* @addr: the address to load the image at
@@ -541,6 +604,8 @@ static int load_dtb(hwaddr addr, const struct arm_boot_info *binfo,
}
}
+ fdt_add_psci_node(fdt);
+
if (binfo->modify_dtb) {
binfo->modify_dtb(binfo, fdt);
}
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index b334c82eda..dbb3c8036a 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -244,66 +244,6 @@ static void create_fdt(VirtMachineState *vms)
}
}
-static void fdt_add_psci_node(const VirtMachineState *vms)
-{
- uint32_t cpu_suspend_fn;
- uint32_t cpu_off_fn;
- uint32_t cpu_on_fn;
- uint32_t migrate_fn;
- void *fdt = vms->fdt;
- ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(0));
- const char *psci_method;
-
- switch (vms->psci_conduit) {
- case QEMU_PSCI_CONDUIT_DISABLED:
- return;
- case QEMU_PSCI_CONDUIT_HVC:
- psci_method = "hvc";
- break;
- case QEMU_PSCI_CONDUIT_SMC:
- psci_method = "smc";
- break;
- default:
- g_assert_not_reached();
- }
-
- qemu_fdt_add_subnode(fdt, "/psci");
- if (armcpu->psci_version == 2) {
- const char comp[] = "arm,psci-0.2\0arm,psci";
- qemu_fdt_setprop(fdt, "/psci", "compatible", comp, sizeof(comp));
-
- cpu_off_fn = QEMU_PSCI_0_2_FN_CPU_OFF;
- if (arm_feature(&armcpu->env, ARM_FEATURE_AARCH64)) {
- cpu_suspend_fn = QEMU_PSCI_0_2_FN64_CPU_SUSPEND;
- cpu_on_fn = QEMU_PSCI_0_2_FN64_CPU_ON;
- migrate_fn = QEMU_PSCI_0_2_FN64_MIGRATE;
- } else {
- cpu_suspend_fn = QEMU_PSCI_0_2_FN_CPU_SUSPEND;
- cpu_on_fn = QEMU_PSCI_0_2_FN_CPU_ON;
- migrate_fn = QEMU_PSCI_0_2_FN_MIGRATE;
- }
- } else {
- qemu_fdt_setprop_string(fdt, "/psci", "compatible", "arm,psci");
-
- cpu_suspend_fn = QEMU_PSCI_0_1_FN_CPU_SUSPEND;
- cpu_off_fn = QEMU_PSCI_0_1_FN_CPU_OFF;
- cpu_on_fn = QEMU_PSCI_0_1_FN_CPU_ON;
- migrate_fn = QEMU_PSCI_0_1_FN_MIGRATE;
- }
-
- /* We adopt the PSCI spec's nomenclature, and use 'conduit' to refer
- * to the instruction that should be used to invoke PSCI functions.
- * However, the device tree binding uses 'method' instead, so that is
- * what we should use here.
- */
- qemu_fdt_setprop_string(fdt, "/psci", "method", psci_method);
-
- qemu_fdt_setprop_cell(fdt, "/psci", "cpu_suspend", cpu_suspend_fn);
- qemu_fdt_setprop_cell(fdt, "/psci", "cpu_off", cpu_off_fn);
- qemu_fdt_setprop_cell(fdt, "/psci", "cpu_on", cpu_on_fn);
- qemu_fdt_setprop_cell(fdt, "/psci", "migrate", migrate_fn);
-}
-
static void fdt_add_timer_nodes(const VirtMachineState *vms)
{
/* On real hardware these interrupts are level-triggered.
@@ -1409,7 +1349,6 @@ static void machvirt_init(MachineState *machine)
}
fdt_add_timer_nodes(vms);
fdt_add_cpu_nodes(vms);
- fdt_add_psci_node(vms);
memory_region_allocate_system_memory(ram, NULL, "mach-virt.ram",
machine->ram_size);
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 23/30] target/arm: Expand vector registers for SVE
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (21 preceding siblings ...)
2018-02-09 11:03 ` [Qemu-devel] [PULL 22/30] hw/arm: Move virt's PSCI DT fixup code to arm/boot.c Peter Maydell
@ 2018-02-09 11:03 ` Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 24/30] target/arm: Add predicate " Peter Maydell
` (7 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:03 UTC (permalink / raw)
To: qemu-devel
From: Richard Henderson <richard.henderson@linaro.org>
Change vfp.regs as a uint64_t to vfp.zregs as an ARMVectorReg.
The previous patches have made the change in representation
relatively painless.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20180123035349.24538-2-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/cpu.h | 59 +++++++++++++++++++++++++++++++---------------
target/arm/machine.c | 35 ++++++++++++++++++++++++++-
target/arm/translate-a64.c | 8 +++----
target/arm/translate.c | 7 +++---
4 files changed, 81 insertions(+), 28 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 57be0b000b..0e3cd52aa3 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -153,6 +153,42 @@ typedef struct {
uint32_t base_mask;
} TCR;
+/* Define a maximum sized vector register.
+ * For 32-bit, this is a 128-bit NEON/AdvSIMD register.
+ * For 64-bit, this is a 2048-bit SVE register.
+ *
+ * Note that the mapping between S, D, and Q views of the register bank
+ * differs between AArch64 and AArch32.
+ * In AArch32:
+ * Qn = regs[n].d[1]:regs[n].d[0]
+ * Dn = regs[n / 2].d[n & 1]
+ * Sn = regs[n / 4].d[n % 4 / 2],
+ * bits 31..0 for even n, and bits 63..32 for odd n
+ * (and regs[16] to regs[31] are inaccessible)
+ * In AArch64:
+ * Zn = regs[n].d[*]
+ * Qn = regs[n].d[1]:regs[n].d[0]
+ * Dn = regs[n].d[0]
+ * Sn = regs[n].d[0] bits 31..0
+ *
+ * This corresponds to the architecturally defined mapping between
+ * the two execution states, and means we do not need to explicitly
+ * map these registers when changing states.
+ *
+ * Align the data for use with TCG host vector operations.
+ */
+
+#ifdef TARGET_AARCH64
+# define ARM_MAX_VQ 16
+#else
+# define ARM_MAX_VQ 1
+#endif
+
+typedef struct ARMVectorReg {
+ uint64_t d[2 * ARM_MAX_VQ] QEMU_ALIGNED(16);
+} ARMVectorReg;
+
+
typedef struct CPUARMState {
/* Regs for current mode. */
uint32_t regs[16];
@@ -477,22 +513,7 @@ typedef struct CPUARMState {
/* VFP coprocessor state. */
struct {
- /* VFP/Neon register state. Note that the mapping between S, D and Q
- * views of the register bank differs between AArch64 and AArch32:
- * In AArch32:
- * Qn = regs[2n+1]:regs[2n]
- * Dn = regs[n]
- * Sn = regs[n/2] bits 31..0 for even n, and bits 63..32 for odd n
- * (and regs[32] to regs[63] are inaccessible)
- * In AArch64:
- * Qn = regs[2n+1]:regs[2n]
- * Dn = regs[2n]
- * Sn = regs[2n] bits 31..0
- * This corresponds to the architecturally defined mapping between
- * the two execution states, and means we do not need to explicitly
- * map these registers when changing states.
- */
- uint64_t regs[64] QEMU_ALIGNED(16);
+ ARMVectorReg zregs[32];
uint32_t xregs[16];
/* We store these fpcsr fields separately for convenience. */
@@ -2799,7 +2820,7 @@ static inline void *arm_get_el_change_hook_opaque(ARMCPU *cpu)
*/
static inline uint64_t *aa32_vfp_dreg(CPUARMState *env, unsigned regno)
{
- return &env->vfp.regs[regno];
+ return &env->vfp.zregs[regno >> 1].d[regno & 1];
}
/**
@@ -2808,7 +2829,7 @@ static inline uint64_t *aa32_vfp_dreg(CPUARMState *env, unsigned regno)
*/
static inline uint64_t *aa32_vfp_qreg(CPUARMState *env, unsigned regno)
{
- return &env->vfp.regs[2 * regno];
+ return &env->vfp.zregs[regno].d[0];
}
/**
@@ -2817,7 +2838,7 @@ static inline uint64_t *aa32_vfp_qreg(CPUARMState *env, unsigned regno)
*/
static inline uint64_t *aa64_vfp_qreg(CPUARMState *env, unsigned regno)
{
- return &env->vfp.regs[2 * regno];
+ return &env->vfp.zregs[regno].d[0];
}
#endif
diff --git a/target/arm/machine.c b/target/arm/machine.c
index a85c2430d3..cb0e1c92bb 100644
--- a/target/arm/machine.c
+++ b/target/arm/machine.c
@@ -50,7 +50,40 @@ static const VMStateDescription vmstate_vfp = {
.minimum_version_id = 3,
.needed = vfp_needed,
.fields = (VMStateField[]) {
- VMSTATE_UINT64_ARRAY(env.vfp.regs, ARMCPU, 64),
+ /* For compatibility, store Qn out of Zn here. */
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[0].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[1].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[2].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[3].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[4].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[5].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[6].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[7].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[8].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[9].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[10].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[11].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[12].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[13].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[14].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[15].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[16].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[17].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[18].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[19].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[20].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[21].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[22].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[23].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[24].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[25].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[26].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[27].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[28].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[29].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[30].d, ARMCPU, 0, 2),
+ VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[31].d, ARMCPU, 0, 2),
+
/* The xregs array is a little awkward because element 1 (FPSCR)
* requires a specific accessor, so we have to split it up in
* the vmstate:
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 62ece804e2..352a79bad1 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -525,8 +525,8 @@ static inline int vec_reg_offset(DisasContext *s, int regno,
{
int offs = 0;
#ifdef HOST_WORDS_BIGENDIAN
- /* This is complicated slightly because vfp.regs[2n] is
- * still the low half and vfp.regs[2n+1] the high half
+ /* This is complicated slightly because vfp.zregs[n].d[0] is
+ * still the low half and vfp.zregs[n].d[1] the high half
* of the 128 bit vector, even on big endian systems.
* Calculate the offset assuming a fully bigendian 128 bits,
* then XOR to account for the order of the two 64 bit halves.
@@ -536,7 +536,7 @@ static inline int vec_reg_offset(DisasContext *s, int regno,
#else
offs += element * (1 << size);
#endif
- offs += offsetof(CPUARMState, vfp.regs[regno * 2]);
+ offs += offsetof(CPUARMState, vfp.zregs[regno]);
assert_fp_access_checked(s);
return offs;
}
@@ -545,7 +545,7 @@ static inline int vec_reg_offset(DisasContext *s, int regno,
static inline int vec_full_reg_offset(DisasContext *s, int regno)
{
assert_fp_access_checked(s);
- return offsetof(CPUARMState, vfp.regs[regno * 2]);
+ return offsetof(CPUARMState, vfp.zregs[regno]);
}
/* Return a newly allocated pointer to the vector register. */
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 55826b7e5a..a8c13d3758 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -1512,13 +1512,12 @@ static inline void gen_vfp_st(DisasContext *s, int dp, TCGv_i32 addr)
}
}
-static inline long
-vfp_reg_offset (int dp, int reg)
+static inline long vfp_reg_offset(bool dp, unsigned reg)
{
if (dp) {
- return offsetof(CPUARMState, vfp.regs[reg]);
+ return offsetof(CPUARMState, vfp.zregs[reg >> 1].d[reg & 1]);
} else {
- long ofs = offsetof(CPUARMState, vfp.regs[reg >> 1]);
+ long ofs = offsetof(CPUARMState, vfp.zregs[reg >> 2].d[(reg >> 1) & 1]);
if (reg & 1) {
ofs += offsetof(CPU_DoubleU, l.upper);
} else {
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 24/30] target/arm: Add predicate registers for SVE
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (22 preceding siblings ...)
2018-02-09 11:03 ` [Qemu-devel] [PULL 23/30] target/arm: Expand vector registers for SVE Peter Maydell
@ 2018-02-09 11:03 ` Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 25/30] target/arm: Add SVE to migration state Peter Maydell
` (6 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:03 UTC (permalink / raw)
To: qemu-devel
From: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20180123035349.24538-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/cpu.h | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 0e3cd52aa3..966d2fdbb1 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -188,6 +188,13 @@ typedef struct ARMVectorReg {
uint64_t d[2 * ARM_MAX_VQ] QEMU_ALIGNED(16);
} ARMVectorReg;
+/* In AArch32 mode, predicate registers do not exist at all. */
+#ifdef TARGET_AARCH64
+typedef struct ARMPredicateReg {
+ uint64_t p[2 * ARM_MAX_VQ / 8] QEMU_ALIGNED(16);
+} ARMPredicateReg;
+#endif
+
typedef struct CPUARMState {
/* Regs for current mode. */
@@ -515,6 +522,11 @@ typedef struct CPUARMState {
struct {
ARMVectorReg zregs[32];
+#ifdef TARGET_AARCH64
+ /* Store FFR as pregs[16] to make it easier to treat as any other. */
+ ARMPredicateReg pregs[17];
+#endif
+
uint32_t xregs[16];
/* We store these fpcsr fields separately for convenience. */
int vec_len;
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 25/30] target/arm: Add SVE to migration state
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (23 preceding siblings ...)
2018-02-09 11:03 ` [Qemu-devel] [PULL 24/30] target/arm: Add predicate " Peter Maydell
@ 2018-02-09 11:03 ` Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 26/30] target/arm: Add ZCR_ELx Peter Maydell
` (5 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:03 UTC (permalink / raw)
To: qemu-devel
From: Richard Henderson <richard.henderson@linaro.org>
Save the high parts of the Zregs and all of the Pregs.
The ZCR_ELx registers are migrated via the CP mechanism.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20180123035349.24538-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/machine.c | 53 ++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 53 insertions(+)
diff --git a/target/arm/machine.c b/target/arm/machine.c
index cb0e1c92bb..2c8b43062f 100644
--- a/target/arm/machine.c
+++ b/target/arm/machine.c
@@ -122,6 +122,56 @@ static const VMStateDescription vmstate_iwmmxt = {
}
};
+#ifdef TARGET_AARCH64
+/* The expression ARM_MAX_VQ - 2 is 0 for pure AArch32 build,
+ * and ARMPredicateReg is actively empty. This triggers errors
+ * in the expansion of the VMSTATE macros.
+ */
+
+static bool sve_needed(void *opaque)
+{
+ ARMCPU *cpu = opaque;
+ CPUARMState *env = &cpu->env;
+
+ return arm_feature(env, ARM_FEATURE_SVE);
+}
+
+/* The first two words of each Zreg is stored in VFP state. */
+static const VMStateDescription vmstate_zreg_hi_reg = {
+ .name = "cpu/sve/zreg_hi",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT64_SUB_ARRAY(d, ARMVectorReg, 2, ARM_MAX_VQ - 2),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static const VMStateDescription vmstate_preg_reg = {
+ .name = "cpu/sve/preg",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT64_ARRAY(p, ARMPredicateReg, 2 * ARM_MAX_VQ / 8),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static const VMStateDescription vmstate_sve = {
+ .name = "cpu/sve",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .needed = sve_needed,
+ .fields = (VMStateField[]) {
+ VMSTATE_STRUCT_ARRAY(env.vfp.zregs, ARMCPU, 32, 0,
+ vmstate_zreg_hi_reg, ARMVectorReg),
+ VMSTATE_STRUCT_ARRAY(env.vfp.pregs, ARMCPU, 17, 0,
+ vmstate_preg_reg, ARMPredicateReg),
+ VMSTATE_END_OF_LIST()
+ }
+};
+#endif /* AARCH64 */
+
static bool m_needed(void *opaque)
{
ARMCPU *cpu = opaque;
@@ -586,6 +636,9 @@ const VMStateDescription vmstate_arm_cpu = {
&vmstate_pmsav7,
&vmstate_pmsav8,
&vmstate_m_security,
+#ifdef TARGET_AARCH64
+ &vmstate_sve,
+#endif
NULL
}
};
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 26/30] target/arm: Add ZCR_ELx
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (24 preceding siblings ...)
2018-02-09 11:03 ` [Qemu-devel] [PULL 25/30] target/arm: Add SVE to migration state Peter Maydell
@ 2018-02-09 11:03 ` Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 27/30] target/arm: Add SVE state to TB->FLAGS Peter Maydell
` (4 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:03 UTC (permalink / raw)
To: qemu-devel
From: Richard Henderson <richard.henderson@linaro.org>
Define ZCR_EL[1-3].
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20180123035349.24538-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/cpu.h | 5 ++
target/arm/helper.c | 131 ++++++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 136 insertions(+)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 966d2fdbb1..1b2ff0f3ce 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -549,6 +549,9 @@ typedef struct CPUARMState {
*/
float_status fp_status;
float_status standard_fp_status;
+
+ /* ZCR_EL[1-3] */
+ uint64_t zcr_el[4];
} vfp;
uint64_t exclusive_addr;
uint64_t exclusive_val;
@@ -923,6 +926,8 @@ void pmccntr_sync(CPUARMState *env);
#define CPTR_TCPAC (1U << 31)
#define CPTR_TTA (1U << 20)
#define CPTR_TFP (1U << 10)
+#define CPTR_TZ (1U << 8) /* CPTR_EL2 */
+#define CPTR_EZ (1U << 8) /* CPTR_EL3 */
#define MDCR_EPMAD (1U << 21)
#define MDCR_EDAD (1U << 20)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index c6e3b3913e..673c476455 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -4266,6 +4266,125 @@ static const ARMCPRegInfo debug_lpae_cp_reginfo[] = {
REGINFO_SENTINEL
};
+/* Return the exception level to which SVE-disabled exceptions should
+ * be taken, or 0 if SVE is enabled.
+ */
+static int sve_exception_el(CPUARMState *env)
+{
+#ifndef CONFIG_USER_ONLY
+ unsigned current_el = arm_current_el(env);
+
+ /* The CPACR.ZEN controls traps to EL1:
+ * 0, 2 : trap EL0 and EL1 accesses
+ * 1 : trap only EL0 accesses
+ * 3 : trap no accesses
+ */
+ switch (extract32(env->cp15.cpacr_el1, 16, 2)) {
+ default:
+ if (current_el <= 1) {
+ /* Trap to PL1, which might be EL1 or EL3 */
+ if (arm_is_secure(env) && !arm_el_is_aa64(env, 3)) {
+ return 3;
+ }
+ return 1;
+ }
+ break;
+ case 1:
+ if (current_el == 0) {
+ return 1;
+ }
+ break;
+ case 3:
+ break;
+ }
+
+ /* Similarly for CPACR.FPEN, after having checked ZEN. */
+ switch (extract32(env->cp15.cpacr_el1, 20, 2)) {
+ default:
+ if (current_el <= 1) {
+ if (arm_is_secure(env) && !arm_el_is_aa64(env, 3)) {
+ return 3;
+ }
+ return 1;
+ }
+ break;
+ case 1:
+ if (current_el == 0) {
+ return 1;
+ }
+ break;
+ case 3:
+ break;
+ }
+
+ /* CPTR_EL2. Check both TZ and TFP. */
+ if (current_el <= 2
+ && (env->cp15.cptr_el[2] & (CPTR_TFP | CPTR_TZ))
+ && !arm_is_secure_below_el3(env)) {
+ return 2;
+ }
+
+ /* CPTR_EL3. Check both EZ and TFP. */
+ if (!(env->cp15.cptr_el[3] & CPTR_EZ)
+ || (env->cp15.cptr_el[3] & CPTR_TFP)) {
+ return 3;
+ }
+#endif
+ return 0;
+}
+
+static CPAccessResult zcr_access(CPUARMState *env, const ARMCPRegInfo *ri,
+ bool isread)
+{
+ switch (sve_exception_el(env)) {
+ case 3:
+ return CP_ACCESS_TRAP_EL3;
+ case 2:
+ return CP_ACCESS_TRAP_EL2;
+ case 1:
+ return CP_ACCESS_TRAP;
+ }
+ return CP_ACCESS_OK;
+}
+
+static void zcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
+ uint64_t value)
+{
+ /* Bits other than [3:0] are RAZ/WI. */
+ raw_write(env, ri, value & 0xf);
+}
+
+static const ARMCPRegInfo zcr_el1_reginfo = {
+ .name = "ZCR_EL1", .state = ARM_CP_STATE_AA64,
+ .opc0 = 3, .opc1 = 0, .crn = 1, .crm = 2, .opc2 = 0,
+ .access = PL1_RW, .accessfn = zcr_access, .type = ARM_CP_64BIT,
+ .fieldoffset = offsetof(CPUARMState, vfp.zcr_el[1]),
+ .writefn = zcr_write, .raw_writefn = raw_write
+};
+
+static const ARMCPRegInfo zcr_el2_reginfo = {
+ .name = "ZCR_EL2", .state = ARM_CP_STATE_AA64,
+ .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 2, .opc2 = 0,
+ .access = PL2_RW, .accessfn = zcr_access, .type = ARM_CP_64BIT,
+ .fieldoffset = offsetof(CPUARMState, vfp.zcr_el[2]),
+ .writefn = zcr_write, .raw_writefn = raw_write
+};
+
+static const ARMCPRegInfo zcr_no_el2_reginfo = {
+ .name = "ZCR_EL2", .state = ARM_CP_STATE_AA64,
+ .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 2, .opc2 = 0,
+ .access = PL2_RW, .type = ARM_CP_64BIT,
+ .readfn = arm_cp_read_zero, .writefn = arm_cp_write_ignore
+};
+
+static const ARMCPRegInfo zcr_el3_reginfo = {
+ .name = "ZCR_EL3", .state = ARM_CP_STATE_AA64,
+ .opc0 = 3, .opc1 = 6, .crn = 1, .crm = 2, .opc2 = 0,
+ .access = PL3_RW, .accessfn = zcr_access, .type = ARM_CP_64BIT,
+ .fieldoffset = offsetof(CPUARMState, vfp.zcr_el[3]),
+ .writefn = zcr_write, .raw_writefn = raw_write
+};
+
void hw_watchpoint_update(ARMCPU *cpu, int n)
{
CPUARMState *env = &cpu->env;
@@ -5332,6 +5451,18 @@ void register_cp_regs_for_features(ARMCPU *cpu)
}
define_one_arm_cp_reg(cpu, &sctlr);
}
+
+ if (arm_feature(env, ARM_FEATURE_SVE)) {
+ define_one_arm_cp_reg(cpu, &zcr_el1_reginfo);
+ if (arm_feature(env, ARM_FEATURE_EL2)) {
+ define_one_arm_cp_reg(cpu, &zcr_el2_reginfo);
+ } else {
+ define_one_arm_cp_reg(cpu, &zcr_no_el2_reginfo);
+ }
+ if (arm_feature(env, ARM_FEATURE_EL3)) {
+ define_one_arm_cp_reg(cpu, &zcr_el3_reginfo);
+ }
+ }
}
void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 27/30] target/arm: Add SVE state to TB->FLAGS
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (25 preceding siblings ...)
2018-02-09 11:03 ` [Qemu-devel] [PULL 26/30] target/arm: Add ZCR_ELx Peter Maydell
@ 2018-02-09 11:03 ` Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 28/30] target/arm/kvm: gic: Prevent creating userspace GICv3 with KVM Peter Maydell
` (3 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:03 UTC (permalink / raw)
To: qemu-devel
From: Richard Henderson <richard.henderson@linaro.org>
Add both SVE exception state and vector length.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20180123035349.24538-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/cpu.h | 8 ++++++++
target/arm/translate.h | 2 ++
target/arm/helper.c | 25 ++++++++++++++++++++++++-
target/arm/translate-a64.c | 2 ++
4 files changed, 36 insertions(+), 1 deletion(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 1b2ff0f3ce..521444a5a1 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2678,6 +2678,10 @@ static inline bool arm_cpu_data_is_big_endian(CPUARMState *env)
#define ARM_TBFLAG_TBI0_MASK (0x1ull << ARM_TBFLAG_TBI0_SHIFT)
#define ARM_TBFLAG_TBI1_SHIFT 1 /* TBI1 for EL0/1 */
#define ARM_TBFLAG_TBI1_MASK (0x1ull << ARM_TBFLAG_TBI1_SHIFT)
+#define ARM_TBFLAG_SVEEXC_EL_SHIFT 2
+#define ARM_TBFLAG_SVEEXC_EL_MASK (0x3 << ARM_TBFLAG_SVEEXC_EL_SHIFT)
+#define ARM_TBFLAG_ZCR_LEN_SHIFT 4
+#define ARM_TBFLAG_ZCR_LEN_MASK (0xf << ARM_TBFLAG_ZCR_LEN_SHIFT)
/* some convenience accessor macros */
#define ARM_TBFLAG_AARCH64_STATE(F) \
@@ -2714,6 +2718,10 @@ static inline bool arm_cpu_data_is_big_endian(CPUARMState *env)
(((F) & ARM_TBFLAG_TBI0_MASK) >> ARM_TBFLAG_TBI0_SHIFT)
#define ARM_TBFLAG_TBI1(F) \
(((F) & ARM_TBFLAG_TBI1_MASK) >> ARM_TBFLAG_TBI1_SHIFT)
+#define ARM_TBFLAG_SVEEXC_EL(F) \
+ (((F) & ARM_TBFLAG_SVEEXC_EL_MASK) >> ARM_TBFLAG_SVEEXC_EL_SHIFT)
+#define ARM_TBFLAG_ZCR_LEN(F) \
+ (((F) & ARM_TBFLAG_ZCR_LEN_MASK) >> ARM_TBFLAG_ZCR_LEN_SHIFT)
static inline bool bswap_code(bool sctlr_b)
{
diff --git a/target/arm/translate.h b/target/arm/translate.h
index 3f4df91e5e..c47febf99d 100644
--- a/target/arm/translate.h
+++ b/target/arm/translate.h
@@ -29,6 +29,8 @@ typedef struct DisasContext {
bool tbi1; /* TBI1 for EL0/1, not used for EL2/3 */
bool ns; /* Use non-secure CPREG bank on access */
int fp_excp_el; /* FP exception EL or 0 if enabled */
+ int sve_excp_el; /* SVE exception EL or 0 if enabled */
+ int sve_len; /* SVE vector length in bytes */
/* Flag indicating that exceptions from secure mode are routed to EL3. */
bool secure_routed_to_el3;
bool vfp_enabled; /* FP enabled via FPSCR.EN */
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 673c476455..180ab75458 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -12059,14 +12059,37 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
target_ulong *cs_base, uint32_t *pflags)
{
ARMMMUIdx mmu_idx = core_to_arm_mmu_idx(env, cpu_mmu_index(env, false));
+ int fp_el = fp_exception_el(env);
uint32_t flags;
if (is_a64(env)) {
+ int sve_el = sve_exception_el(env);
+ uint32_t zcr_len;
+
*pc = env->pc;
flags = ARM_TBFLAG_AARCH64_STATE_MASK;
/* Get control bits for tagged addresses */
flags |= (arm_regime_tbi0(env, mmu_idx) << ARM_TBFLAG_TBI0_SHIFT);
flags |= (arm_regime_tbi1(env, mmu_idx) << ARM_TBFLAG_TBI1_SHIFT);
+ flags |= sve_el << ARM_TBFLAG_SVEEXC_EL_SHIFT;
+
+ /* If SVE is disabled, but FP is enabled,
+ then the effective len is 0. */
+ if (sve_el != 0 && fp_el == 0) {
+ zcr_len = 0;
+ } else {
+ int current_el = arm_current_el(env);
+
+ zcr_len = env->vfp.zcr_el[current_el <= 1 ? 1 : current_el];
+ zcr_len &= 0xf;
+ if (current_el < 2 && arm_feature(env, ARM_FEATURE_EL2)) {
+ zcr_len = MIN(zcr_len, 0xf & (uint32_t)env->vfp.zcr_el[2]);
+ }
+ if (current_el < 3 && arm_feature(env, ARM_FEATURE_EL3)) {
+ zcr_len = MIN(zcr_len, 0xf & (uint32_t)env->vfp.zcr_el[3]);
+ }
+ }
+ flags |= zcr_len << ARM_TBFLAG_ZCR_LEN_SHIFT;
} else {
*pc = env->regs[15];
flags = (env->thumb << ARM_TBFLAG_THUMB_SHIFT)
@@ -12109,7 +12132,7 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
if (arm_cpu_data_is_big_endian(env)) {
flags |= ARM_TBFLAG_BE_DATA_MASK;
}
- flags |= fp_exception_el(env) << ARM_TBFLAG_FPEXC_EL_SHIFT;
+ flags |= fp_el << ARM_TBFLAG_FPEXC_EL_SHIFT;
if (arm_v7m_is_handler_mode(env)) {
flags |= ARM_TBFLAG_HANDLER_MASK;
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 352a79bad1..fb1a4cb532 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -12058,6 +12058,8 @@ static int aarch64_tr_init_disas_context(DisasContextBase *dcbase,
dc->user = (dc->current_el == 0);
#endif
dc->fp_excp_el = ARM_TBFLAG_FPEXC_EL(dc->base.tb->flags);
+ dc->sve_excp_el = ARM_TBFLAG_SVEEXC_EL(dc->base.tb->flags);
+ dc->sve_len = (ARM_TBFLAG_ZCR_LEN(dc->base.tb->flags) + 1) * 16;
dc->vec_len = 0;
dc->vec_stride = 0;
dc->cp_regs = arm_cpu->cp_regs;
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 28/30] target/arm/kvm: gic: Prevent creating userspace GICv3 with KVM
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (26 preceding siblings ...)
2018-02-09 11:03 ` [Qemu-devel] [PULL 27/30] target/arm: Add SVE state to TB->FLAGS Peter Maydell
@ 2018-02-09 11:03 ` Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 29/30] target/arm/translate.c: Fix missing 'break' for TT insns Peter Maydell
` (2 subsequent siblings)
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:03 UTC (permalink / raw)
To: qemu-devel
From: Christoffer Dall <christoffer.dall@linaro.org>
KVM doesn't support emulating a GICv3 in userspace, only GICv2. We
currently attempt this anyway, and as a result a KVM guest doesn't
receive interrupts and the user is left wondering why. Report an error
to the user if this particular combination is requested.
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20180201205307.30343-1-christoffer.dall@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/kvm_arm.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h
index ff53e9fafb..cfb7e5af72 100644
--- a/target/arm/kvm_arm.h
+++ b/target/arm/kvm_arm.h
@@ -234,6 +234,10 @@ static inline const char *gicv3_class_name(void)
exit(1);
#endif
} else {
+ if (kvm_enabled()) {
+ error_report("Userspace GICv3 is not supported with KVM");
+ exit(1);
+ }
return "arm-gicv3";
}
}
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 29/30] target/arm/translate.c: Fix missing 'break' for TT insns
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (27 preceding siblings ...)
2018-02-09 11:03 ` [Qemu-devel] [PULL 28/30] target/arm/kvm: gic: Prevent creating userspace GICv3 with KVM Peter Maydell
@ 2018-02-09 11:03 ` Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 30/30] hw/core/generic-loader: Allow PC to be set on command line Peter Maydell
2018-02-09 14:38 ` [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:03 UTC (permalink / raw)
To: qemu-devel
The code where we added the TT instruction was accidentally
missing a 'break', which meant that after generating the code
to execute the TT we would fall through to 'goto illegal_op'
and generate code to take an UNDEF insn.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20180206103941.13985-1-peter.maydell@linaro.org
---
target/arm/translate.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index a8c13d3758..1270022289 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -9925,6 +9925,7 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn)
tcg_temp_free_i32(addr);
tcg_temp_free_i32(op);
store_reg(s, rd, ttresp);
+ break;
}
goto illegal_op;
}
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 30/30] hw/core/generic-loader: Allow PC to be set on command line
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (28 preceding siblings ...)
2018-02-09 11:03 ` [Qemu-devel] [PULL 29/30] target/arm/translate.c: Fix missing 'break' for TT insns Peter Maydell
@ 2018-02-09 11:03 ` Peter Maydell
2018-02-09 14:38 ` [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 11:03 UTC (permalink / raw)
To: qemu-devel
The documentation for the generic loader claims that you can
set the PC for a CPU with an option of the form
-device loader,cpu-num=0,addr=0x10000004
However if you try this QEMU complains:
cpu_num must be specified when setting a program counter
This is because we were testing against 0 rather than CPU_NONE.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20180205150426.20542-1-peter.maydell@linaro.org
---
hw/core/generic-loader.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/core/generic-loader.c b/hw/core/generic-loader.c
index 46012673c3..cb0e68486d 100644
--- a/hw/core/generic-loader.c
+++ b/hw/core/generic-loader.c
@@ -105,7 +105,7 @@ static void generic_loader_realize(DeviceState *dev, Error **errp)
error_setg(errp, "data can not be specified when setting a "
"program counter");
return;
- } else if (!s->cpu_num) {
+ } else if (s->cpu_num == CPU_NONE) {
error_setg(errp, "cpu_num must be specified when setting a "
"program counter");
return;
--
2.16.1
^ permalink raw reply related [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PULL 00/30] target-arm queue
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (29 preceding siblings ...)
2018-02-09 11:03 ` [Qemu-devel] [PULL 30/30] hw/core/generic-loader: Allow PC to be set on command line Peter Maydell
@ 2018-02-09 14:38 ` Peter Maydell
30 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-02-09 14:38 UTC (permalink / raw)
To: QEMU Developers
On 9 February 2018 at 11:02, Peter Maydell <peter.maydell@linaro.org> wrote:
> Another lump of target-arm patches. I still have some patches in
> my to-review queue, but this is a big enough set that I wanted
> to send it out.
>
> thanks
> -- PMM
>
> The following changes since commit 04bb7fe2bf55bdf66d5b7a5a719b40bbb4048178:
>
> Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20180208' into staging (2018-02-08 17:41:15 +0000)
>
> are available in the Git repository at:
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20180209
>
> for you to fetch changes up to bbba7757bacc9f890a3f028d328b4b429dbe78ec:
>
> hw/core/generic-loader: Allow PC to be set on command line (2018-02-09 10:55:40 +0000)
>
Applied, thanks.
-- PMM
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PULL, 22/30] hw/arm: Move virt's PSCI DT fixup code to arm/boot.c
2018-02-09 11:03 ` [Qemu-devel] [PULL 22/30] hw/arm: Move virt's PSCI DT fixup code to arm/boot.c Peter Maydell
@ 2018-03-27 14:22 ` Marc Zyngier
0 siblings, 0 replies; 43+ messages in thread
From: Marc Zyngier @ 2018-03-27 14:22 UTC (permalink / raw)
To: Peter Maydell, Andrey Smirnov
Cc: Jason Wang, Philippe Mathieu-Daudé, Marcel Apfelbaum,
Michael S. Tsirkin, qemu-devel, qemu-arm, yurovsky
On Fri, 09 Feb 2018 11:03:06 +0000,
Peter Maydell wrote:
Hi Peter, Andrey,
>
> From: Andrey Smirnov <andrew.smirnov@gmail.com>
>
> Move virt's PSCI DT fixup code to arm/boot.c and set this fixup to
> happen automatically for every board that doesn't mark "psci-conduit"
> as disabled. This way emulated boards other than "virt" that rely on
> PSIC for SMP could benefit from that code.
>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: Jason Wang <jasowang@redhat.com>
> Cc: Philippe Mathieu-Daudé <f4bug@amsat.org>
> Cc: Marcel Apfelbaum <marcel.apfelbaum@zoho.com>
> Cc: Michael S. Tsirkin <mst@redhat.com>
> Cc: qemu-devel@nongnu.org
> Cc: qemu-arm@nongnu.org
> Cc: yurovsky@gmail.com
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> hw/arm/boot.c | 65 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> hw/arm/virt.c | 61 -------------------------------------------------------
> 2 files changed, 65 insertions(+), 61 deletions(-)
>
> diff --git a/hw/arm/boot.c b/hw/arm/boot.c
> index bb244ec359..9b174b982c 100644
> --- a/hw/arm/boot.c
> +++ b/hw/arm/boot.c
> @@ -385,6 +385,69 @@ static void set_kernel_args_old(const struct arm_boot_info *info)
> }
> }
>
> +static void fdt_add_psci_node(void *fdt)
> +{
> + uint32_t cpu_suspend_fn;
> + uint32_t cpu_off_fn;
> + uint32_t cpu_on_fn;
> + uint32_t migrate_fn;
> + ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(0));
> + const char *psci_method;
> + int64_t psci_conduit;
> +
> + psci_conduit = object_property_get_int(OBJECT(armcpu),
> + "psci-conduit",
> + &error_abort);
> + switch (psci_conduit) {
> + case QEMU_PSCI_CONDUIT_DISABLED:
> + return;
> + case QEMU_PSCI_CONDUIT_HVC:
> + psci_method = "hvc";
> + break;
> + case QEMU_PSCI_CONDUIT_SMC:
> + psci_method = "smc";
> + break;
> + default:
> + g_assert_not_reached();
> + }
> +
> + qemu_fdt_add_subnode(fdt, "/psci");
> + if (armcpu->psci_version == 2) {
> + const char comp[] = "arm,psci-0.2\0arm,psci";
> + qemu_fdt_setprop(fdt, "/psci", "compatible", comp, sizeof(comp));
> +
> + cpu_off_fn = QEMU_PSCI_0_2_FN_CPU_OFF;
> + if (arm_feature(&armcpu->env, ARM_FEATURE_AARCH64)) {
> + cpu_suspend_fn = QEMU_PSCI_0_2_FN64_CPU_SUSPEND;
> + cpu_on_fn = QEMU_PSCI_0_2_FN64_CPU_ON;
> + migrate_fn = QEMU_PSCI_0_2_FN64_MIGRATE;
> + } else {
> + cpu_suspend_fn = QEMU_PSCI_0_2_FN_CPU_SUSPEND;
> + cpu_on_fn = QEMU_PSCI_0_2_FN_CPU_ON;
> + migrate_fn = QEMU_PSCI_0_2_FN_MIGRATE;
> + }
> + } else {
> + qemu_fdt_setprop_string(fdt, "/psci", "compatible", "arm,psci");
> +
> + cpu_suspend_fn = QEMU_PSCI_0_1_FN_CPU_SUSPEND;
> + cpu_off_fn = QEMU_PSCI_0_1_FN_CPU_OFF;
> + cpu_on_fn = QEMU_PSCI_0_1_FN_CPU_ON;
> + migrate_fn = QEMU_PSCI_0_1_FN_MIGRATE;
> + }
> +
> + /* We adopt the PSCI spec's nomenclature, and use 'conduit' to refer
> + * to the instruction that should be used to invoke PSCI functions.
> + * However, the device tree binding uses 'method' instead, so that is
> + * what we should use here.
> + */
> + qemu_fdt_setprop_string(fdt, "/psci", "method", psci_method);
> +
> + qemu_fdt_setprop_cell(fdt, "/psci", "cpu_suspend", cpu_suspend_fn);
> + qemu_fdt_setprop_cell(fdt, "/psci", "cpu_off", cpu_off_fn);
> + qemu_fdt_setprop_cell(fdt, "/psci", "cpu_on", cpu_on_fn);
> + qemu_fdt_setprop_cell(fdt, "/psci", "migrate", migrate_fn);
> +}
> +
> /**
> * load_dtb() - load a device tree binary image into memory
> * @addr: the address to load the image at
> @@ -541,6 +604,8 @@ static int load_dtb(hwaddr addr, const struct arm_boot_info *binfo,
> }
> }
>
> + fdt_add_psci_node(fdt);
> +
This particular change broke one of my favourite use cases, which is
to feed the guest with a hand-crafted DTB, and expect QEMU to just
take it as granted, and not touch it.
I now get an error:
qemu-system-aarch64: FDT: Failed to create subnode /psci: FDT_ERR_EXISTS
The obvious workaround would be to test the presence of the /psci node
before generating it (such as done for the /chosen node, for example).
Thanks,
M.
--
Jazz is not dead, it just smell funny.
^ permalink raw reply [flat|nested] 43+ messages in thread
* [Qemu-devel] [PULL 00/30] target-arm queue
@ 2018-08-16 13:34 Peter Maydell
2018-08-16 16:18 ` Peter Maydell
0 siblings, 1 reply; 43+ messages in thread
From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw)
To: qemu-devel
Less than a day of post-3.0 code review and already enough
patches for another pullreq :-)
thanks
-- PMM
The following changes since commit c542a9f9794ec8e0bc3fcf5956d3cc8bce667789:
Merge remote-tracking branch 'remotes/armbru/tags/pull-tests-2018-08-16' into staging (2018-08-16 09:50:54 +0100)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20180816
for you to fetch changes up to fcf13ca556f462b52956059bf8fa622bc8575edb:
hw/arm/mps2-tz: Replace init_sysbus_child() with sysbus_init_child_obj() (2018-08-16 14:29:58 +0100)
----------------------------------------------------------------
target-arm queue:
* Fixes for various bugs in SVE instructions
* Add model of Freescale i.MX6 UltraLite 14x14 EVK Board
* hw/arm: make bitbanded IO optional on ARMv7-M
* Add model of Cortex-M0 CPU
* Add support for loading Intel HEX files to the generic loader
* imx_spi: Unset XCH when TX FIFO becomes empty
* aspeed_sdmc: fix various bugs
* Fix bugs in Arm FP16 instruction support
* Fix aa64 FCADD and FCMLA decode
* softfloat: Fix missing inexact for floating-point add
* hw/arm/mps2-tz: Replace init_sysbus_child() with sysbus_init_child_obj()
----------------------------------------------------------------
Cédric Le Goater (1):
aspeed: add a max_ram_size property to the memory controller
Jean-Christophe Dubois (3):
i.MX6UL: Add i.MX6UL specific CCM device
i.MX6UL: Add i.MX6UL SOC
i.MX6UL: Add Freescale i.MX6 UltraLite 14x14 EVK Board
Joel Stanley (5):
aspeed_sdmc: Extend number of valid registers
aspeed_sdmc: Fix saved values
aspeed_sdmc: Set 'cache initial sequence' always true
aspeed_sdmc: Init status always idle
aspeed_sdmc: Handle ECC training
Richard Henderson (13):
target/arm: Fix typo in helper_sve_ld1hss_r
target/arm: Fix sign-extension in sve do_ldr/do_str
target/arm: Fix offset for LD1R instructions
target/arm: Fix offset scaling for LD_zprr and ST_zprr
target/arm: Reformat integer register dump
target/arm: Dump SVE state if enabled
target/arm: Add sve-max-vq cpu property to -cpu max
target/arm: Adjust FPCR_MASK for FZ16
target/arm: Ignore float_flag_input_denormal from fp_status_f16
target/arm: Use fp_status_fp16 for do_fmpa_zpzzz_h
target/arm: Use FZ not FZ16 for SVE FCVT single-half and double-half
target/arm: Fix aa64 FCADD and FCMLA decode
softfloat: Fix missing inexact for floating-point add
Stefan Hajnoczi (4):
hw/arm: make bitbanded IO optional on ARMv7-M
target/arm: add "cortex-m0" CPU model
loader: extract rom_free() function
loader: add rom transaction API
Su Hang (2):
loader: Implement .hex file loader
Add QTest testcase for the Intel Hexadecimal
Thomas Huth (1):
hw/arm/mps2-tz: Replace init_sysbus_child() with sysbus_init_child_obj()
Trent Piepho (1):
imx_spi: Unset XCH when TX FIFO becomes empty
configure | 4 +
hw/arm/Makefile.objs | 1 +
hw/misc/Makefile.objs | 1 +
tests/Makefile.include | 2 +
include/hw/arm/armv7m.h | 2 +
include/hw/arm/fsl-imx6ul.h | 339 ++++++++++++++
include/hw/loader.h | 31 ++
include/hw/misc/aspeed_sdmc.h | 4 +-
include/hw/misc/imx6ul_ccm.h | 226 +++++++++
target/arm/cpu.h | 5 +-
fpu/softfloat.c | 2 +-
hw/arm/armv7m.c | 37 +-
hw/arm/aspeed.c | 31 ++
hw/arm/aspeed_soc.c | 2 +
hw/arm/fsl-imx6ul.c | 617 ++++++++++++++++++++++++
hw/arm/mcimx6ul-evk.c | 85 ++++
hw/arm/mps2-tz.c | 32 +-
hw/arm/mps2.c | 1 +
hw/arm/msf2-soc.c | 1 +
hw/arm/stellaris.c | 1 +
hw/arm/stm32f205_soc.c | 1 +
hw/core/generic-loader.c | 4 +
hw/core/loader.c | 302 +++++++++++-
hw/misc/aspeed_sdmc.c | 55 ++-
hw/misc/imx6ul_ccm.c | 886 +++++++++++++++++++++++++++++++++++
hw/ssi/imx_spi.c | 3 +-
linux-user/syscall.c | 19 +-
target/arm/cpu.c | 17 +-
target/arm/cpu64.c | 29 ++
target/arm/helper.c | 18 +-
target/arm/sve_helper.c | 4 +-
target/arm/translate-a64.c | 120 ++++-
target/arm/translate-sve.c | 30 +-
tests/hexloader-test.c | 45 ++
MAINTAINERS | 6 +
default-configs/arm-softmmu.mak | 1 +
hw/misc/trace-events | 7 +
tests/hex-loader-check-data/test.hex | 18 +
38 files changed, 2863 insertions(+), 126 deletions(-)
create mode 100644 include/hw/arm/fsl-imx6ul.h
create mode 100644 include/hw/misc/imx6ul_ccm.h
create mode 100644 hw/arm/fsl-imx6ul.c
create mode 100644 hw/arm/mcimx6ul-evk.c
create mode 100644 hw/misc/imx6ul_ccm.c
create mode 100644 tests/hexloader-test.c
create mode 100644 tests/hex-loader-check-data/test.hex
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PULL 00/30] target-arm queue
2018-08-16 13:34 Peter Maydell
@ 2018-08-16 16:18 ` Peter Maydell
0 siblings, 0 replies; 43+ messages in thread
From: Peter Maydell @ 2018-08-16 16:18 UTC (permalink / raw)
To: QEMU Developers
On 16 August 2018 at 14:34, Peter Maydell <peter.maydell@linaro.org> wrote:
> Less than a day of post-3.0 code review and already enough
> patches for another pullreq :-)
>
> thanks
> -- PMM
>
> The following changes since commit c542a9f9794ec8e0bc3fcf5956d3cc8bce667789:
>
> Merge remote-tracking branch 'remotes/armbru/tags/pull-tests-2018-08-16' into staging (2018-08-16 09:50:54 +0100)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20180816
>
> for you to fetch changes up to fcf13ca556f462b52956059bf8fa622bc8575edb:
>
> hw/arm/mps2-tz: Replace init_sysbus_child() with sysbus_init_child_obj() (2018-08-16 14:29:58 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
> * Fixes for various bugs in SVE instructions
> * Add model of Freescale i.MX6 UltraLite 14x14 EVK Board
> * hw/arm: make bitbanded IO optional on ARMv7-M
> * Add model of Cortex-M0 CPU
> * Add support for loading Intel HEX files to the generic loader
> * imx_spi: Unset XCH when TX FIFO becomes empty
> * aspeed_sdmc: fix various bugs
> * Fix bugs in Arm FP16 instruction support
> * Fix aa64 FCADD and FCMLA decode
> * softfloat: Fix missing inexact for floating-point add
> * hw/arm/mps2-tz: Replace init_sysbus_child() with sysbus_init_child_obj()
>
Applied, thanks.
-- PMM
^ permalink raw reply [flat|nested] 43+ messages in thread
end of thread, other threads:[~2018-08-16 16:18 UTC | newest]
Thread overview: 43+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-02-09 11:02 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 01/30] target/arm: Add armv7m_nvic_set_pending_derived() Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 02/30] target/arm: Split "get pending exception info" from "acknowledge it" Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 03/30] target/arm: Add ignore_stackfaults argument to v7m_exception_taken() Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 04/30] target/arm: Make v7M exception entry stack push check MPU Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 05/30] target/arm: Make v7m_push_callee_stack() honour MPU Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 06/30] target/arm: Make exception vector loads honour the SAU Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 07/30] target/arm: Handle exceptions during exception stack pop Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 08/30] target/arm: implement SHA-512 instructions Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 09/30] target/arm: implement SHA-3 instructions Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 10/30] target/arm: implement SM3 instructions Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 11/30] target/arm: implement SM4 instructions Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 12/30] target/arm: enable user-mode SHA-3, SM3, SM4 and SHA-512 instruction support Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 13/30] sdhci: Add i.MX specific subtype of SDHCI Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 14/30] hw: i.MX: Convert i.MX6 to use TYPE_IMX_USDHC Peter Maydell
2018-02-09 11:02 ` [Qemu-devel] [PULL 15/30] i.MX: Add code to emulate i.MX7 CCM, PMU and ANALOG IP blocks Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 16/30] i.MX: Add code to emulate i.MX2 watchdog IP block Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 17/30] i.MX: Add code to emulate i.MX7 SNVS IP-block Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 18/30] i.MX: Add code to emulate GPCv2 IP block Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 19/30] i.MX: Add i.MX7 GPT variant Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 20/30] i.MX: Add implementation of i.MX7 GPR IP block Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 21/30] usb: Add basic code to emulate Chipidea USB IP Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 22/30] hw/arm: Move virt's PSCI DT fixup code to arm/boot.c Peter Maydell
2018-03-27 14:22 ` [Qemu-devel] [PULL, " Marc Zyngier
2018-02-09 11:03 ` [Qemu-devel] [PULL 23/30] target/arm: Expand vector registers for SVE Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 24/30] target/arm: Add predicate " Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 25/30] target/arm: Add SVE to migration state Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 26/30] target/arm: Add ZCR_ELx Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 27/30] target/arm: Add SVE state to TB->FLAGS Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 28/30] target/arm/kvm: gic: Prevent creating userspace GICv3 with KVM Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 29/30] target/arm/translate.c: Fix missing 'break' for TT insns Peter Maydell
2018-02-09 11:03 ` [Qemu-devel] [PULL 30/30] hw/core/generic-loader: Allow PC to be set on command line Peter Maydell
2018-02-09 14:38 ` [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
-- strict thread matches above, loose matches on Subject: below --
2018-08-16 13:34 Peter Maydell
2018-08-16 16:18 ` Peter Maydell
2017-02-27 18:04 Peter Maydell
2017-02-27 19:14 ` no-reply
2017-02-28 12:07 ` Peter Maydell
2016-06-14 14:13 Peter Maydell
2016-03-04 11:41 Peter Maydell
2016-03-04 14:05 ` Peter Maydell
2014-02-20 11:17 Peter Maydell
2014-02-21 16:01 ` Peter Maydell
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