From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33929) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ekA4z-0001wQ-0Q for qemu-devel@nongnu.org; Fri, 09 Feb 2018 09:55:10 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ekA4u-0005BZ-2H for qemu-devel@nongnu.org; Fri, 09 Feb 2018 09:55:08 -0500 Received: from mail-qk0-x244.google.com ([2607:f8b0:400d:c09::244]:45098) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ekA4t-0005B8-To for qemu-devel@nongnu.org; Fri, 09 Feb 2018 09:55:03 -0500 Received: by mail-qk0-x244.google.com with SMTP id x127so10258560qkb.12 for ; Fri, 09 Feb 2018 06:55:03 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 9 Feb 2018 11:54:09 -0300 Message-Id: <20180209145430.26007-10-f4bug@amsat.org> In-Reply-To: <20180209145430.26007-1-f4bug@amsat.org> References: <20180209145430.26007-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH v12 09/30] sdhci: simplify sdhci_get_fifolen() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org, Peter Maydell , Alistair Francis , "Edgar E . Iglesias" Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis --- hw/sd/sdhci-internal.h | 4 +++- hw/sd/sdhci.c | 20 +++++--------------- 2 files changed, 8 insertions(+), 16 deletions(-) diff --git a/hw/sd/sdhci-internal.h b/hw/sd/sdhci-internal.h index 64556480a9..def1c7f7aa 100644 --- a/hw/sd/sdhci-internal.h +++ b/hw/sd/sdhci-internal.h @@ -24,6 +24,8 @@ #ifndef SDHCI_INTERNAL_H #define SDHCI_INTERNAL_H +#include "hw/registerfields.h" + /* R/W SDMA System Address register 0x0 */ #define SDHC_SYSAD 0x00 @@ -185,7 +187,7 @@ #define SDHC_CAN_DO_ADMA2 0x00080000 #define SDHC_CAN_DO_ADMA1 0x00100000 #define SDHC_64_BIT_BUS_SUPPORT (1 << 28) -#define SDHC_CAPAB_BLOCKSIZE(x) (((x) >> 16) & 0x3) +FIELD(SDHC_CAPAB, MAXBLOCKLENGTH, 16, 2); /* HWInit Maximum Current Capabilities Register 0x0 */ #define SDHC_MAXCURR 0x48 diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 39eeccc4d5..e25f1da0f3 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -59,6 +59,11 @@ */ #define SDHC_CAPAB_REG_DEFAULT 0x057834b4 +static inline unsigned int sdhci_get_fifolen(SDHCIState *s) +{ + return 1 << (9 + FIELD_EX32(s->capareg, SDHC_CAPAB, MAXBLOCKLENGTH)); +} + static uint8_t sdhci_slotint(SDHCIState *s) { return (s->norintsts & s->norintsigen) || (s->errintsts & s->errintsigen) || @@ -1119,21 +1124,6 @@ static const MemoryRegionOps sdhci_mmio_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; -static inline unsigned int sdhci_get_fifolen(SDHCIState *s) -{ - switch (SDHC_CAPAB_BLOCKSIZE(s->capareg)) { - case 0: - return 512; - case 1: - return 1024; - case 2: - return 2048; - default: - hw_error("SDHC: unsupported value for maximum block size\n"); - return 0; - } -} - static void sdhci_init_readonly_registers(SDHCIState *s, Error **errp) { if (s->sd_spec_version != 2) { -- 2.16.1