qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	qemu-devel@nongnu.org, "Peter Maydell" <peter.maydell@linaro.org>,
	"Alistair Francis" <alistair.francis@xilinx.com>,
	"Edgar E . Iglesias" <edgar.iglesias@xilinx.com>
Subject: [Qemu-devel] [PATCH v12 03/30] sdhci: add check_capab_readonly() qtest
Date: Fri,  9 Feb 2018 11:54:03 -0300	[thread overview]
Message-ID: <20180209145430.26007-4-f4bug@amsat.org> (raw)
In-Reply-To: <20180209145430.26007-1-f4bug@amsat.org>

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
---
 tests/sdhci-test.c | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/tests/sdhci-test.c b/tests/sdhci-test.c
index 82f3785a72..51af5eac67 100644
--- a/tests/sdhci-test.c
+++ b/tests/sdhci-test.c
@@ -65,6 +65,15 @@ static uint64_t sdhci_readq(QSDHCI *s, uint32_t reg)
     return val;
 }
 
+static void sdhci_writeq(QSDHCI *s, uint32_t reg, uint64_t val)
+{
+    if (s->pci.dev) {
+        qpci_memwrite(s->pci.dev, s->mem_bar, reg, &val, sizeof(val));
+    } else {
+        qtest_writeq(global_qtest, s->addr + reg, val);
+    }
+}
+
 /* tests */
 
 static void check_capab_capareg(QSDHCI *s, uint64_t expected_capab)
@@ -75,6 +84,20 @@ static void check_capab_capareg(QSDHCI *s, uint64_t expected_capab)
     g_assert_cmphex(capab, ==, expected_capab);
 }
 
+static void check_capab_readonly(QSDHCI *s)
+{
+    const uint64_t vrand = 0x123456789abcdef;
+    uint64_t capab0, capab1;
+
+    capab0 = sdhci_readq(s, SDHC_CAPAB);
+    g_assert_cmpuint(capab0, !=, vrand);
+
+    sdhci_writeq(s, SDHC_CAPAB, vrand);
+    capab1 = sdhci_readq(s, SDHC_CAPAB);
+    g_assert_cmpuint(capab1, !=, vrand);
+    g_assert_cmpuint(capab1, ==, capab0);
+}
+
 static QSDHCI *machine_start(const struct sdhci_t *test)
 {
     QSDHCI *s = g_new0(QSDHCI, 1);
@@ -121,6 +144,7 @@ static void test_machine(const void *data)
     s = machine_start(test);
 
     check_capab_capareg(s, test->sdhci.capab.reg);
+    check_capab_readonly(s);
 
     machine_stop(s);
 }
-- 
2.16.1

  parent reply	other threads:[~2018-02-09 14:54 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-09 14:54 [Qemu-devel] [PATCH v12 00/30] SDHCI: clean v1/2 Specs, UHS-I cards tuning sequence Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 01/30] sdhci: use error_propagate(local_err) in realize() Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 02/30] sdhci: add qtest to check the SD capabilities register Philippe Mathieu-Daudé
2018-02-09 14:54 ` Philippe Mathieu-Daudé [this message]
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 04/30] sdhci: add a check_capab_baseclock() qtest Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 05/30] sdhci: add a check_capab_sdma() qtest Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 06/30] sdhci: add qtest to check the SD Spec version Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 07/30] sdhci: add a 'spec_version property' (default to v2) Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 08/30] sdhci: use a numeric value for the default CAPAB register Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 09/30] sdhci: simplify sdhci_get_fifolen() Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 10/30] sdhci: check the Spec v1 capabilities correctness Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 12/30] sdhci: Fix 64-bit ADMA2 Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 13/30] sdhci: check Spec v2 capabilities (DMA and 64-bit bus) Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 14/30] hw/arm/exynos4210: access the 64-bit capareg with qdev_prop_set_uint64() Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 15/30] hw/arm/exynos4210: add a comment about a very similar SDHCI (Spec. v2) Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 16/30] hw/arm/xilinx_zynq: fix the capabilities register to match the datasheet Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 17/30] sdhci: add support for v3 capabilities Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 18/30] sdhci: rename the hostctl1 register Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 19/30] sdhci: implement the Host Control 2 register (tuning sequence) Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 20/30] sdbus: add trace events Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 21/30] sdhci: implement UHS-I voltage switch Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 22/30] sdhci: implement CMD/DAT[] fields in the Present State register Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 23/30] hw/arm/bcm2835_peripherals: implement SDHCI Spec v3 Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 24/30] hw/arm/bcm2835_peripherals: change maximum block size to 1kB Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 25/30] hw/arm/fsl-imx6: implement SDHCI Spec. v3 Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 26/30] hw/arm/xilinx_zynqmp: fix the capabilities/spec version to match the datasheet Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 27/30] hw/arm/xilinx_zynqmp: enable the UHS-I mode Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 28/30] sdhci: check Spec v3 capabilities qtest Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 29/30] sdhci: add a check_capab_v3() qtest Philippe Mathieu-Daudé
2018-02-09 14:54 ` [Qemu-devel] [PATCH v12 30/30] sdhci: add Spec v4.2 register definitions Philippe Mathieu-Daudé
2018-02-12 12:42 ` [Qemu-devel] [PATCH v12 00/30] SDHCI: clean v1/2 Specs, UHS-I cards tuning sequence Fam Zheng
     [not found] ` <20180212180032.22198-1-f4bug@amsat.org>
2018-02-13  1:44   ` [Qemu-devel] [PATCH RESEND v12 11/30] sdhci: replace DMA magic value by BLOCK_SIZE_MASK Fam Zheng

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180209145430.26007-4-f4bug@amsat.org \
    --to=f4bug@amsat.org \
    --cc=alistair.francis@xilinx.com \
    --cc=edgar.iglesias@xilinx.com \
    --cc=pbonzini@redhat.com \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).