From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org
Subject: [Qemu-devel] [PATCH 3/5] target/arm: Suppress TB end for FPCR/FPSR
Date: Sat, 10 Feb 2018 15:05:28 -0800 [thread overview]
Message-ID: <20180210230530.8421-4-richard.henderson@linaro.org> (raw)
In-Reply-To: <20180210230530.8421-1-richard.henderson@linaro.org>
Nothing in either register affects the TB.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index d41fb8371f..e0184c7162 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -3356,11 +3356,11 @@ static const ARMCPRegInfo v8_cp_reginfo[] = {
.writefn = aa64_daif_write, .resetfn = arm_cp_reset_ignore },
{ .name = "FPCR", .state = ARM_CP_STATE_AA64,
.opc0 = 3, .opc1 = 3, .opc2 = 0, .crn = 4, .crm = 4,
- .access = PL0_RW, .type = ARM_CP_FPU,
+ .access = PL0_RW, .type = ARM_CP_FPU | ARM_CP_SUPPRESS_TB_END,
.readfn = aa64_fpcr_read, .writefn = aa64_fpcr_write },
{ .name = "FPSR", .state = ARM_CP_STATE_AA64,
.opc0 = 3, .opc1 = 3, .opc2 = 1, .crn = 4, .crm = 4,
- .access = PL0_RW, .type = ARM_CP_FPU,
+ .access = PL0_RW, .type = ARM_CP_FPU | ARM_CP_SUPPRESS_TB_END,
.readfn = aa64_fpsr_read, .writefn = aa64_fpsr_write },
{ .name = "DCZID_EL0", .state = ARM_CP_STATE_AA64,
.opc0 = 3, .opc1 = 3, .opc2 = 7, .crn = 0, .crm = 0,
--
2.14.3
next prev parent reply other threads:[~2018-02-10 23:05 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-10 23:05 [Qemu-devel] [PATCH 0/5] target/arm: More SVE prep work Richard Henderson
2018-02-10 23:05 ` [Qemu-devel] [PATCH 1/5] target/arm: Remove ARM_CP_64BIT from ZCR_EL registers Richard Henderson
2018-02-10 23:05 ` [Qemu-devel] [PATCH 2/5] target/arm: Enforce FP access to FPCR/FPSR Richard Henderson
2018-02-10 23:05 ` Richard Henderson [this message]
2018-02-10 23:05 ` [Qemu-devel] [PATCH 4/5] target/arm: Enforce access to ZCR_EL at translation Richard Henderson
2018-02-10 23:05 ` [Qemu-devel] [PATCH 5/5] target/arm: Handle SVE registers when using clear_vec_high Richard Henderson
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