From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org
Cc: groug@kaod.org, mark.cave-ayland@ilande.co.uk,
qemu-ppc@nongnu.org, qemu-devel@nongnu.org, lvivier@redhat.com,
David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PULL 06/12] cuda: introduce CUDAState parameter to get_counter()
Date: Mon, 12 Feb 2018 14:40:48 +1100 [thread overview]
Message-ID: <20180212034054.23441-7-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20180212034054.23441-1-david@gibson.dropbear.id.au>
From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
This will be required shortly and also happens to match nicely with the
corresponding signature for set_counter().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/misc/macio/cuda.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c
index eaa8924f49..fa10b6d0c1 100644
--- a/hw/misc/macio/cuda.c
+++ b/hw/misc/macio/cuda.c
@@ -150,7 +150,7 @@ static uint64_t get_tb(uint64_t time, uint64_t freq)
return muldiv64(time, freq, NANOSECONDS_PER_SECOND);
}
-static unsigned int get_counter(CUDATimer *ti)
+static unsigned int get_counter(CUDAState *s, CUDATimer *ti)
{
int64_t d;
unsigned int counter;
@@ -295,12 +295,12 @@ static uint64_t cuda_read(void *opaque, hwaddr addr, unsigned size)
val = s->dira;
break;
case CUDA_REG_T1CL:
- val = get_counter(&s->timers[0]) & 0xff;
+ val = get_counter(s, &s->timers[0]) & 0xff;
s->ifr &= ~T1_INT;
cuda_update_irq(s);
break;
case CUDA_REG_T1CH:
- val = get_counter(&s->timers[0]) >> 8;
+ val = get_counter(s, &s->timers[0]) >> 8;
cuda_update_irq(s);
break;
case CUDA_REG_T1LL:
@@ -311,12 +311,12 @@ static uint64_t cuda_read(void *opaque, hwaddr addr, unsigned size)
val = (s->timers[0].latch >> 8) & 0xff;
break;
case CUDA_REG_T2CL:
- val = get_counter(&s->timers[1]) & 0xff;
+ val = get_counter(s, &s->timers[1]) & 0xff;
s->ifr &= ~T2_INT;
cuda_update_irq(s);
break;
case CUDA_REG_T2CH:
- val = get_counter(&s->timers[1]) >> 8;
+ val = get_counter(s, &s->timers[1]) >> 8;
break;
case CUDA_REG_SR:
val = s->sr;
--
2.14.3
next prev parent reply other threads:[~2018-02-12 3:41 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-12 3:40 [Qemu-devel] [PULL 00/12] ppc-for-2.12 queue 20180212 David Gibson
2018-02-12 3:40 ` [Qemu-devel] [PULL 01/12] spapr: add missing break in h_get_cpu_characteristics() David Gibson
2018-02-12 3:40 ` [Qemu-devel] [PULL 02/12] hw/ppc: rename functions in comments David Gibson
2018-02-12 3:40 ` [Qemu-devel] [PULL 03/12] cuda: do not use old_mmio accesses David Gibson
2018-02-12 3:40 ` [Qemu-devel] [PULL 04/12] cuda: don't allow writes to port output pins David Gibson
2018-02-12 3:40 ` [Qemu-devel] [PULL 05/12] spapr: set vsmt to MAX(8, smp_threads) David Gibson
2018-02-12 3:40 ` David Gibson [this message]
2018-02-12 3:40 ` [Qemu-devel] [PULL 07/12] cuda: rename frequency property to tb_frequency David Gibson
2018-02-12 3:40 ` [Qemu-devel] [PULL 08/12] cuda: minor cosmetic tidy-ups to get_next_irq_time() David Gibson
2018-02-12 3:40 ` [Qemu-devel] [PULL 09/12] cuda: don't call cuda_update() when writing to ACR register David Gibson
2018-02-12 3:40 ` [Qemu-devel] [PULL 10/12] cuda: set timer 1 frequency property to CUDA_TIMER_FREQ David Gibson
2018-02-12 3:40 ` [Qemu-devel] [PULL 11/12] cuda: factor out timebase-derived counter value and load time David Gibson
2018-02-12 3:40 ` [Qemu-devel] [PULL 12/12] misc: introduce new mos6522 VIA device and enable it for ppc builds David Gibson
2018-02-12 17:40 ` [Qemu-devel] [PULL 00/12] ppc-for-2.12 queue 20180212 Peter Maydell
2018-02-12 18:46 ` Laurent Vivier
2018-02-12 22:11 ` David Gibson
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