From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52704) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1elRtp-0000yh-ST for qemu-devel@nongnu.org; Mon, 12 Feb 2018 23:08:58 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1elRtp-0007jl-34 for qemu-devel@nongnu.org; Mon, 12 Feb 2018 23:08:57 -0500 Received: from mail-qk0-x241.google.com ([2607:f8b0:400d:c09::241]:36504) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1elRto-0007jW-Ui for qemu-devel@nongnu.org; Mon, 12 Feb 2018 23:08:57 -0500 Received: by mail-qk0-x241.google.com with SMTP id 15so21063194qkl.3 for ; Mon, 12 Feb 2018 20:08:56 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 13 Feb 2018 01:07:51 -0300 Message-Id: <20180213040809.26021-13-f4bug@amsat.org> In-Reply-To: <20180213040809.26021-1-f4bug@amsat.org> References: <20180213040809.26021-1-f4bug@amsat.org> Subject: [Qemu-devel] [PATCH v13 12/30] sdhci: Fix 64-bit ADMA2 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini Cc: Sai Pavan Boddu , qemu-devel@nongnu.org, Peter Maydell , Alistair Francis , "Edgar E . Iglesias" , Fam Zheng From: Sai Pavan Boddu The 64-bit ADMA address is not converted to the cpu endianes correctly. This patch fixes the issue and uses a valid mask for the attribute data. Signed-off-by: Sai Pavan Boddu [AF: Re-write commit message] Reviewed-by: Alistair Francis --- hw/sd/sdhci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 650265a472..4bd35078a9 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -667,8 +667,8 @@ static void get_adma_description(SDHCIState *s, ADMADescr *dscr) dscr->length = le16_to_cpu(dscr->length); dma_memory_read(s->dma_as, entry_addr + 4, (uint8_t *)(&dscr->addr), 8); - dscr->attr = le64_to_cpu(dscr->attr); - dscr->attr &= 0xfffffff8; + dscr->addr = le64_to_cpu(dscr->addr); + dscr->attr &= (uint8_t) ~0xC0; dscr->incr = 12; break; } -- 2.16.1