From: "Emilio G. Cota" <cota@braap.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: Michael Clark <mjc@sifive.com>,
Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
Palmer Dabbelt <palmer@sifive.com>,
qemu-devel@nongnu.org,
Sagar Karandikar <sagark@eecs.berkeley.edu>,
RISC-V Patches <patches@groups.riscv.org>
Subject: Re: [Qemu-devel] [PATCH v5 09/23] RISC-V TCG Code Generation
Date: Tue, 13 Feb 2018 19:10:53 -0500 [thread overview]
Message-ID: <20180214001053.GA23702@flamenco> (raw)
In-Reply-To: <731db20e-4d86-e288-504c-30c83b56fd33@linaro.org>
On Tue, Feb 13, 2018 at 14:10:20 -0800, Richard Henderson wrote:
> On 02/13/2018 01:55 PM, Emilio G. Cota wrote:
> > Are we planning to use BS_STOP in the future? I see it has no setters,
> > although we check for it in gen_intermediate_code:
>
> No, but the whole port should be converted to exec/translator.h, which defines
> DisasJumpType. Not something I'm going to require on initial submission until
> we've gotten most of the other targets cleaned up.
I see. I've just done the conversion for v5:
https://github.com/cota/qemu/commits/riscv-v5-trloop
Can you please take a look?
Thanks,
Emilio
next prev parent reply other threads:[~2018-02-14 0:11 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-08 1:28 [Qemu-devel] [PATCH v5 00/23] RISC-V QEMU Port Submission Michael Clark
2018-02-08 1:28 ` [Qemu-devel] [PATCH v5 01/23] RISC-V Maintainers Michael Clark
2018-02-08 1:28 ` [Qemu-devel] [PATCH v5 02/23] RISC-V ELF Machine Definition Michael Clark
2018-02-08 1:28 ` [Qemu-devel] [PATCH v5 03/23] RISC-V CPU Core Definition Michael Clark
2018-02-08 1:28 ` [Qemu-devel] [PATCH v5 04/23] RISC-V Disassembler Michael Clark
2018-02-08 1:28 ` [Qemu-devel] [PATCH v5 05/23] RISC-V CPU Helpers Michael Clark
2018-02-08 1:28 ` [Qemu-devel] [PATCH v5 06/23] Softfloat support for IEEE 754-201x minimumNumber/maximumNumber Michael Clark
2018-02-08 14:35 ` Richard Henderson
2018-02-08 21:03 ` Michael Clark
2018-02-08 1:28 ` [Qemu-devel] [PATCH v5 07/23] RISC-V FPU Support Michael Clark
2018-02-08 14:38 ` Richard Henderson
2018-02-08 1:28 ` [Qemu-devel] [PATCH v5 08/23] RISC-V GDB Stub Michael Clark
2018-02-08 1:28 ` [Qemu-devel] [PATCH v5 09/23] RISC-V TCG Code Generation Michael Clark
2018-02-13 21:55 ` Emilio G. Cota
2018-02-13 22:10 ` Richard Henderson
2018-02-14 0:10 ` Emilio G. Cota [this message]
2018-02-14 19:14 ` Richard Henderson
2018-02-14 19:52 ` Emilio G. Cota
2018-02-14 21:13 ` Richard Henderson
2018-02-14 23:23 ` Emilio G. Cota
2018-02-13 21:57 ` Emilio G. Cota
2018-02-08 1:28 ` [Qemu-devel] [PATCH v5 10/23] RISC-V Physical Memory Protection Michael Clark
2018-02-08 14:40 ` Richard Henderson
2018-02-08 1:28 ` [Qemu-devel] [PATCH v5 11/23] RISC-V Linux User Emulation Michael Clark
2018-02-08 16:20 ` Richard Henderson
2018-02-08 1:28 ` [Qemu-devel] [PATCH v5 12/23] RISC-V HTIF Console Michael Clark
2018-02-08 16:35 ` Richard Henderson
2018-02-09 7:33 ` Michael Clark
2018-02-09 8:09 ` Michael Clark
2018-02-09 9:08 ` Michael Clark
2018-02-09 19:38 ` Richard Henderson
2018-02-08 1:28 ` [Qemu-devel] [PATCH v5 13/23] RISC-V HART Array Michael Clark
2018-02-08 16:37 ` Richard Henderson
2018-02-08 1:28 ` [Qemu-devel] [PATCH v5 14/23] SiFive RISC-V CLINT Block Michael Clark
2018-02-08 1:28 ` [Qemu-devel] [PATCH v5 15/23] SiFive RISC-V PLIC Block Michael Clark
2018-02-08 1:28 ` [Qemu-devel] [PATCH v5 16/23] RISC-V Spike Machines Michael Clark
2018-02-08 1:28 ` [Qemu-devel] [PATCH v5 17/23] RISC-V VirtIO Machine Michael Clark
2018-02-08 10:36 ` Igor Mammedov
2018-02-08 1:28 ` [Qemu-devel] [PATCH v5 18/23] SiFive RISC-V UART Device Michael Clark
2018-02-08 1:28 ` [Qemu-devel] [PATCH v5 19/23] SiFive RISC-V PRCI Block Michael Clark
2018-02-08 1:28 ` [Qemu-devel] [PATCH v5 20/23] SiFive RISC-V Test Finisher Michael Clark
2018-02-08 1:28 ` [Qemu-devel] [PATCH v5 21/23] SiFive Freedom E300 RISC-V Machine Michael Clark
2018-02-08 1:28 ` [Qemu-devel] [PATCH v5 22/23] SiFive Freedom U500 " Michael Clark
2018-02-08 1:28 ` [Qemu-devel] [PATCH v5 23/23] RISC-V Build Infrastructure Michael Clark
2018-02-08 1:55 ` [Qemu-devel] [PATCH v5 00/23] RISC-V QEMU Port Submission Michael Clark
2018-02-08 1:56 ` Michael Clark
2018-02-08 2:04 ` no-reply
2018-02-09 19:42 ` Richard Henderson
2018-02-10 0:04 ` Michael Clark
2018-02-17 13:30 ` Richard W.M. Jones
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