* [Qemu-devel] [PATCH v3 01/31] include/exec/helper-head.h: support f16 in helper calls
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 02/31] target/arm/cpu64: introduce ARM_V8_FP16 feature bit Alex Bennée
` (32 subsequent siblings)
33 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm
Cc: qemu-devel, richard.henderson, Alex Bennée, Paolo Bonzini,
Peter Crosthwaite, Richard Henderson
This allows us to explicitly pass float16 to helpers rather than
assuming uint32_t and dealing with the result. Of course they will be
passed in i32 sized registers by default.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/helper-head.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h
index e1fd08f2ba..15b6a68de3 100644
--- a/include/exec/helper-head.h
+++ b/include/exec/helper-head.h
@@ -26,6 +26,7 @@
#define dh_alias_int i32
#define dh_alias_i64 i64
#define dh_alias_s64 i64
+#define dh_alias_f16 i32
#define dh_alias_f32 i32
#define dh_alias_f64 i64
#define dh_alias_ptr ptr
@@ -38,6 +39,7 @@
#define dh_ctype_int int
#define dh_ctype_i64 uint64_t
#define dh_ctype_s64 int64_t
+#define dh_ctype_f16 float16
#define dh_ctype_f32 float32
#define dh_ctype_f64 float64
#define dh_ctype_ptr void *
@@ -94,6 +96,7 @@
#define dh_is_signed_s32 1
#define dh_is_signed_i64 0
#define dh_is_signed_s64 1
+#define dh_is_signed_f16 0
#define dh_is_signed_f32 0
#define dh_is_signed_f64 0
#define dh_is_signed_tl 0
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [Qemu-devel] [PATCH v3 02/31] target/arm/cpu64: introduce ARM_V8_FP16 feature bit
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 01/31] include/exec/helper-head.h: support f16 in helper calls Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 03/31] target/arm/cpu.h: update comment for half-precision values Alex Bennée
` (31 subsequent siblings)
33 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/cpu.h | 1 +
target/arm/cpu64.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 8c839faa8f..267a9d7e2f 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1408,6 +1408,7 @@ enum arm_features {
ARM_FEATURE_V8_SHA3, /* implements SHA3 part of v8 Crypto Extensions */
ARM_FEATURE_V8_SM3, /* implements SM3 part of v8 Crypto Extensions */
ARM_FEATURE_V8_SM4, /* implements SM4 part of v8 Crypto Extensions */
+ ARM_FEATURE_V8_FP16, /* implements v8.2 half-precision float */
};
static inline int arm_feature(CPUARMState *env, int feature)
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 1c330adc28..9743bdc8c3 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -230,6 +230,7 @@ static void aarch64_any_initfn(Object *obj)
set_feature(&cpu->env, ARM_FEATURE_V8_SM4);
set_feature(&cpu->env, ARM_FEATURE_V8_PMULL);
set_feature(&cpu->env, ARM_FEATURE_CRC);
+ set_feature(&cpu->env, ARM_FEATURE_V8_FP16);
cpu->ctr = 0x80038003; /* 32 byte I and D cacheline size, VIPT icache */
cpu->dcz_blocksize = 7; /* 512 bytes */
}
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [Qemu-devel] [PATCH v3 03/31] target/arm/cpu.h: update comment for half-precision values
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 01/31] include/exec/helper-head.h: support f16 in helper calls Alex Bennée
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 02/31] target/arm/cpu64: introduce ARM_V8_FP16 feature bit Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-23 23:30 ` Richard Henderson
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 04/31] target/arm/cpu.h: add additional float_status flags Alex Bennée
` (30 subsequent siblings)
33 siblings, 1 reply; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/cpu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 267a9d7e2f..c2bce23fa5 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -168,6 +168,7 @@ typedef struct {
* Qn = regs[n].d[1]:regs[n].d[0]
* Dn = regs[n].d[0]
* Sn = regs[n].d[0] bits 31..0
+ * Hn = regs[n].d[0] bits 15..0 for even n, and bits 31..16 for odd n
*
* This corresponds to the architecturally defined mapping between
* the two execution states, and means we do not need to explicitly
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [Qemu-devel] [PATCH v3 04/31] target/arm/cpu.h: add additional float_status flags
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (2 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 03/31] target/arm/cpu.h: update comment for half-precision values Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-23 23:51 ` Richard Henderson
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 05/31] target/arm/helper: pass explicit fpst to set_rmode Alex Bennée
` (29 subsequent siblings)
33 siblings, 1 reply; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
Half-precision flush to zero behaviour is controlled by a separate
FZ16 bit in the FPCR. To handle this we pass a pointer to
fp_status_fp16 when working on half-precision operations. The value of
the presented FPCR is calculated from an amalgam of the two when read.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
v3
- add FPCR_[FZ/FZ16/DN] defines to cpu.h and use
- only propagate flag status to fp_status as they are ored later
- ensure dnan and round mode propagated to fp_status_fp16
---
target/arm/cpu.h | 32 ++++++++++++++++++++++------
target/arm/helper.c | 26 ++++++++++++++++++-----
target/arm/translate-a64.c | 53 +++++++++++++++++++++++++---------------------
3 files changed, 75 insertions(+), 36 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index c2bce23fa5..ebbb21391c 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -538,19 +538,29 @@ typedef struct CPUARMState {
/* scratch space when Tn are not sufficient. */
uint32_t scratch[8];
- /* fp_status is the "normal" fp status. standard_fp_status retains
- * values corresponding to the ARM "Standard FPSCR Value", ie
- * default-NaN, flush-to-zero, round-to-nearest and is used by
- * any operations (generally Neon) which the architecture defines
- * as controlled by the standard FPSCR value rather than the FPSCR.
+ /* There are a number of distinct float control structures:
+ *
+ * fp_status: is the "normal" fp status.
+ * fp_status_fp16: used for half-precision calculations
+ * standard_fp_status : the ARM "Standard FPSCR Value"
+ *
+ * Half-precision operations are governed by a separate
+ * flush-to-zero control bit in FPSCR:FZ16. We pass a separate
+ * status structure to control this.
+ *
+ * The "Standard FPSCR", ie default-NaN, flush-to-zero,
+ * round-to-nearest and is used by any operations (generally
+ * Neon) which the architecture defines as controlled by the
+ * standard FPSCR value rather than the FPSCR.
*
* To avoid having to transfer exception bits around, we simply
* say that the FPSCR cumulative exception flags are the logical
- * OR of the flags in the two fp statuses. This relies on the
+ * OR of the flags in the three fp statuses. This relies on the
* only thing which needs to read the exception flags being
* an explicit FPSCR read.
*/
float_status fp_status;
+ float_status fp_status_f16;
float_status standard_fp_status;
/* ZCR_EL[1-3] */
@@ -1190,12 +1200,20 @@ static inline void xpsr_write(CPUARMState *env, uint32_t val, uint32_t mask)
uint32_t vfp_get_fpscr(CPUARMState *env);
void vfp_set_fpscr(CPUARMState *env, uint32_t val);
-/* For A64 the FPSCR is split into two logically distinct registers,
+/* FPCR, Floating Point Control Register
+ * FPSR, Floating Poiht Status Register
+ *
+ * For A64 the FPSCR is split into two logically distinct registers,
* FPCR and FPSR. However since they still use non-overlapping bits
* we store the underlying state in fpscr and just mask on read/write.
*/
#define FPSR_MASK 0xf800009f
#define FPCR_MASK 0x07f79f00
+
+#define FPCR_FZ16 (1 << 19) /* ARMv8.2+, FP16 flush-to-zero */
+#define FPCR_FZ (1 << 24) /* Flush-to-zero enable bit */
+#define FPCR_DN (1 << 25) /* Default NaN enable bit */
+
static inline uint32_t vfp_get_fpsr(CPUARMState *env)
{
return vfp_get_fpscr(env) & FPSR_MASK;
diff --git a/target/arm/helper.c b/target/arm/helper.c
index c5bc69b961..f450eb200f 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -11103,6 +11103,7 @@ uint32_t HELPER(vfp_get_fpscr)(CPUARMState *env)
| (env->vfp.vec_stride << 20);
i = get_float_exception_flags(&env->vfp.fp_status);
i |= get_float_exception_flags(&env->vfp.standard_fp_status);
+ i |= get_float_exception_flags(&env->vfp.fp_status_f16);
fpscr |= vfp_exceptbits_from_host(i);
return fpscr;
}
@@ -11160,16 +11161,31 @@ void HELPER(vfp_set_fpscr)(CPUARMState *env, uint32_t val)
break;
}
set_float_rounding_mode(i, &env->vfp.fp_status);
+ set_float_rounding_mode(i, &env->vfp.fp_status_f16);
}
- if (changed & (1 << 24)) {
- set_flush_to_zero((val & (1 << 24)) != 0, &env->vfp.fp_status);
- set_flush_inputs_to_zero((val & (1 << 24)) != 0, &env->vfp.fp_status);
+ if (changed & FPCR_FZ16) {
+ bool ftz_enabled = val & FPCR_FZ16;
+ set_flush_to_zero(ftz_enabled, &env->vfp.fp_status_f16);
+ set_flush_inputs_to_zero(ftz_enabled, &env->vfp.fp_status_f16);
+ }
+ if (changed & FPCR_FZ) {
+ bool ftz_enabled = val & FPCR_FZ;
+ set_flush_to_zero(ftz_enabled, &env->vfp.fp_status);
+ set_flush_inputs_to_zero(ftz_enabled, &env->vfp.fp_status);
+ }
+ if (changed & FPCR_DN) {
+ bool dnan_enabled = val & FPCR_DN;
+ set_default_nan_mode(dnan_enabled, &env->vfp.fp_status);
+ set_default_nan_mode(dnan_enabled, &env->vfp.fp_status_f16);
}
- if (changed & (1 << 25))
- set_default_nan_mode((val & (1 << 25)) != 0, &env->vfp.fp_status);
+ /* The exception flags are ORed together when we read fpscr so we
+ * only need to preserve the current state in one of our
+ * float_status values.
+ */
i = vfp_exceptbits_to_host(val);
set_float_exception_flags(i, &env->vfp.fp_status);
+ set_float_exception_flags(0, &env->vfp.fp_status_f16);
set_float_exception_flags(0, &env->vfp.standard_fp_status);
}
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 1c88539d62..2c64d2b3fe 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -637,16 +637,21 @@ static void write_fp_sreg(DisasContext *s, int reg, TCGv_i32 v)
tcg_temp_free_i64(tmp);
}
-static TCGv_ptr get_fpstatus_ptr(void)
+static TCGv_ptr get_fpstatus_ptr(bool is_f16)
{
TCGv_ptr statusptr = tcg_temp_new_ptr();
int offset;
- /* In A64 all instructions (both FP and Neon) use the FPCR;
- * there is no equivalent of the A32 Neon "standard FPSCR value"
- * and all operations use vfp.fp_status.
+ /* In A64 all instructions (both FP and Neon) use the FPCR; there
+ * is no equivalent of the A32 Neon "standard FPSCR value".
+ * However half-precision operations operate under a different
+ * FZ16 flag and use vfp.fp_status_f16 instead of vfp.fp_status.
*/
- offset = offsetof(CPUARMState, vfp.fp_status);
+ if (is_f16) {
+ offset = offsetof(CPUARMState, vfp.fp_status_f16);
+ } else {
+ offset = offsetof(CPUARMState, vfp.fp_status);
+ }
tcg_gen_addi_ptr(statusptr, cpu_env, offset);
return statusptr;
}
@@ -4423,7 +4428,7 @@ static void handle_fp_compare(DisasContext *s, bool is_double,
bool cmp_with_zero, bool signal_all_nans)
{
TCGv_i64 tcg_flags = tcg_temp_new_i64();
- TCGv_ptr fpst = get_fpstatus_ptr();
+ TCGv_ptr fpst = get_fpstatus_ptr(false);
if (is_double) {
TCGv_i64 tcg_vn, tcg_vm;
@@ -4598,7 +4603,7 @@ static void handle_fp_1src_single(DisasContext *s, int opcode, int rd, int rn)
TCGv_i32 tcg_op;
TCGv_i32 tcg_res;
- fpst = get_fpstatus_ptr();
+ fpst = get_fpstatus_ptr(false);
tcg_op = read_fp_sreg(s, rn);
tcg_res = tcg_temp_new_i32();
@@ -4660,7 +4665,7 @@ static void handle_fp_1src_double(DisasContext *s, int opcode, int rd, int rn)
return;
}
- fpst = get_fpstatus_ptr();
+ fpst = get_fpstatus_ptr(false);
tcg_op = read_fp_dreg(s, rn);
tcg_res = tcg_temp_new_i64();
@@ -4840,7 +4845,7 @@ static void handle_fp_2src_single(DisasContext *s, int opcode,
TCGv_ptr fpst;
tcg_res = tcg_temp_new_i32();
- fpst = get_fpstatus_ptr();
+ fpst = get_fpstatus_ptr(false);
tcg_op1 = read_fp_sreg(s, rn);
tcg_op2 = read_fp_sreg(s, rm);
@@ -4893,7 +4898,7 @@ static void handle_fp_2src_double(DisasContext *s, int opcode,
TCGv_ptr fpst;
tcg_res = tcg_temp_new_i64();
- fpst = get_fpstatus_ptr();
+ fpst = get_fpstatus_ptr(false);
tcg_op1 = read_fp_dreg(s, rn);
tcg_op2 = read_fp_dreg(s, rm);
@@ -4979,7 +4984,7 @@ static void handle_fp_3src_single(DisasContext *s, bool o0, bool o1,
{
TCGv_i32 tcg_op1, tcg_op2, tcg_op3;
TCGv_i32 tcg_res = tcg_temp_new_i32();
- TCGv_ptr fpst = get_fpstatus_ptr();
+ TCGv_ptr fpst = get_fpstatus_ptr(false);
tcg_op1 = read_fp_sreg(s, rn);
tcg_op2 = read_fp_sreg(s, rm);
@@ -5017,7 +5022,7 @@ static void handle_fp_3src_double(DisasContext *s, bool o0, bool o1,
{
TCGv_i64 tcg_op1, tcg_op2, tcg_op3;
TCGv_i64 tcg_res = tcg_temp_new_i64();
- TCGv_ptr fpst = get_fpstatus_ptr();
+ TCGv_ptr fpst = get_fpstatus_ptr(false);
tcg_op1 = read_fp_dreg(s, rn);
tcg_op2 = read_fp_dreg(s, rm);
@@ -5158,7 +5163,7 @@ static void handle_fpfpcvt(DisasContext *s, int rd, int rn, int opcode,
TCGv_ptr tcg_fpstatus;
TCGv_i32 tcg_shift;
- tcg_fpstatus = get_fpstatus_ptr();
+ tcg_fpstatus = get_fpstatus_ptr(false);
tcg_shift = tcg_const_i32(64 - scale);
@@ -5870,7 +5875,7 @@ static void disas_simd_across_lanes(DisasContext *s, uint32_t insn)
TCGv_i32 tcg_elt1 = tcg_temp_new_i32();
TCGv_i32 tcg_elt2 = tcg_temp_new_i32();
TCGv_i32 tcg_elt3 = tcg_temp_new_i32();
- TCGv_ptr fpst = get_fpstatus_ptr();
+ TCGv_ptr fpst = get_fpstatus_ptr(false);
assert(esize == 32);
assert(elements == 4);
@@ -6372,7 +6377,7 @@ static void disas_simd_scalar_pairwise(DisasContext *s, uint32_t insn)
}
size = extract32(size, 0, 1) ? 3 : 2;
- fpst = get_fpstatus_ptr();
+ fpst = get_fpstatus_ptr(false);
break;
default:
unallocated_encoding(s);
@@ -6864,7 +6869,7 @@ static void handle_simd_intfp_conv(DisasContext *s, int rd, int rn,
int fracbits, int size)
{
bool is_double = size == 3 ? true : false;
- TCGv_ptr tcg_fpst = get_fpstatus_ptr();
+ TCGv_ptr tcg_fpst = get_fpstatus_ptr(false);
TCGv_i32 tcg_shift = tcg_const_i32(fracbits);
TCGv_i64 tcg_int = tcg_temp_new_i64();
TCGMemOp mop = size | (is_signed ? MO_SIGN : 0);
@@ -6980,7 +6985,7 @@ static void handle_simd_shift_fpint_conv(DisasContext *s, bool is_scalar,
tcg_rmode = tcg_const_i32(arm_rmode_to_sf(FPROUNDING_ZERO));
gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
- tcg_fpstatus = get_fpstatus_ptr();
+ tcg_fpstatus = get_fpstatus_ptr(false);
tcg_shift = tcg_const_i32(fracbits);
if (is_double) {
@@ -7326,7 +7331,7 @@ static void handle_3same_float(DisasContext *s, int size, int elements,
int fpopcode, int rd, int rn, int rm)
{
int pass;
- TCGv_ptr fpst = get_fpstatus_ptr();
+ TCGv_ptr fpst = get_fpstatus_ptr(false);
for (pass = 0; pass < elements; pass++) {
if (size) {
@@ -7790,7 +7795,7 @@ static void handle_2misc_fcmp_zero(DisasContext *s, int opcode,
return;
}
- fpst = get_fpstatus_ptr();
+ fpst = get_fpstatus_ptr(false);
if (is_double) {
TCGv_i64 tcg_op = tcg_temp_new_i64();
@@ -7897,7 +7902,7 @@ static void handle_2misc_reciprocal(DisasContext *s, int opcode,
int size, int rn, int rd)
{
bool is_double = (size == 3);
- TCGv_ptr fpst = get_fpstatus_ptr();
+ TCGv_ptr fpst = get_fpstatus_ptr(false);
if (is_double) {
TCGv_i64 tcg_op = tcg_temp_new_i64();
@@ -8296,7 +8301,7 @@ static void disas_simd_scalar_two_reg_misc(DisasContext *s, uint32_t insn)
if (is_fcvt) {
tcg_rmode = tcg_const_i32(arm_rmode_to_sf(rmode));
gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
- tcg_fpstatus = get_fpstatus_ptr();
+ tcg_fpstatus = get_fpstatus_ptr(false);
} else {
tcg_rmode = NULL;
tcg_fpstatus = NULL;
@@ -9516,7 +9521,7 @@ static void handle_simd_3same_pair(DisasContext *s, int is_q, int u, int opcode,
/* Floating point operations need fpst */
if (opcode >= 0x58) {
- fpst = get_fpstatus_ptr();
+ fpst = get_fpstatus_ptr(false);
} else {
fpst = NULL;
}
@@ -10676,7 +10681,7 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
}
if (need_fpstatus) {
- tcg_fpstatus = get_fpstatus_ptr();
+ tcg_fpstatus = get_fpstatus_ptr(false);
} else {
tcg_fpstatus = NULL;
}
@@ -11056,7 +11061,7 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
}
if (is_fp) {
- fpst = get_fpstatus_ptr();
+ fpst = get_fpstatus_ptr(false);
} else {
fpst = NULL;
}
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* Re: [Qemu-devel] [PATCH v3 04/31] target/arm/cpu.h: add additional float_status flags
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 04/31] target/arm/cpu.h: add additional float_status flags Alex Bennée
@ 2018-02-23 23:51 ` Richard Henderson
0 siblings, 0 replies; 46+ messages in thread
From: Richard Henderson @ 2018-02-23 23:51 UTC (permalink / raw)
To: Alex Bennée, qemu-arm; +Cc: qemu-devel, Peter Maydell
On 02/23/2018 07:36 AM, Alex Bennée wrote:
> Half-precision flush to zero behaviour is controlled by a separate
> FZ16 bit in the FPCR. To handle this we pass a pointer to
> fp_status_fp16 when working on half-precision operations. The value of
> the presented FPCR is calculated from an amalgam of the two when read.
>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>
> ---
> v3
> - add FPCR_[FZ/FZ16/DN] defines to cpu.h and use
> - only propagate flag status to fp_status as they are ored later
> - ensure dnan and round mode propagated to fp_status_fp16
> ---
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 46+ messages in thread
* [Qemu-devel] [PATCH v3 05/31] target/arm/helper: pass explicit fpst to set_rmode
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (3 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 04/31] target/arm/cpu.h: add additional float_status flags Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 06/31] arm/translate-a64: implement half-precision F(MIN|MAX)(V|NMV) Alex Bennée
` (28 subsequent siblings)
33 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
As the rounding mode is now split between FP16 and the rest of
floating point we need to be explicit when tweaking it. Instead of
passing the CPU env we now pass the appropriate fpst pointer directly.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/helper.c | 4 ++--
target/arm/helper.h | 2 +-
target/arm/translate-a64.c | 26 +++++++++++++-------------
target/arm/translate.c | 12 ++++++------
4 files changed, 22 insertions(+), 22 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index f450eb200f..303cd1eaf9 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -11393,9 +11393,9 @@ VFP_CONV_FIX_A64(uq, s, 32, 64, uint64)
/* Set the current fp rounding mode and return the old one.
* The argument is a softfloat float_round_ value.
*/
-uint32_t HELPER(set_rmode)(uint32_t rmode, CPUARMState *env)
+uint32_t HELPER(set_rmode)(uint32_t rmode, void *fpstp)
{
- float_status *fp_status = &env->vfp.fp_status;
+ float_status *fp_status = fpstp;
uint32_t prev_rmode = get_float_rounding_mode(fp_status);
set_float_rounding_mode(rmode, fp_status);
diff --git a/target/arm/helper.h b/target/arm/helper.h
index 6383d7d09e..81ecb319b3 100644
--- a/target/arm/helper.h
+++ b/target/arm/helper.h
@@ -167,7 +167,7 @@ DEF_HELPER_3(vfp_uhtod, f64, i64, i32, ptr)
DEF_HELPER_3(vfp_ultod, f64, i64, i32, ptr)
DEF_HELPER_3(vfp_uqtod, f64, i64, i32, ptr)
-DEF_HELPER_FLAGS_2(set_rmode, TCG_CALL_NO_RWG, i32, i32, env)
+DEF_HELPER_FLAGS_2(set_rmode, TCG_CALL_NO_RWG, i32, i32, ptr)
DEF_HELPER_FLAGS_2(set_neon_rmode, TCG_CALL_NO_RWG, i32, i32, env)
DEF_HELPER_2(vfp_fcvt_f16_to_f32, f32, i32, env)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 2c64d2b3fe..91c2b8ed11 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -4628,10 +4628,10 @@ static void handle_fp_1src_single(DisasContext *s, int opcode, int rd, int rn)
{
TCGv_i32 tcg_rmode = tcg_const_i32(arm_rmode_to_sf(opcode & 7));
- gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
+ gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
gen_helper_rints(tcg_res, tcg_op, fpst);
- gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
+ gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
tcg_temp_free_i32(tcg_rmode);
break;
}
@@ -4687,10 +4687,10 @@ static void handle_fp_1src_double(DisasContext *s, int opcode, int rd, int rn)
{
TCGv_i32 tcg_rmode = tcg_const_i32(arm_rmode_to_sf(opcode & 7));
- gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
+ gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
gen_helper_rintd(tcg_res, tcg_op, fpst);
- gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
+ gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
tcg_temp_free_i32(tcg_rmode);
break;
}
@@ -5217,7 +5217,7 @@ static void handle_fpfpcvt(DisasContext *s, int rd, int rn, int opcode,
tcg_rmode = tcg_const_i32(arm_rmode_to_sf(rmode));
- gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
+ gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus);
if (is_double) {
TCGv_i64 tcg_double = read_fp_dreg(s, rn);
@@ -5264,7 +5264,7 @@ static void handle_fpfpcvt(DisasContext *s, int rd, int rn, int opcode,
tcg_temp_free_i32(tcg_single);
}
- gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
+ gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus);
tcg_temp_free_i32(tcg_rmode);
if (!sf) {
@@ -6984,8 +6984,8 @@ static void handle_simd_shift_fpint_conv(DisasContext *s, bool is_scalar,
assert(!(is_scalar && is_q));
tcg_rmode = tcg_const_i32(arm_rmode_to_sf(FPROUNDING_ZERO));
- gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
tcg_fpstatus = get_fpstatus_ptr(false);
+ gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus);
tcg_shift = tcg_const_i32(fracbits);
if (is_double) {
@@ -7029,7 +7029,7 @@ static void handle_simd_shift_fpint_conv(DisasContext *s, bool is_scalar,
tcg_temp_free_ptr(tcg_fpstatus);
tcg_temp_free_i32(tcg_shift);
- gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
+ gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus);
tcg_temp_free_i32(tcg_rmode);
}
@@ -8300,8 +8300,8 @@ static void disas_simd_scalar_two_reg_misc(DisasContext *s, uint32_t insn)
if (is_fcvt) {
tcg_rmode = tcg_const_i32(arm_rmode_to_sf(rmode));
- gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
tcg_fpstatus = get_fpstatus_ptr(false);
+ gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus);
} else {
tcg_rmode = NULL;
tcg_fpstatus = NULL;
@@ -8366,7 +8366,7 @@ static void disas_simd_scalar_two_reg_misc(DisasContext *s, uint32_t insn)
}
if (is_fcvt) {
- gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
+ gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus);
tcg_temp_free_i32(tcg_rmode);
tcg_temp_free_ptr(tcg_fpstatus);
}
@@ -10680,14 +10680,14 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
return;
}
- if (need_fpstatus) {
+ if (need_fpstatus || need_rmode) {
tcg_fpstatus = get_fpstatus_ptr(false);
} else {
tcg_fpstatus = NULL;
}
if (need_rmode) {
tcg_rmode = tcg_const_i32(arm_rmode_to_sf(rmode));
- gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
+ gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus);
} else {
tcg_rmode = NULL;
}
@@ -10929,7 +10929,7 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
clear_vec_high(s, is_q, rd);
if (need_rmode) {
- gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
+ gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus);
tcg_temp_free_i32(tcg_rmode);
}
if (need_fpstatus) {
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 1270022289..aa6dcaa577 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -3143,7 +3143,7 @@ static int handle_vrint(uint32_t insn, uint32_t rd, uint32_t rm, uint32_t dp,
TCGv_i32 tcg_rmode;
tcg_rmode = tcg_const_i32(arm_rmode_to_sf(rounding));
- gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
+ gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
if (dp) {
TCGv_i64 tcg_op;
@@ -3167,7 +3167,7 @@ static int handle_vrint(uint32_t insn, uint32_t rd, uint32_t rm, uint32_t dp,
tcg_temp_free_i32(tcg_res);
}
- gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
+ gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
tcg_temp_free_i32(tcg_rmode);
tcg_temp_free_ptr(fpst);
@@ -3184,7 +3184,7 @@ static int handle_vcvt(uint32_t insn, uint32_t rd, uint32_t rm, uint32_t dp,
tcg_shift = tcg_const_i32(0);
tcg_rmode = tcg_const_i32(arm_rmode_to_sf(rounding));
- gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
+ gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
if (dp) {
TCGv_i64 tcg_double, tcg_res;
@@ -3222,7 +3222,7 @@ static int handle_vcvt(uint32_t insn, uint32_t rd, uint32_t rm, uint32_t dp,
tcg_temp_free_i32(tcg_single);
}
- gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
+ gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
tcg_temp_free_i32(tcg_rmode);
tcg_temp_free_i32(tcg_shift);
@@ -3892,13 +3892,13 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn)
TCGv_ptr fpst = get_fpstatus_ptr(0);
TCGv_i32 tcg_rmode;
tcg_rmode = tcg_const_i32(float_round_to_zero);
- gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
+ gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
if (dp) {
gen_helper_rintd(cpu_F0d, cpu_F0d, fpst);
} else {
gen_helper_rints(cpu_F0s, cpu_F0s, fpst);
}
- gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env);
+ gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
tcg_temp_free_i32(tcg_rmode);
tcg_temp_free_ptr(fpst);
break;
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [Qemu-devel] [PATCH v3 06/31] arm/translate-a64: implement half-precision F(MIN|MAX)(V|NMV)
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (4 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 05/31] target/arm/helper: pass explicit fpst to set_rmode Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 07/31] arm/translate-a64: handle_3same_64 comment fix Alex Bennée
` (27 subsequent siblings)
33 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
This implements the half-precision variants of the across vector
reduction operations. This involves a re-factor of the reduction code
which more closely matches the ARM ARM order (and handles 8 element
reductions).
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
--
v1
- dropped the advsimd_2a stuff
v2
- fixed up checkpatch
v3
- add TCG_CALL_NO_RWG to helper definitions
---
target/arm/helper-a64.c | 18 ++++++
target/arm/helper-a64.h | 4 ++
target/arm/translate-a64.c | 142 ++++++++++++++++++++++++++++-----------------
3 files changed, 110 insertions(+), 54 deletions(-)
diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c
index 10e08bdc1f..fddd5d242b 100644
--- a/target/arm/helper-a64.c
+++ b/target/arm/helper-a64.c
@@ -572,3 +572,21 @@ uint64_t HELPER(paired_cmpxchg64_be_parallel)(CPUARMState *env, uint64_t addr,
{
return do_paired_cmpxchg64_be(env, addr, new_lo, new_hi, true, GETPC());
}
+
+/*
+ * AdvSIMD half-precision
+ */
+
+#define ADVSIMD_HELPER(name, suffix) HELPER(glue(glue(advsimd_, name), suffix))
+
+#define ADVSIMD_HALFOP(name) \
+float16 ADVSIMD_HELPER(name, h)(float16 a, float16 b, void *fpstp) \
+{ \
+ float_status *fpst = fpstp; \
+ return float16_ ## name(a, b, fpst); \
+}
+
+ADVSIMD_HALFOP(min)
+ADVSIMD_HALFOP(max)
+ADVSIMD_HALFOP(minnum)
+ADVSIMD_HALFOP(maxnum)
diff --git a/target/arm/helper-a64.h b/target/arm/helper-a64.h
index 85d86741db..cb2a73124d 100644
--- a/target/arm/helper-a64.h
+++ b/target/arm/helper-a64.h
@@ -48,3 +48,7 @@ DEF_HELPER_FLAGS_4(paired_cmpxchg64_le_parallel, TCG_CALL_NO_WG,
DEF_HELPER_FLAGS_4(paired_cmpxchg64_be, TCG_CALL_NO_WG, i64, env, i64, i64, i64)
DEF_HELPER_FLAGS_4(paired_cmpxchg64_be_parallel, TCG_CALL_NO_WG,
i64, env, i64, i64, i64)
+DEF_HELPER_FLAGS_3(advsimd_maxh, TCG_CALL_NO_RWG, f16, f16, f16, ptr)
+DEF_HELPER_FLAGS_3(advsimd_minh, TCG_CALL_NO_RWG, f16, f16, f16, ptr)
+DEF_HELPER_FLAGS_3(advsimd_maxnumh, TCG_CALL_NO_RWG, f16, f16, f16, ptr)
+DEF_HELPER_FLAGS_3(advsimd_minnumh, TCG_CALL_NO_RWG, f16, f16, f16, ptr)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 91c2b8ed11..ebaf4571ac 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -5741,26 +5741,75 @@ static void disas_simd_zip_trn(DisasContext *s, uint32_t insn)
tcg_temp_free_i64(tcg_resh);
}
-static void do_minmaxop(DisasContext *s, TCGv_i32 tcg_elt1, TCGv_i32 tcg_elt2,
- int opc, bool is_min, TCGv_ptr fpst)
-{
- /* Helper function for disas_simd_across_lanes: do a single precision
- * min/max operation on the specified two inputs,
- * and return the result in tcg_elt1.
- */
- if (opc == 0xc) {
- if (is_min) {
- gen_helper_vfp_minnums(tcg_elt1, tcg_elt1, tcg_elt2, fpst);
- } else {
- gen_helper_vfp_maxnums(tcg_elt1, tcg_elt1, tcg_elt2, fpst);
- }
+/*
+ * do_reduction_op helper
+ *
+ * This mirrors the Reduce() pseudocode in the ARM ARM. It is
+ * important for correct NaN propagation that we do these
+ * operations in exactly the order specified by the pseudocode.
+ *
+ * This is a recursive function, TCG temps should be freed by the
+ * calling function once it is done with the values.
+ */
+static TCGv_i32 do_reduction_op(DisasContext *s, int fpopcode, int rn,
+ int esize, int size, int vmap, TCGv_ptr fpst)
+{
+ if (esize == size) {
+ int element;
+ TCGMemOp msize = esize == 16 ? MO_16 : MO_32;
+ TCGv_i32 tcg_elem;
+
+ /* We should have one register left here */
+ assert(ctpop8(vmap) == 1);
+ element = ctz32(vmap);
+ assert(element < 8);
+
+ tcg_elem = tcg_temp_new_i32();
+ read_vec_element_i32(s, tcg_elem, rn, element, msize);
+ return tcg_elem;
} else {
- assert(opc == 0xf);
- if (is_min) {
- gen_helper_vfp_mins(tcg_elt1, tcg_elt1, tcg_elt2, fpst);
- } else {
- gen_helper_vfp_maxs(tcg_elt1, tcg_elt1, tcg_elt2, fpst);
+ int bits = size / 2;
+ int shift = ctpop8(vmap) / 2;
+ int vmap_lo = (vmap >> shift) & vmap;
+ int vmap_hi = (vmap & ~vmap_lo);
+ TCGv_i32 tcg_hi, tcg_lo, tcg_res;
+
+ tcg_hi = do_reduction_op(s, fpopcode, rn, esize, bits, vmap_hi, fpst);
+ tcg_lo = do_reduction_op(s, fpopcode, rn, esize, bits, vmap_lo, fpst);
+ tcg_res = tcg_temp_new_i32();
+
+ switch (fpopcode) {
+ case 0x0c: /* fmaxnmv half-precision */
+ gen_helper_advsimd_maxnumh(tcg_res, tcg_lo, tcg_hi, fpst);
+ break;
+ case 0x0f: /* fmaxv half-precision */
+ gen_helper_advsimd_maxh(tcg_res, tcg_lo, tcg_hi, fpst);
+ break;
+ case 0x1c: /* fminnmv half-precision */
+ gen_helper_advsimd_minnumh(tcg_res, tcg_lo, tcg_hi, fpst);
+ break;
+ case 0x1f: /* fminv half-precision */
+ gen_helper_advsimd_minh(tcg_res, tcg_lo, tcg_hi, fpst);
+ break;
+ case 0x2c: /* fmaxnmv */
+ gen_helper_vfp_maxnums(tcg_res, tcg_lo, tcg_hi, fpst);
+ break;
+ case 0x2f: /* fmaxv */
+ gen_helper_vfp_maxs(tcg_res, tcg_lo, tcg_hi, fpst);
+ break;
+ case 0x3c: /* fminnmv */
+ gen_helper_vfp_minnums(tcg_res, tcg_lo, tcg_hi, fpst);
+ break;
+ case 0x3f: /* fminv */
+ gen_helper_vfp_mins(tcg_res, tcg_lo, tcg_hi, fpst);
+ break;
+ default:
+ g_assert_not_reached();
}
+
+ tcg_temp_free_i32(tcg_hi);
+ tcg_temp_free_i32(tcg_lo);
+ return tcg_res;
}
}
@@ -5802,16 +5851,21 @@ static void disas_simd_across_lanes(DisasContext *s, uint32_t insn)
break;
case 0xc: /* FMAXNMV, FMINNMV */
case 0xf: /* FMAXV, FMINV */
- if (!is_u || !is_q || extract32(size, 0, 1)) {
- unallocated_encoding(s);
- return;
- }
- /* Bit 1 of size field encodes min vs max, and actual size is always
- * 32 bits: adjust the size variable so following code can rely on it
+ /* Bit 1 of size field encodes min vs max and the actual size
+ * depends on the encoding of the U bit. If not set (and FP16
+ * enabled) then we do half-precision float instead of single
+ * precision.
*/
is_min = extract32(size, 1, 1);
is_fp = true;
- size = 2;
+ if (!is_u && arm_dc_feature(s, ARM_FEATURE_V8_FP16)) {
+ size = 1;
+ } else if (!is_u || !is_q || extract32(size, 0, 1)) {
+ unallocated_encoding(s);
+ return;
+ } else {
+ size = 2;
+ }
break;
default:
unallocated_encoding(s);
@@ -5868,38 +5922,18 @@ static void disas_simd_across_lanes(DisasContext *s, uint32_t insn)
}
} else {
- /* Floating point ops which work on 32 bit (single) intermediates.
+ /* Floating point vector reduction ops which work across 32
+ * bit (single) or 16 bit (half-precision) intermediates.
* Note that correct NaN propagation requires that we do these
* operations in exactly the order specified by the pseudocode.
*/
- TCGv_i32 tcg_elt1 = tcg_temp_new_i32();
- TCGv_i32 tcg_elt2 = tcg_temp_new_i32();
- TCGv_i32 tcg_elt3 = tcg_temp_new_i32();
- TCGv_ptr fpst = get_fpstatus_ptr(false);
-
- assert(esize == 32);
- assert(elements == 4);
-
- read_vec_element(s, tcg_elt, rn, 0, MO_32);
- tcg_gen_extrl_i64_i32(tcg_elt1, tcg_elt);
- read_vec_element(s, tcg_elt, rn, 1, MO_32);
- tcg_gen_extrl_i64_i32(tcg_elt2, tcg_elt);
-
- do_minmaxop(s, tcg_elt1, tcg_elt2, opcode, is_min, fpst);
-
- read_vec_element(s, tcg_elt, rn, 2, MO_32);
- tcg_gen_extrl_i64_i32(tcg_elt2, tcg_elt);
- read_vec_element(s, tcg_elt, rn, 3, MO_32);
- tcg_gen_extrl_i64_i32(tcg_elt3, tcg_elt);
-
- do_minmaxop(s, tcg_elt2, tcg_elt3, opcode, is_min, fpst);
-
- do_minmaxop(s, tcg_elt1, tcg_elt2, opcode, is_min, fpst);
-
- tcg_gen_extu_i32_i64(tcg_res, tcg_elt1);
- tcg_temp_free_i32(tcg_elt1);
- tcg_temp_free_i32(tcg_elt2);
- tcg_temp_free_i32(tcg_elt3);
+ TCGv_ptr fpst = get_fpstatus_ptr(size == MO_16);
+ int fpopcode = opcode | is_min << 4 | is_u << 5;
+ int vmap = (1 << elements) - 1;
+ TCGv_i32 tcg_res32 = do_reduction_op(s, fpopcode, rn, esize,
+ (is_q ? 128 : 64), vmap, fpst);
+ tcg_gen_extu_i32_i64(tcg_res, tcg_res32);
+ tcg_temp_free_i32(tcg_res32);
tcg_temp_free_ptr(fpst);
}
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [Qemu-devel] [PATCH v3 07/31] arm/translate-a64: handle_3same_64 comment fix
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (5 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 06/31] arm/translate-a64: implement half-precision F(MIN|MAX)(V|NMV) Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 08/31] arm/translate-a64: initial decode for simd_three_reg_same_fp16 Alex Bennée
` (26 subsequent siblings)
33 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
We do implement all the opcodes.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate-a64.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index ebaf4571ac..5dd54b7ac4 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -7278,8 +7278,7 @@ static void handle_3same_64(DisasContext *s, int opcode, bool u,
/* Handle 64x64->64 opcodes which are shared between the scalar
* and vector 3-same groups. We cover every opcode where size == 3
* is valid in either the three-reg-same (integer, not pairwise)
- * or scalar-three-reg-same groups. (Some opcodes are not yet
- * implemented.)
+ * or scalar-three-reg-same groups.
*/
TCGCond cond;
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [Qemu-devel] [PATCH v3 08/31] arm/translate-a64: initial decode for simd_three_reg_same_fp16
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (6 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 07/31] arm/translate-a64: handle_3same_64 comment fix Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 09/31] arm/translate-a64: add FP16 FADD/FABD/FSUB/FMUL/FDIV to simd_three_reg_same_fp16 Alex Bennée
` (25 subsequent siblings)
33 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
This is the initial decode skeleton for the Advanced SIMD three same
instruction group.
The fprintf is purely to aid debugging as the additional instructions
are added. It will be removed once the group is complete.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate-a64.c | 73 ++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 73 insertions(+)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 5dd54b7ac4..4828457b5b 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -10228,6 +10228,78 @@ static void disas_simd_three_reg_same(DisasContext *s, uint32_t insn)
}
}
+/*
+ * Advanced SIMD three same (ARMv8.2 FP16 variants)
+ *
+ * 31 30 29 28 24 23 22 21 20 16 15 14 13 11 10 9 5 4 0
+ * +---+---+---+-----------+---------+------+-----+--------+---+------+------+
+ * | 0 | Q | U | 0 1 1 1 0 | a | 1 0 | Rm | 0 0 | opcode | 1 | Rn | Rd |
+ * +---+---+---+-----------+---------+------+-----+--------+---+------+------+
+ *
+ * This includes FMULX, FCMEQ (register), FRECPS, FRSQRTS, FCMGE
+ * (register), FACGE, FABD, FCMGT (register) and FACGT.
+ *
+ */
+static void disas_simd_three_reg_same_fp16(DisasContext *s, uint32_t insn)
+{
+ int opcode, fpopcode;
+ int is_q, u, a, rm, rn, rd;
+ int datasize, elements;
+ int pass;
+ TCGv_ptr fpst;
+
+ if (!arm_dc_feature(s, ARM_FEATURE_V8_FP16)) {
+ unallocated_encoding(s);
+ return;
+ }
+
+ if (!fp_access_check(s)) {
+ return;
+ }
+
+ /* For these floating point ops, the U, a and opcode bits
+ * together indicate the operation.
+ */
+ opcode = extract32(insn, 11, 3);
+ u = extract32(insn, 29, 1);
+ a = extract32(insn, 23, 1);
+ is_q = extract32(insn, 30, 1);
+ rm = extract32(insn, 16, 5);
+ rn = extract32(insn, 5, 5);
+ rd = extract32(insn, 0, 5);
+
+ fpopcode = opcode | (a << 3) | (u << 4);
+ datasize = is_q ? 128 : 64;
+ elements = datasize / 16;
+
+ fpst = get_fpstatus_ptr(true);
+
+ for (pass = 0; pass < elements; pass++) {
+ TCGv_i32 tcg_op1 = tcg_temp_new_i32();
+ TCGv_i32 tcg_op2 = tcg_temp_new_i32();
+ TCGv_i32 tcg_res = tcg_temp_new_i32();
+
+ read_vec_element_i32(s, tcg_op1, rn, pass, MO_16);
+ read_vec_element_i32(s, tcg_op2, rm, pass, MO_16);
+
+ switch (fpopcode) {
+ default:
+ fprintf(stderr, "%s: insn %#04x, fpop %#2x @ %#" PRIx64 "\n",
+ __func__, insn, fpopcode, s->pc);
+ g_assert_not_reached();
+ }
+
+ write_vec_element_i32(s, tcg_res, rd, pass, MO_16);
+ tcg_temp_free_i32(tcg_res);
+ tcg_temp_free_i32(tcg_op1);
+ tcg_temp_free_i32(tcg_op2);
+ }
+
+ tcg_temp_free_ptr(fpst);
+
+ clear_vec_high(s, is_q, rd);
+}
+
static void handle_2misc_widening(DisasContext *s, int opcode, bool is_q,
int size, int rn, int rd)
{
@@ -11975,6 +12047,7 @@ static const AArch64DecodeTable data_proc_simd[] = {
{ 0xce000000, 0xff808000, disas_crypto_four_reg },
{ 0xce800000, 0xffe00000, disas_crypto_xar },
{ 0xce408000, 0xffe0c000, disas_crypto_three_reg_imm2 },
+ { 0x0e400400, 0x9f60c400, disas_simd_three_reg_same_fp16 },
{ 0x00000000, 0x00000000, NULL }
};
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [Qemu-devel] [PATCH v3 09/31] arm/translate-a64: add FP16 FADD/FABD/FSUB/FMUL/FDIV to simd_three_reg_same_fp16
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (7 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 08/31] arm/translate-a64: initial decode for simd_three_reg_same_fp16 Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 10/31] arm/translate-a64: add FP16 F[A]C[EQ/GE/GT] " Alex Bennée
` (24 subsequent siblings)
33 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
The fprintf is only there for debugging as the skeleton is added to,
it will be removed once the skeleton is complete.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
v2
- add absh helper
- fix checkpatch violation
- make abs a bitwise operation
---
target/arm/helper-a64.c | 4 ++++
target/arm/helper-a64.h | 4 ++++
target/arm/translate-a64.c | 28 ++++++++++++++++++++++++++++
3 files changed, 36 insertions(+)
diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c
index fddd5d242b..931a6d3c34 100644
--- a/target/arm/helper-a64.c
+++ b/target/arm/helper-a64.c
@@ -586,6 +586,10 @@ float16 ADVSIMD_HELPER(name, h)(float16 a, float16 b, void *fpstp) \
return float16_ ## name(a, b, fpst); \
}
+ADVSIMD_HALFOP(add)
+ADVSIMD_HALFOP(sub)
+ADVSIMD_HALFOP(mul)
+ADVSIMD_HALFOP(div)
ADVSIMD_HALFOP(min)
ADVSIMD_HALFOP(max)
ADVSIMD_HALFOP(minnum)
diff --git a/target/arm/helper-a64.h b/target/arm/helper-a64.h
index cb2a73124d..bac9469426 100644
--- a/target/arm/helper-a64.h
+++ b/target/arm/helper-a64.h
@@ -52,3 +52,7 @@ DEF_HELPER_FLAGS_3(advsimd_maxh, TCG_CALL_NO_RWG, f16, f16, f16, ptr)
DEF_HELPER_FLAGS_3(advsimd_minh, TCG_CALL_NO_RWG, f16, f16, f16, ptr)
DEF_HELPER_FLAGS_3(advsimd_maxnumh, TCG_CALL_NO_RWG, f16, f16, f16, ptr)
DEF_HELPER_FLAGS_3(advsimd_minnumh, TCG_CALL_NO_RWG, f16, f16, f16, ptr)
+DEF_HELPER_3(advsimd_addh, f16, f16, f16, ptr)
+DEF_HELPER_3(advsimd_subh, f16, f16, f16, ptr)
+DEF_HELPER_3(advsimd_mulh, f16, f16, f16, ptr)
+DEF_HELPER_3(advsimd_divh, f16, f16, f16, ptr)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 4828457b5b..f8770ee1e9 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -10283,6 +10283,34 @@ static void disas_simd_three_reg_same_fp16(DisasContext *s, uint32_t insn)
read_vec_element_i32(s, tcg_op2, rm, pass, MO_16);
switch (fpopcode) {
+ case 0x0: /* FMAXNM */
+ gen_helper_advsimd_maxnumh(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x2: /* FADD */
+ gen_helper_advsimd_addh(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x6: /* FMAX */
+ gen_helper_advsimd_maxh(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x8: /* FMINNM */
+ gen_helper_advsimd_minnumh(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0xa: /* FSUB */
+ gen_helper_advsimd_subh(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0xe: /* FMIN */
+ gen_helper_advsimd_minh(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x13: /* FMUL */
+ gen_helper_advsimd_mulh(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x17: /* FDIV */
+ gen_helper_advsimd_divh(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x1a: /* FABD */
+ gen_helper_advsimd_subh(tcg_res, tcg_op1, tcg_op2, fpst);
+ tcg_gen_andi_i32(tcg_res, tcg_res, 0x7fff);
+ break;
default:
fprintf(stderr, "%s: insn %#04x, fpop %#2x @ %#" PRIx64 "\n",
__func__, insn, fpopcode, s->pc);
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [Qemu-devel] [PATCH v3 10/31] arm/translate-a64: add FP16 F[A]C[EQ/GE/GT] to simd_three_reg_same_fp16
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (8 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 09/31] arm/translate-a64: add FP16 FADD/FABD/FSUB/FMUL/FDIV to simd_three_reg_same_fp16 Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 11/31] arm/translate-a64: add FP16 FMULA/X/S " Alex Bennée
` (23 subsequent siblings)
33 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
These use the generic float16_compare functionality which in turn uses
the common float_compare code from the softfloat re-factor.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/helper-a64.c | 49 ++++++++++++++++++++++++++++++++++++++++++++++
target/arm/helper-a64.h | 5 +++++
target/arm/translate-a64.c | 15 ++++++++++++++
3 files changed, 69 insertions(+)
diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c
index 931a6d3c34..d0b284fec4 100644
--- a/target/arm/helper-a64.c
+++ b/target/arm/helper-a64.c
@@ -594,3 +594,52 @@ ADVSIMD_HALFOP(min)
ADVSIMD_HALFOP(max)
ADVSIMD_HALFOP(minnum)
ADVSIMD_HALFOP(maxnum)
+
+/*
+ * Floating point comparisons produce an integer result. Softfloat
+ * routines return float_relation types which we convert to the 0/-1
+ * Neon requires.
+ */
+
+#define ADVSIMD_CMPRES(test) (test) ? 0xffff : 0
+
+uint32_t HELPER(advsimd_ceq_f16)(float16 a, float16 b, void *fpstp)
+{
+ float_status *fpst = fpstp;
+ int compare = float16_compare_quiet(a, b, fpst);
+ return ADVSIMD_CMPRES(compare == float_relation_equal);
+}
+
+uint32_t HELPER(advsimd_cge_f16)(float16 a, float16 b, void *fpstp)
+{
+ float_status *fpst = fpstp;
+ int compare = float16_compare(a, b, fpst);
+ return ADVSIMD_CMPRES(compare == float_relation_greater ||
+ compare == float_relation_equal);
+}
+
+uint32_t HELPER(advsimd_cgt_f16)(float16 a, float16 b, void *fpstp)
+{
+ float_status *fpst = fpstp;
+ int compare = float16_compare(a, b, fpst);
+ return ADVSIMD_CMPRES(compare == float_relation_greater);
+}
+
+uint32_t HELPER(advsimd_acge_f16)(float16 a, float16 b, void *fpstp)
+{
+ float_status *fpst = fpstp;
+ float16 f0 = float16_abs(a);
+ float16 f1 = float16_abs(b);
+ int compare = float16_compare(f0, f1, fpst);
+ return ADVSIMD_CMPRES(compare == float_relation_greater ||
+ compare == float_relation_equal);
+}
+
+uint32_t HELPER(advsimd_acgt_f16)(float16 a, float16 b, void *fpstp)
+{
+ float_status *fpst = fpstp;
+ float16 f0 = float16_abs(a);
+ float16 f1 = float16_abs(b);
+ int compare = float16_compare(f0, f1, fpst);
+ return ADVSIMD_CMPRES(compare == float_relation_greater);
+}
diff --git a/target/arm/helper-a64.h b/target/arm/helper-a64.h
index bac9469426..1cf40bda5e 100644
--- a/target/arm/helper-a64.h
+++ b/target/arm/helper-a64.h
@@ -56,3 +56,8 @@ DEF_HELPER_3(advsimd_addh, f16, f16, f16, ptr)
DEF_HELPER_3(advsimd_subh, f16, f16, f16, ptr)
DEF_HELPER_3(advsimd_mulh, f16, f16, f16, ptr)
DEF_HELPER_3(advsimd_divh, f16, f16, f16, ptr)
+DEF_HELPER_3(advsimd_ceq_f16, i32, f16, f16, ptr)
+DEF_HELPER_3(advsimd_cge_f16, i32, f16, f16, ptr)
+DEF_HELPER_3(advsimd_cgt_f16, i32, f16, f16, ptr)
+DEF_HELPER_3(advsimd_acge_f16, i32, f16, f16, ptr)
+DEF_HELPER_3(advsimd_acgt_f16, i32, f16, f16, ptr)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index f8770ee1e9..fb74dc1c45 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -10289,6 +10289,9 @@ static void disas_simd_three_reg_same_fp16(DisasContext *s, uint32_t insn)
case 0x2: /* FADD */
gen_helper_advsimd_addh(tcg_res, tcg_op1, tcg_op2, fpst);
break;
+ case 0x4: /* FCMEQ */
+ gen_helper_advsimd_ceq_f16(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
case 0x6: /* FMAX */
gen_helper_advsimd_maxh(tcg_res, tcg_op1, tcg_op2, fpst);
break;
@@ -10304,6 +10307,12 @@ static void disas_simd_three_reg_same_fp16(DisasContext *s, uint32_t insn)
case 0x13: /* FMUL */
gen_helper_advsimd_mulh(tcg_res, tcg_op1, tcg_op2, fpst);
break;
+ case 0x14: /* FCMGE */
+ gen_helper_advsimd_cge_f16(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x15: /* FACGE */
+ gen_helper_advsimd_acge_f16(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
case 0x17: /* FDIV */
gen_helper_advsimd_divh(tcg_res, tcg_op1, tcg_op2, fpst);
break;
@@ -10311,6 +10320,12 @@ static void disas_simd_three_reg_same_fp16(DisasContext *s, uint32_t insn)
gen_helper_advsimd_subh(tcg_res, tcg_op1, tcg_op2, fpst);
tcg_gen_andi_i32(tcg_res, tcg_res, 0x7fff);
break;
+ case 0x1c: /* FCMGT */
+ gen_helper_advsimd_cgt_f16(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x1d: /* FACGT */
+ gen_helper_advsimd_acgt_f16(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
default:
fprintf(stderr, "%s: insn %#04x, fpop %#2x @ %#" PRIx64 "\n",
__func__, insn, fpopcode, s->pc);
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [Qemu-devel] [PATCH v3 11/31] arm/translate-a64: add FP16 FMULA/X/S to simd_three_reg_same_fp16
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (9 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 10/31] arm/translate-a64: add FP16 F[A]C[EQ/GE/GT] " Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 12/31] arm/translate-a64: add FP16 FR[ECP/SQRT]S " Alex Bennée
` (22 subsequent siblings)
33 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/helper-a64.c | 24 ++++++++++++++++++++++++
target/arm/helper-a64.h | 2 ++
target/arm/translate-a64.c | 15 +++++++++++++++
3 files changed, 41 insertions(+)
diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c
index d0b284fec4..1ef13abd76 100644
--- a/target/arm/helper-a64.c
+++ b/target/arm/helper-a64.c
@@ -595,6 +595,30 @@ ADVSIMD_HALFOP(max)
ADVSIMD_HALFOP(minnum)
ADVSIMD_HALFOP(maxnum)
+/* Data processing - scalar floating-point and advanced SIMD */
+float16 HELPER(advsimd_mulxh)(float16 a, float16 b, void *fpstp)
+{
+ float_status *fpst = fpstp;
+
+ a = float16_squash_input_denormal(a, fpst);
+ b = float16_squash_input_denormal(b, fpst);
+
+ if ((float16_is_zero(a) && float16_is_infinity(b)) ||
+ (float16_is_infinity(a) && float16_is_zero(b))) {
+ /* 2.0 with the sign bit set to sign(A) XOR sign(B) */
+ return make_float16((1U << 14) |
+ ((float16_val(a) ^ float16_val(b)) & (1U << 15)));
+ }
+ return float16_mul(a, b, fpst);
+}
+
+/* fused multiply-accumulate */
+float16 HELPER(advsimd_muladdh)(float16 a, float16 b, float16 c, void *fpstp)
+{
+ float_status *fpst = fpstp;
+ return float16_muladd(a, b, c, 0, fpst);
+}
+
/*
* Floating point comparisons produce an integer result. Softfloat
* routines return float_relation types which we convert to the 0/-1
diff --git a/target/arm/helper-a64.h b/target/arm/helper-a64.h
index 1cf40bda5e..9c1a95594c 100644
--- a/target/arm/helper-a64.h
+++ b/target/arm/helper-a64.h
@@ -61,3 +61,5 @@ DEF_HELPER_3(advsimd_cge_f16, i32, f16, f16, ptr)
DEF_HELPER_3(advsimd_cgt_f16, i32, f16, f16, ptr)
DEF_HELPER_3(advsimd_acge_f16, i32, f16, f16, ptr)
DEF_HELPER_3(advsimd_acgt_f16, i32, f16, f16, ptr)
+DEF_HELPER_3(advsimd_mulxh, f16, f16, f16, ptr)
+DEF_HELPER_4(advsimd_muladdh, f16, f16, f16, f16, ptr)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index fb74dc1c45..0e2d298687 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -10286,9 +10286,17 @@ static void disas_simd_three_reg_same_fp16(DisasContext *s, uint32_t insn)
case 0x0: /* FMAXNM */
gen_helper_advsimd_maxnumh(tcg_res, tcg_op1, tcg_op2, fpst);
break;
+ case 0x1: /* FMLA */
+ read_vec_element_i32(s, tcg_res, rd, pass, MO_16);
+ gen_helper_advsimd_muladdh(tcg_res, tcg_op1, tcg_op2, tcg_res,
+ fpst);
+ break;
case 0x2: /* FADD */
gen_helper_advsimd_addh(tcg_res, tcg_op1, tcg_op2, fpst);
break;
+ case 0x3: /* FMULX */
+ gen_helper_advsimd_mulxh(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
case 0x4: /* FCMEQ */
gen_helper_advsimd_ceq_f16(tcg_res, tcg_op1, tcg_op2, fpst);
break;
@@ -10298,6 +10306,13 @@ static void disas_simd_three_reg_same_fp16(DisasContext *s, uint32_t insn)
case 0x8: /* FMINNM */
gen_helper_advsimd_minnumh(tcg_res, tcg_op1, tcg_op2, fpst);
break;
+ case 0x9: /* FMLS */
+ /* As usual for ARM, separate negation for fused multiply-add */
+ tcg_gen_xori_i32(tcg_op1, tcg_op1, 0x8000);
+ read_vec_element_i32(s, tcg_res, rd, pass, MO_16);
+ gen_helper_advsimd_muladdh(tcg_res, tcg_op1, tcg_op2, tcg_res,
+ fpst);
+ break;
case 0xa: /* FSUB */
gen_helper_advsimd_subh(tcg_res, tcg_op1, tcg_op2, fpst);
break;
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [Qemu-devel] [PATCH v3 12/31] arm/translate-a64: add FP16 FR[ECP/SQRT]S to simd_three_reg_same_fp16
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (10 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 11/31] arm/translate-a64: add FP16 FMULA/X/S " Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 13/31] arm/translate-a64: add FP16 pairwise ops simd_three_reg_same_fp16 Alex Bennée
` (21 subsequent siblings)
33 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm
Cc: qemu-devel, richard.henderson, Alex Bennée, Aurelien Jarno,
Peter Maydell
As some of the constants here will also be needed
elsewhere (specifically for the upcoming SVE support) we move them out
to softfloat.h.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
v3
- move constants used for estimate to softfloat.h
---
include/fpu/softfloat.h | 16 ++++++++++++----
target/arm/helper-a64.c | 34 ++++++++++++++++++++++++++++++++++
target/arm/helper-a64.h | 2 ++
target/arm/translate-a64.c | 6 ++++++
4 files changed, 54 insertions(+), 4 deletions(-)
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index 9b7b5e34e2..27876e711c 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -306,8 +306,11 @@ static inline float16 float16_set_sign(float16 a, int sign)
}
#define float16_zero make_float16(0)
-#define float16_one make_float16(0x3c00)
#define float16_half make_float16(0x3800)
+#define float16_one make_float16(0x3c00)
+#define float16_one_point_five make_float16(0x3e00)
+#define float16_two make_float16(0x4000)
+#define float16_three make_float16(0x4200)
#define float16_infinity make_float16(0x7c00)
/*----------------------------------------------------------------------------
@@ -415,11 +418,13 @@ static inline float32 float32_set_sign(float32 a, int sign)
}
#define float32_zero make_float32(0)
-#define float32_one make_float32(0x3f800000)
#define float32_half make_float32(0x3f000000)
+#define float32_one make_float32(0x3f800000)
+#define float32_one_point_five make_float32(0x3fc00000)
+#define float32_two make_float32(0x40000000)
+#define float32_three make_float32(0x40400000)
#define float32_infinity make_float32(0x7f800000)
-
/*----------------------------------------------------------------------------
| The pattern for a default generated single-precision NaN.
*----------------------------------------------------------------------------*/
@@ -526,9 +531,12 @@ static inline float64 float64_set_sign(float64 a, int sign)
}
#define float64_zero make_float64(0)
+#define float64_half make_float64(0x3fe0000000000000LL)
#define float64_one make_float64(0x3ff0000000000000LL)
+#define float64_one_point_five make_float64(0x3FF8000000000000ULL)
+#define float64_two make_float64(0x4000000000000000ULL)
+#define float64_three make_float64(0x4008000000000000ULL)
#define float64_ln2 make_float64(0x3fe62e42fefa39efLL)
-#define float64_half make_float64(0x3fe0000000000000LL)
#define float64_infinity make_float64(0x7ff0000000000000LL)
/*----------------------------------------------------------------------------
diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c
index 1ef13abd76..8fdbe034f3 100644
--- a/target/arm/helper-a64.c
+++ b/target/arm/helper-a64.c
@@ -192,6 +192,10 @@ uint64_t HELPER(neon_cgt_f64)(float64 a, float64 b, void *fpstp)
* versions, these do a fully fused multiply-add or
* multiply-add-and-halve.
*/
+#define float16_two make_float16(0x4000)
+#define float16_three make_float16(0x4200)
+#define float16_one_point_five make_float16(0x3e00)
+
#define float32_two make_float32(0x40000000)
#define float32_three make_float32(0x40400000)
#define float32_one_point_five make_float32(0x3fc00000)
@@ -200,6 +204,21 @@ uint64_t HELPER(neon_cgt_f64)(float64 a, float64 b, void *fpstp)
#define float64_three make_float64(0x4008000000000000ULL)
#define float64_one_point_five make_float64(0x3FF8000000000000ULL)
+float16 HELPER(recpsf_f16)(float16 a, float16 b, void *fpstp)
+{
+ float_status *fpst = fpstp;
+
+ a = float16_squash_input_denormal(a, fpst);
+ b = float16_squash_input_denormal(b, fpst);
+
+ a = float16_chs(a);
+ if ((float16_is_infinity(a) && float16_is_zero(b)) ||
+ (float16_is_infinity(b) && float16_is_zero(a))) {
+ return float16_two;
+ }
+ return float16_muladd(a, b, float16_two, 0, fpst);
+}
+
float32 HELPER(recpsf_f32)(float32 a, float32 b, void *fpstp)
{
float_status *fpst = fpstp;
@@ -230,6 +249,21 @@ float64 HELPER(recpsf_f64)(float64 a, float64 b, void *fpstp)
return float64_muladd(a, b, float64_two, 0, fpst);
}
+float16 HELPER(rsqrtsf_f16)(float16 a, float16 b, void *fpstp)
+{
+ float_status *fpst = fpstp;
+
+ a = float16_squash_input_denormal(a, fpst);
+ b = float16_squash_input_denormal(b, fpst);
+
+ a = float16_chs(a);
+ if ((float16_is_infinity(a) && float16_is_zero(b)) ||
+ (float16_is_infinity(b) && float16_is_zero(a))) {
+ return float16_one_point_five;
+ }
+ return float16_muladd(a, b, float16_three, float_muladd_halve_result, fpst);
+}
+
float32 HELPER(rsqrtsf_f32)(float32 a, float32 b, void *fpstp)
{
float_status *fpst = fpstp;
diff --git a/target/arm/helper-a64.h b/target/arm/helper-a64.h
index 9c1a95594c..79012eee9d 100644
--- a/target/arm/helper-a64.h
+++ b/target/arm/helper-a64.h
@@ -29,8 +29,10 @@ DEF_HELPER_FLAGS_3(vfp_mulxd, TCG_CALL_NO_RWG, f64, f64, f64, ptr)
DEF_HELPER_FLAGS_3(neon_ceq_f64, TCG_CALL_NO_RWG, i64, i64, i64, ptr)
DEF_HELPER_FLAGS_3(neon_cge_f64, TCG_CALL_NO_RWG, i64, i64, i64, ptr)
DEF_HELPER_FLAGS_3(neon_cgt_f64, TCG_CALL_NO_RWG, i64, i64, i64, ptr)
+DEF_HELPER_FLAGS_3(recpsf_f16, TCG_CALL_NO_RWG, f16, f16, f16, ptr)
DEF_HELPER_FLAGS_3(recpsf_f32, TCG_CALL_NO_RWG, f32, f32, f32, ptr)
DEF_HELPER_FLAGS_3(recpsf_f64, TCG_CALL_NO_RWG, f64, f64, f64, ptr)
+DEF_HELPER_FLAGS_3(rsqrtsf_f16, TCG_CALL_NO_RWG, f16, f16, f16, ptr)
DEF_HELPER_FLAGS_3(rsqrtsf_f32, TCG_CALL_NO_RWG, f32, f32, f32, ptr)
DEF_HELPER_FLAGS_3(rsqrtsf_f64, TCG_CALL_NO_RWG, f64, f64, f64, ptr)
DEF_HELPER_FLAGS_1(neon_addlp_s8, TCG_CALL_NO_RWG_SE, i64, i64)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 0e2d298687..217e73ef58 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -10303,6 +10303,9 @@ static void disas_simd_three_reg_same_fp16(DisasContext *s, uint32_t insn)
case 0x6: /* FMAX */
gen_helper_advsimd_maxh(tcg_res, tcg_op1, tcg_op2, fpst);
break;
+ case 0x7: /* FRECPS */
+ gen_helper_recpsf_f16(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
case 0x8: /* FMINNM */
gen_helper_advsimd_minnumh(tcg_res, tcg_op1, tcg_op2, fpst);
break;
@@ -10319,6 +10322,9 @@ static void disas_simd_three_reg_same_fp16(DisasContext *s, uint32_t insn)
case 0xe: /* FMIN */
gen_helper_advsimd_minh(tcg_res, tcg_op1, tcg_op2, fpst);
break;
+ case 0xf: /* FRSQRTS */
+ gen_helper_rsqrtsf_f16(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
case 0x13: /* FMUL */
gen_helper_advsimd_mulh(tcg_res, tcg_op1, tcg_op2, fpst);
break;
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [Qemu-devel] [PATCH v3 13/31] arm/translate-a64: add FP16 pairwise ops simd_three_reg_same_fp16
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (11 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 12/31] arm/translate-a64: add FP16 FR[ECP/SQRT]S " Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-23 23:59 ` Richard Henderson
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 14/31] arm/translate-a64: add FP16 FMULX/MLS/FMLA to simd_indexed Alex Bennée
` (20 subsequent siblings)
33 siblings, 1 reply; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
This includes FMAXNMP, FADDP, FMAXP, FMINNMP, FMINP.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
v2
- checkpatch fixes
---
target/arm/translate-a64.c | 208 +++++++++++++++++++++++++++++----------------
1 file changed, 133 insertions(+), 75 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 217e73ef58..e96e6cdd15 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -10247,6 +10247,7 @@ static void disas_simd_three_reg_same_fp16(DisasContext *s, uint32_t insn)
int datasize, elements;
int pass;
TCGv_ptr fpst;
+ bool pairwise = false;
if (!arm_dc_feature(s, ARM_FEATURE_V8_FP16)) {
unallocated_encoding(s);
@@ -10272,91 +10273,148 @@ static void disas_simd_three_reg_same_fp16(DisasContext *s, uint32_t insn)
datasize = is_q ? 128 : 64;
elements = datasize / 16;
+ switch (fpopcode) {
+ case 0x10: /* FMAXNMP */
+ case 0x12: /* FADDP */
+ case 0x16: /* FMAXP */
+ case 0x18: /* FMINNMP */
+ case 0x1e: /* FMINP */
+ pairwise = true;
+ break;
+ }
+
fpst = get_fpstatus_ptr(true);
- for (pass = 0; pass < elements; pass++) {
+ if (pairwise) {
+ int maxpass = is_q ? 8 : 4;
TCGv_i32 tcg_op1 = tcg_temp_new_i32();
TCGv_i32 tcg_op2 = tcg_temp_new_i32();
- TCGv_i32 tcg_res = tcg_temp_new_i32();
+ TCGv_i32 tcg_res[8];
- read_vec_element_i32(s, tcg_op1, rn, pass, MO_16);
- read_vec_element_i32(s, tcg_op2, rm, pass, MO_16);
+ for (pass = 0; pass < maxpass; pass++) {
+ int passreg = pass < (maxpass / 2) ? rn : rm;
+ int passelt = (pass << 1) & (maxpass - 1);
- switch (fpopcode) {
- case 0x0: /* FMAXNM */
- gen_helper_advsimd_maxnumh(tcg_res, tcg_op1, tcg_op2, fpst);
- break;
- case 0x1: /* FMLA */
- read_vec_element_i32(s, tcg_res, rd, pass, MO_16);
- gen_helper_advsimd_muladdh(tcg_res, tcg_op1, tcg_op2, tcg_res,
- fpst);
- break;
- case 0x2: /* FADD */
- gen_helper_advsimd_addh(tcg_res, tcg_op1, tcg_op2, fpst);
- break;
- case 0x3: /* FMULX */
- gen_helper_advsimd_mulxh(tcg_res, tcg_op1, tcg_op2, fpst);
- break;
- case 0x4: /* FCMEQ */
- gen_helper_advsimd_ceq_f16(tcg_res, tcg_op1, tcg_op2, fpst);
- break;
- case 0x6: /* FMAX */
- gen_helper_advsimd_maxh(tcg_res, tcg_op1, tcg_op2, fpst);
- break;
- case 0x7: /* FRECPS */
- gen_helper_recpsf_f16(tcg_res, tcg_op1, tcg_op2, fpst);
- break;
- case 0x8: /* FMINNM */
- gen_helper_advsimd_minnumh(tcg_res, tcg_op1, tcg_op2, fpst);
- break;
- case 0x9: /* FMLS */
- /* As usual for ARM, separate negation for fused multiply-add */
- tcg_gen_xori_i32(tcg_op1, tcg_op1, 0x8000);
- read_vec_element_i32(s, tcg_res, rd, pass, MO_16);
- gen_helper_advsimd_muladdh(tcg_res, tcg_op1, tcg_op2, tcg_res,
- fpst);
- break;
- case 0xa: /* FSUB */
- gen_helper_advsimd_subh(tcg_res, tcg_op1, tcg_op2, fpst);
- break;
- case 0xe: /* FMIN */
- gen_helper_advsimd_minh(tcg_res, tcg_op1, tcg_op2, fpst);
- break;
- case 0xf: /* FRSQRTS */
- gen_helper_rsqrtsf_f16(tcg_res, tcg_op1, tcg_op2, fpst);
- break;
- case 0x13: /* FMUL */
- gen_helper_advsimd_mulh(tcg_res, tcg_op1, tcg_op2, fpst);
- break;
- case 0x14: /* FCMGE */
- gen_helper_advsimd_cge_f16(tcg_res, tcg_op1, tcg_op2, fpst);
- break;
- case 0x15: /* FACGE */
- gen_helper_advsimd_acge_f16(tcg_res, tcg_op1, tcg_op2, fpst);
- break;
- case 0x17: /* FDIV */
- gen_helper_advsimd_divh(tcg_res, tcg_op1, tcg_op2, fpst);
- break;
- case 0x1a: /* FABD */
- gen_helper_advsimd_subh(tcg_res, tcg_op1, tcg_op2, fpst);
- tcg_gen_andi_i32(tcg_res, tcg_res, 0x7fff);
- break;
- case 0x1c: /* FCMGT */
- gen_helper_advsimd_cgt_f16(tcg_res, tcg_op1, tcg_op2, fpst);
- break;
- case 0x1d: /* FACGT */
- gen_helper_advsimd_acgt_f16(tcg_res, tcg_op1, tcg_op2, fpst);
- break;
- default:
- fprintf(stderr, "%s: insn %#04x, fpop %#2x @ %#" PRIx64 "\n",
- __func__, insn, fpopcode, s->pc);
- g_assert_not_reached();
+ read_vec_element_i32(s, tcg_op1, passreg, passelt, MO_16);
+ read_vec_element_i32(s, tcg_op2, passreg, passelt + 1, MO_16);
+ tcg_res[pass] = tcg_temp_new_i32();
+
+ switch (fpopcode) {
+ case 0x10: /* FMAXNMP */
+ gen_helper_advsimd_maxnumh(tcg_res[pass], tcg_op1, tcg_op2,
+ fpst);
+ break;
+ case 0x12: /* FADDP */
+ gen_helper_advsimd_addh(tcg_res[pass], tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x16: /* FMAXP */
+ gen_helper_advsimd_maxh(tcg_res[pass], tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x18: /* FMINNMP */
+ gen_helper_advsimd_minnumh(tcg_res[pass], tcg_op1, tcg_op2,
+ fpst);
+ break;
+ case 0x1e: /* FMINP */
+ gen_helper_advsimd_minh(tcg_res[pass], tcg_op1, tcg_op2, fpst);
+ break;
+ default:
+ g_assert_not_reached();
+ }
+ }
+
+ for (pass = 0; pass < maxpass; pass++) {
+ write_vec_element_i32(s, tcg_res[pass], rd, pass, MO_16);
+ tcg_temp_free_i32(tcg_res[pass]);
}
- write_vec_element_i32(s, tcg_res, rd, pass, MO_16);
- tcg_temp_free_i32(tcg_res);
tcg_temp_free_i32(tcg_op1);
tcg_temp_free_i32(tcg_op2);
+
+ } else {
+ for (pass = 0; pass < elements; pass++) {
+ TCGv_i32 tcg_op1 = tcg_temp_new_i32();
+ TCGv_i32 tcg_op2 = tcg_temp_new_i32();
+ TCGv_i32 tcg_res = tcg_temp_new_i32();
+
+ read_vec_element_i32(s, tcg_op1, rn, pass, MO_16);
+ read_vec_element_i32(s, tcg_op2, rm, pass, MO_16);
+
+ switch (fpopcode) {
+ case 0x0: /* FMAXNM */
+ gen_helper_advsimd_maxnumh(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x1: /* FMLA */
+ read_vec_element_i32(s, tcg_res, rd, pass, MO_16);
+ gen_helper_advsimd_muladdh(tcg_res, tcg_op1, tcg_op2, tcg_res,
+ fpst);
+ break;
+ case 0x2: /* FADD */
+ gen_helper_advsimd_addh(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x3: /* FMULX */
+ gen_helper_advsimd_mulxh(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x4: /* FCMEQ */
+ gen_helper_advsimd_ceq_f16(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x6: /* FMAX */
+ gen_helper_advsimd_maxh(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x7: /* FRECPS */
+ gen_helper_recpsf_f16(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x8: /* FMINNM */
+ gen_helper_advsimd_minnumh(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x9: /* FMLS */
+ /* As usual for ARM, separate negation for fused multiply-add */
+ tcg_gen_xori_i32(tcg_op1, tcg_op1, 0x8000);
+ read_vec_element_i32(s, tcg_res, rd, pass, MO_16);
+ gen_helper_advsimd_muladdh(tcg_res, tcg_op1, tcg_op2, tcg_res,
+ fpst);
+ break;
+ case 0xa: /* FSUB */
+ gen_helper_advsimd_subh(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0xe: /* FMIN */
+ gen_helper_advsimd_minh(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0xf: /* FRSQRTS */
+ gen_helper_rsqrtsf_f16(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x13: /* FMUL */
+ gen_helper_advsimd_mulh(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x14: /* FCMGE */
+ gen_helper_advsimd_cge_f16(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x15: /* FACGE */
+ gen_helper_advsimd_acge_f16(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x17: /* FDIV */
+ gen_helper_advsimd_divh(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x1a: /* FABD */
+ gen_helper_advsimd_subh(tcg_res, tcg_op1, tcg_op2, fpst);
+ tcg_gen_andi_i32(tcg_res, tcg_res, 0x7fff);
+ break;
+ case 0x1c: /* FCMGT */
+ gen_helper_advsimd_cgt_f16(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x1d: /* FACGT */
+ gen_helper_advsimd_acgt_f16(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ default:
+ fprintf(stderr, "%s: insn %#04x, fpop %#2x @ %#" PRIx64 "\n",
+ __func__, insn, fpopcode, s->pc);
+ g_assert_not_reached();
+ }
+
+ write_vec_element_i32(s, tcg_res, rd, pass, MO_16);
+ tcg_temp_free_i32(tcg_res);
+ tcg_temp_free_i32(tcg_op1);
+ tcg_temp_free_i32(tcg_op2);
+ }
}
tcg_temp_free_ptr(fpst);
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* Re: [Qemu-devel] [PATCH v3 13/31] arm/translate-a64: add FP16 pairwise ops simd_three_reg_same_fp16
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 13/31] arm/translate-a64: add FP16 pairwise ops simd_three_reg_same_fp16 Alex Bennée
@ 2018-02-23 23:59 ` Richard Henderson
0 siblings, 0 replies; 46+ messages in thread
From: Richard Henderson @ 2018-02-23 23:59 UTC (permalink / raw)
To: Alex Bennée, qemu-arm; +Cc: qemu-devel, Peter Maydell
On 02/23/2018 07:36 AM, Alex Bennée wrote:
> This includes FMAXNMP, FADDP, FMAXP, FMINNMP, FMINP.
>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>
> ---
> v2
> - checkpatch fixes
> ---
> target/arm/translate-a64.c | 208 +++++++++++++++++++++++++++++----------------
> 1 file changed, 133 insertions(+), 75 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 46+ messages in thread
* [Qemu-devel] [PATCH v3 14/31] arm/translate-a64: add FP16 FMULX/MLS/FMLA to simd_indexed
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (12 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 13/31] arm/translate-a64: add FP16 pairwise ops simd_three_reg_same_fp16 Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-24 0:03 ` Richard Henderson
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 15/31] arm/translate-a64: add FP16 x2 ops for simd_indexed Alex Bennée
` (19 subsequent siblings)
33 siblings, 1 reply; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
The helpers use the new re-factored muladd support in SoftFloat for
the float16 work.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
v3
- re-jigged switch statement to fall-through for unalloc
- added is_fp16 bool for fpst
- fixed up some long lines
---
target/arm/translate-a64.c | 83 +++++++++++++++++++++++++++++++++++++---------
1 file changed, 67 insertions(+), 16 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index e96e6cdd15..43bff5cd09 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -11198,6 +11198,7 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
int rd = extract32(insn, 0, 5);
bool is_long = false;
bool is_fp = false;
+ bool is_fp16 = false;
int index;
TCGv_ptr fpst;
@@ -11244,7 +11245,8 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
}
/* fall through */
case 0x9: /* FMUL, FMULX */
- if (!extract32(size, 1, 1)) {
+ if (size == 1 ||
+ (size < 2 && !arm_dc_feature(s, ARM_FEATURE_V8_FP16))) {
unallocated_encoding(s);
return;
}
@@ -11256,18 +11258,34 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
}
if (is_fp) {
- /* low bit of size indicates single/double */
- size = extract32(size, 0, 1) ? 3 : 2;
- if (size == 2) {
+ /* convert insn encoded size to TCGMemOp size */
+ switch (size) {
+ case 2: /* single precision */
+ size = MO_32;
index = h << 1 | l;
- } else {
+ rm |= (m << 4);
+ break;
+ case 3: /* double precision */
+ size = MO_64;
if (l || !is_q) {
unallocated_encoding(s);
return;
}
index = h;
+ rm |= (m << 4);
+ break;
+ case 0: /* half precision */
+ size = MO_16;
+ index = h << 2 | l << 1 | m;
+ is_fp16 = true;
+ if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) {
+ break;
+ }
+ /* fallthru */
+ default: /* unallocated */
+ unallocated_encoding(s);
+ return;
}
- rm |= (m << 4);
} else {
switch (size) {
case 1:
@@ -11288,7 +11306,7 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
}
if (is_fp) {
- fpst = get_fpstatus_ptr(false);
+ fpst = get_fpstatus_ptr(is_fp16);
} else {
fpst = NULL;
}
@@ -11390,18 +11408,51 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
break;
}
case 0x5: /* FMLS */
- /* As usual for ARM, separate negation for fused multiply-add */
- gen_helper_vfp_negs(tcg_op, tcg_op);
- /* fall through */
case 0x1: /* FMLA */
- read_vec_element_i32(s, tcg_res, rd, pass, MO_32);
- gen_helper_vfp_muladds(tcg_res, tcg_op, tcg_idx, tcg_res, fpst);
+ read_vec_element_i32(s, tcg_res, rd, pass,
+ is_scalar ? size : MO_32);
+ switch (size) {
+ case 1:
+ if (opcode == 0x5) {
+ /* As usual for ARM, separate negation for fused
+ * multiply-add */
+ tcg_gen_xori_i32(tcg_op, tcg_op, 0x80008000);
+ }
+ gen_helper_advsimd_muladdh(tcg_res, tcg_op, tcg_idx,
+ tcg_res, fpst);
+ break;
+ case 2:
+ if (opcode == 0x5) {
+ /* As usual for ARM, separate negation for
+ * fused multiply-add */
+ tcg_gen_xori_i32(tcg_op, tcg_op, 0x80000000);
+ }
+ gen_helper_vfp_muladds(tcg_res, tcg_op, tcg_idx,
+ tcg_res, fpst);
+ break;
+ default:
+ g_assert_not_reached();
+ }
break;
case 0x9: /* FMUL, FMULX */
- if (u) {
- gen_helper_vfp_mulxs(tcg_res, tcg_op, tcg_idx, fpst);
- } else {
- gen_helper_vfp_muls(tcg_res, tcg_op, tcg_idx, fpst);
+ switch (size) {
+ case 1:
+ if (u) {
+ gen_helper_advsimd_mulxh(tcg_res, tcg_op, tcg_idx,
+ fpst);
+ } else {
+ g_assert_not_reached();
+ }
+ break;
+ case 2:
+ if (u) {
+ gen_helper_vfp_mulxs(tcg_res, tcg_op, tcg_idx, fpst);
+ } else {
+ gen_helper_vfp_muls(tcg_res, tcg_op, tcg_idx, fpst);
+ }
+ break;
+ default:
+ g_assert_not_reached();
}
break;
case 0xc: /* SQDMULH */
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [Qemu-devel] [PATCH v3 15/31] arm/translate-a64: add FP16 x2 ops for simd_indexed
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (13 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 14/31] arm/translate-a64: add FP16 FMULX/MLS/FMLA to simd_indexed Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 16/31] arm/translate-a64: initial decode for simd_two_reg_misc_fp16 Alex Bennée
` (18 subsequent siblings)
33 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
A bunch of the vectorised bitwise operations just operate on larger
chunks at a time. We can do the same for the new half-precision
operations by introducing some TWOHALFOP helpers which work on each
half of a pair of half-precision operations at once.
Hopefully all this hoop jumping will get simpler once we have
generically vectorised helpers here.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
v2
- checkpatch fixes
---
target/arm/helper-a64.c | 46 +++++++++++++++++++++++++++++++++++++++++++++-
target/arm/helper-a64.h | 10 ++++++++++
target/arm/translate-a64.c | 26 +++++++++++++++++++++-----
3 files changed, 76 insertions(+), 6 deletions(-)
diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c
index 8fdbe034f3..4d5ae96d8f 100644
--- a/target/arm/helper-a64.c
+++ b/target/arm/helper-a64.c
@@ -629,8 +629,32 @@ ADVSIMD_HALFOP(max)
ADVSIMD_HALFOP(minnum)
ADVSIMD_HALFOP(maxnum)
+#define ADVSIMD_TWOHALFOP(name) \
+uint32_t ADVSIMD_HELPER(name, 2h)(uint32_t two_a, uint32_t two_b, void *fpstp) \
+{ \
+ float16 a1, a2, b1, b2; \
+ uint32_t r1, r2; \
+ float_status *fpst = fpstp; \
+ a1 = extract32(two_a, 0, 16); \
+ a2 = extract32(two_a, 16, 16); \
+ b1 = extract32(two_b, 0, 16); \
+ b2 = extract32(two_b, 16, 16); \
+ r1 = float16_ ## name(a1, b1, fpst); \
+ r2 = float16_ ## name(a2, b2, fpst); \
+ return deposit32(r1, 16, 16, r2); \
+}
+
+ADVSIMD_TWOHALFOP(add)
+ADVSIMD_TWOHALFOP(sub)
+ADVSIMD_TWOHALFOP(mul)
+ADVSIMD_TWOHALFOP(div)
+ADVSIMD_TWOHALFOP(min)
+ADVSIMD_TWOHALFOP(max)
+ADVSIMD_TWOHALFOP(minnum)
+ADVSIMD_TWOHALFOP(maxnum)
+
/* Data processing - scalar floating-point and advanced SIMD */
-float16 HELPER(advsimd_mulxh)(float16 a, float16 b, void *fpstp)
+static float16 float16_mulx(float16 a, float16 b, void *fpstp)
{
float_status *fpst = fpstp;
@@ -646,6 +670,9 @@ float16 HELPER(advsimd_mulxh)(float16 a, float16 b, void *fpstp)
return float16_mul(a, b, fpst);
}
+ADVSIMD_HALFOP(mulx)
+ADVSIMD_TWOHALFOP(mulx)
+
/* fused multiply-accumulate */
float16 HELPER(advsimd_muladdh)(float16 a, float16 b, float16 c, void *fpstp)
{
@@ -653,6 +680,23 @@ float16 HELPER(advsimd_muladdh)(float16 a, float16 b, float16 c, void *fpstp)
return float16_muladd(a, b, c, 0, fpst);
}
+uint32_t HELPER(advsimd_muladd2h)(uint32_t two_a, uint32_t two_b,
+ uint32_t two_c, void *fpstp)
+{
+ float_status *fpst = fpstp;
+ float16 a1, a2, b1, b2, c1, c2;
+ uint32_t r1, r2;
+ a1 = extract32(two_a, 0, 16);
+ a2 = extract32(two_a, 16, 16);
+ b1 = extract32(two_b, 0, 16);
+ b2 = extract32(two_b, 16, 16);
+ c1 = extract32(two_c, 0, 16);
+ c2 = extract32(two_c, 16, 16);
+ r1 = float16_muladd(a1, b1, c1, 0, fpst);
+ r2 = float16_muladd(a2, b2, c2, 0, fpst);
+ return deposit32(r1, 16, 16, r2);
+}
+
/*
* Floating point comparisons produce an integer result. Softfloat
* routines return float_relation types which we convert to the 0/-1
diff --git a/target/arm/helper-a64.h b/target/arm/helper-a64.h
index 79012eee9d..003ffa582f 100644
--- a/target/arm/helper-a64.h
+++ b/target/arm/helper-a64.h
@@ -65,3 +65,13 @@ DEF_HELPER_3(advsimd_acge_f16, i32, f16, f16, ptr)
DEF_HELPER_3(advsimd_acgt_f16, i32, f16, f16, ptr)
DEF_HELPER_3(advsimd_mulxh, f16, f16, f16, ptr)
DEF_HELPER_4(advsimd_muladdh, f16, f16, f16, f16, ptr)
+DEF_HELPER_3(advsimd_add2h, i32, i32, i32, ptr)
+DEF_HELPER_3(advsimd_sub2h, i32, i32, i32, ptr)
+DEF_HELPER_3(advsimd_mul2h, i32, i32, i32, ptr)
+DEF_HELPER_3(advsimd_div2h, i32, i32, i32, ptr)
+DEF_HELPER_3(advsimd_max2h, i32, i32, i32, ptr)
+DEF_HELPER_3(advsimd_min2h, i32, i32, i32, ptr)
+DEF_HELPER_3(advsimd_maxnum2h, i32, i32, i32, ptr)
+DEF_HELPER_3(advsimd_minnum2h, i32, i32, i32, ptr)
+DEF_HELPER_3(advsimd_mulx2h, i32, i32, i32, ptr)
+DEF_HELPER_4(advsimd_muladd2h, i32, i32, i32, i32, ptr)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 43bff5cd09..081619a389 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -11418,8 +11418,13 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
* multiply-add */
tcg_gen_xori_i32(tcg_op, tcg_op, 0x80008000);
}
- gen_helper_advsimd_muladdh(tcg_res, tcg_op, tcg_idx,
- tcg_res, fpst);
+ if (is_scalar) {
+ gen_helper_advsimd_muladdh(tcg_res, tcg_op, tcg_idx,
+ tcg_res, fpst);
+ } else {
+ gen_helper_advsimd_muladd2h(tcg_res, tcg_op, tcg_idx,
+ tcg_res, fpst);
+ }
break;
case 2:
if (opcode == 0x5) {
@@ -11438,10 +11443,21 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
switch (size) {
case 1:
if (u) {
- gen_helper_advsimd_mulxh(tcg_res, tcg_op, tcg_idx,
- fpst);
+ if (is_scalar) {
+ gen_helper_advsimd_mulxh(tcg_res, tcg_op,
+ tcg_idx, fpst);
+ } else {
+ gen_helper_advsimd_mulx2h(tcg_res, tcg_op,
+ tcg_idx, fpst);
+ }
} else {
- g_assert_not_reached();
+ if (is_scalar) {
+ gen_helper_advsimd_mulh(tcg_res, tcg_op,
+ tcg_idx, fpst);
+ } else {
+ gen_helper_advsimd_mul2h(tcg_res, tcg_op,
+ tcg_idx, fpst);
+ }
}
break;
case 2:
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [Qemu-devel] [PATCH v3 16/31] arm/translate-a64: initial decode for simd_two_reg_misc_fp16
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (14 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 15/31] arm/translate-a64: add FP16 x2 ops for simd_indexed Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 17/31] arm/translate-a64: add FP16 FPRINTx to simd_two_reg_misc_fp16 Alex Bennée
` (17 subsequent siblings)
33 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
This actually covers two different sections of the encoding table:
Advanced SIMD scalar two-register miscellaneous FP16
Advanced SIMD two-register miscellaneous (FP16)
The difference between the two is covered by a combination of Q (bit
30) and S (bit 28). Notably the FRINTx instructions are only
available in the vector form.
This is just the decode skeleton which will be filled out by later
patches.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
v2
- checkpatch cleanups
v3
- update comment on group from following patches.
- rm left over debug fpf
---
target/arm/translate-a64.c | 40 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 081619a389..ea453fb6d9 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -11164,6 +11164,45 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
}
}
+/* AdvSIMD [scalar] two register miscellaneous (FP16)
+ *
+ * 31 30 29 28 27 24 23 22 21 17 16 12 11 10 9 5 4 0
+ * +---+---+---+---+---------+---+-------------+--------+-----+------+------+
+ * | 0 | Q | U | S | 1 1 1 0 | a | 1 1 1 1 0 0 | opcode | 1 0 | Rn | Rd |
+ * +---+---+---+---+---------+---+-------------+--------+-----+------+------+
+ * mask: 1000 1111 0111 1110 0000 1100 0000 0000 0x8f7e 0c00
+ * val: 0000 1110 0111 1000 0000 1000 0000 0000 0x0e78 0800
+ *
+ * This actually covers two groups where scalar access is governed by
+ * bit 28. A bunch of the instructions (float to integral) only exist
+ * in the vector form and are un-allocated for the scalar decode. Also
+ * in the scalar decode Q is always 1.
+ */
+static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
+{
+ int fpop, opcode, a;
+
+ if (!arm_dc_feature(s, ARM_FEATURE_V8_FP16)) {
+ unallocated_encoding(s);
+ return;
+ }
+
+ if (!fp_access_check(s)) {
+ return;
+ }
+
+ opcode = extract32(insn, 12, 4);
+ a = extract32(insn, 23, 1);
+ fpop = deposit32(opcode, 5, 1, a);
+
+ switch (fpop) {
+ default:
+ fprintf(stderr, "%s: insn %#04x fpop %#2x\n", __func__, insn, fpop);
+ g_assert_not_reached();
+ }
+
+}
+
/* AdvSIMD scalar x indexed element
* 31 30 29 28 24 23 22 21 20 19 16 15 12 11 10 9 5 4 0
* +-----+---+-----------+------+---+---+------+-----+---+---+------+------+
@@ -12237,6 +12276,7 @@ static const AArch64DecodeTable data_proc_simd[] = {
{ 0xce800000, 0xffe00000, disas_crypto_xar },
{ 0xce408000, 0xffe0c000, disas_crypto_three_reg_imm2 },
{ 0x0e400400, 0x9f60c400, disas_simd_three_reg_same_fp16 },
+ { 0x0e780800, 0x8f7e0c00, disas_simd_two_reg_misc_fp16 },
{ 0x00000000, 0x00000000, NULL }
};
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [Qemu-devel] [PATCH v3 17/31] arm/translate-a64: add FP16 FPRINTx to simd_two_reg_misc_fp16
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (15 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 16/31] arm/translate-a64: initial decode for simd_two_reg_misc_fp16 Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-24 0:13 ` Richard Henderson
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 18/31] arm/translate-a64: add FCVTxx " Alex Bennée
` (16 subsequent siblings)
33 siblings, 1 reply; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
This adds the full range of half-precision floating point to integral
instructions.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
v3
- fix re-base conflicts
- move comment to previous commit
- don't double test is_scalar in unallocated checks
---
target/arm/helper-a64.c | 22 ++++++++
target/arm/helper-a64.h | 2 +
target/arm/translate-a64.c | 123 +++++++++++++++++++++++++++++++++++++++++++--
3 files changed, 142 insertions(+), 5 deletions(-)
diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c
index 4d5ae96d8f..4fd28fdf48 100644
--- a/target/arm/helper-a64.c
+++ b/target/arm/helper-a64.c
@@ -745,3 +745,25 @@ uint32_t HELPER(advsimd_acgt_f16)(float16 a, float16 b, void *fpstp)
int compare = float16_compare(f0, f1, fpst);
return ADVSIMD_CMPRES(compare == float_relation_greater);
}
+
+/* round to integral */
+float16 HELPER(advsimd_rinth_exact)(float16 x, void *fp_status)
+{
+ return float16_round_to_int(x, fp_status);
+}
+
+float16 HELPER(advsimd_rinth)(float16 x, void *fp_status)
+{
+ int old_flags = get_float_exception_flags(fp_status), new_flags;
+ float16 ret;
+
+ ret = float16_round_to_int(x, fp_status);
+
+ /* Suppress any inexact exceptions the conversion produced */
+ if (!(old_flags & float_flag_inexact)) {
+ new_flags = get_float_exception_flags(fp_status);
+ set_float_exception_flags(new_flags & ~float_flag_inexact, fp_status);
+ }
+
+ return ret;
+}
diff --git a/target/arm/helper-a64.h b/target/arm/helper-a64.h
index 003ffa582f..bc8d5b105b 100644
--- a/target/arm/helper-a64.h
+++ b/target/arm/helper-a64.h
@@ -75,3 +75,5 @@ DEF_HELPER_3(advsimd_maxnum2h, i32, i32, i32, ptr)
DEF_HELPER_3(advsimd_minnum2h, i32, i32, i32, ptr)
DEF_HELPER_3(advsimd_mulx2h, i32, i32, i32, ptr)
DEF_HELPER_4(advsimd_muladd2h, i32, i32, i32, i32, ptr)
+DEF_HELPER_2(advsimd_rinth_exact, f16, f16, ptr)
+DEF_HELPER_2(advsimd_rinth, f16, f16, ptr)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index ea453fb6d9..6f33663c7b 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -11180,27 +11180,140 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
*/
static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
{
- int fpop, opcode, a;
+ int fpop, opcode, a, u;
+ int rn, rd;
+ bool is_q;
+ bool is_scalar;
+ bool only_in_vector = false;
+
+ int pass;
+ TCGv_i32 tcg_rmode = NULL;
+ TCGv_ptr tcg_fpstatus = NULL;
+ bool need_rmode = false;
+ int rmode;
if (!arm_dc_feature(s, ARM_FEATURE_V8_FP16)) {
unallocated_encoding(s);
return;
}
- if (!fp_access_check(s)) {
- return;
- }
+ rd = extract32(insn, 0, 5);
+ rn = extract32(insn, 5, 5);
- opcode = extract32(insn, 12, 4);
a = extract32(insn, 23, 1);
+ u = extract32(insn, 29, 1);
+ is_scalar = extract32(insn, 28, 1);
+ is_q = extract32(insn, 30, 1);
+
+ opcode = extract32(insn, 12, 5);
fpop = deposit32(opcode, 5, 1, a);
+ fpop = deposit32(fpop, 6, 1, u);
switch (fpop) {
+ case 0x18: /* FRINTN */
+ need_rmode = true;
+ only_in_vector = true;
+ rmode = FPROUNDING_TIEEVEN;
+ break;
+ case 0x19: /* FRINTM */
+ need_rmode = true;
+ only_in_vector = true;
+ rmode = FPROUNDING_NEGINF;
+ break;
+ case 0x38: /* FRINTP */
+ need_rmode = true;
+ only_in_vector = true;
+ rmode = FPROUNDING_POSINF;
+ break;
+ case 0x39: /* FRINTZ */
+ need_rmode = true;
+ only_in_vector = true;
+ rmode = FPROUNDING_ZERO;
+ break;
+ case 0x58: /* FRINTA */
+ need_rmode = true;
+ only_in_vector = true;
+ rmode = FPROUNDING_TIEAWAY;
+ break;
+ case 0x59: /* FRINTX */
+ case 0x79: /* FRINTI */
+ only_in_vector = true;
+ /* current rounding mode */
+ break;
default:
fprintf(stderr, "%s: insn %#04x fpop %#2x\n", __func__, insn, fpop);
g_assert_not_reached();
}
+
+ /* Check additional constraints for the scalar encoding */
+ if (is_scalar) {
+ if (!is_q) {
+ unallocated_encoding(s);
+ return;
+ }
+ /* FRINTxx is only in the vector form */
+ if (only_in_vector) {
+ unallocated_encoding(s);
+ return;
+ }
+ }
+
+ if (!fp_access_check(s)) {
+ return;
+ }
+
+ if (need_rmode) {
+ tcg_fpstatus = get_fpstatus_ptr(true);
+ }
+
+ if (need_rmode) {
+ tcg_rmode = tcg_const_i32(arm_rmode_to_sf(rmode));
+ gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus);
+ }
+
+ if (is_scalar) {
+ /* no operations yet */
+ } else {
+ for (pass = 0; pass < (is_q ? 8 : 4); pass++) {
+ TCGv_i32 tcg_op = tcg_temp_new_i32();
+ TCGv_i32 tcg_res = tcg_temp_new_i32();
+
+ read_vec_element_i32(s, tcg_op, rn, pass, MO_16);
+
+ switch (fpop) {
+ case 0x18: /* FRINTN */
+ case 0x19: /* FRINTM */
+ case 0x38: /* FRINTP */
+ case 0x39: /* FRINTZ */
+ case 0x58: /* FRINTA */
+ case 0x79: /* FRINTI */
+ gen_helper_advsimd_rinth(tcg_res, tcg_op, tcg_fpstatus);
+ break;
+ case 0x59: /* FRINTX */
+ gen_helper_advsimd_rinth_exact(tcg_res, tcg_op, tcg_fpstatus);
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
+ write_vec_element_i32(s, tcg_res, rd, pass, MO_16);
+
+ tcg_temp_free_i32(tcg_res);
+ tcg_temp_free_i32(tcg_op);
+ }
+
+ clear_vec_high(s, is_q, rd);
+ }
+
+ if (tcg_rmode) {
+ gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus);
+ tcg_temp_free_i32(tcg_rmode);
+ }
+
+ if (tcg_fpstatus) {
+ tcg_temp_free_ptr(tcg_fpstatus);
+ }
}
/* AdvSIMD scalar x indexed element
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [Qemu-devel] [PATCH v3 18/31] arm/translate-a64: add FCVTxx to simd_two_reg_misc_fp16
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (16 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 17/31] arm/translate-a64: add FP16 FPRINTx to simd_two_reg_misc_fp16 Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 19/31] arm/translate-a64: add FP16 FCMxx (zero) " Alex Bennée
` (15 subsequent siblings)
33 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
This covers all the floating point convert operations.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/helper-a64.c | 32 +++++++++++++++++
target/arm/helper-a64.h | 2 ++
target/arm/translate-a64.c | 85 +++++++++++++++++++++++++++++++++++++++++++++-
3 files changed, 118 insertions(+), 1 deletion(-)
diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c
index 4fd28fdf48..722fff2349 100644
--- a/target/arm/helper-a64.c
+++ b/target/arm/helper-a64.c
@@ -767,3 +767,35 @@ float16 HELPER(advsimd_rinth)(float16 x, void *fp_status)
return ret;
}
+
+/*
+ * Half-precision floating point conversion functions
+ *
+ * There are a multitude of conversion functions with various
+ * different rounding modes. This is dealt with by the calling code
+ * setting the mode appropriately before calling the helper.
+ */
+
+uint32_t HELPER(advsimd_f16tosinth)(float16 a, void *fpstp)
+{
+ float_status *fpst = fpstp;
+
+ /* Invalid if we are passed a NaN */
+ if (float16_is_any_nan(a)) {
+ float_raise(float_flag_invalid, fpst);
+ return 0;
+ }
+ return float16_to_int16(a, fpst);
+}
+
+uint32_t HELPER(advsimd_f16touinth)(float16 a, void *fpstp)
+{
+ float_status *fpst = fpstp;
+
+ /* Invalid if we are passed a NaN */
+ if (float16_is_any_nan(a)) {
+ float_raise(float_flag_invalid, fpst);
+ return 0;
+ }
+ return float16_to_uint16(a, fpst);
+}
diff --git a/target/arm/helper-a64.h b/target/arm/helper-a64.h
index bc8d5b105b..32931b17c6 100644
--- a/target/arm/helper-a64.h
+++ b/target/arm/helper-a64.h
@@ -77,3 +77,5 @@ DEF_HELPER_3(advsimd_mulx2h, i32, i32, i32, ptr)
DEF_HELPER_4(advsimd_muladd2h, i32, i32, i32, i32, ptr)
DEF_HELPER_2(advsimd_rinth_exact, f16, f16, ptr)
DEF_HELPER_2(advsimd_rinth, f16, f16, ptr)
+DEF_HELPER_2(advsimd_f16tosinth, i32, f16, ptr)
+DEF_HELPER_2(advsimd_f16touinth, i32, f16, ptr)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 6f33663c7b..e3318837c9 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -11240,6 +11240,46 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
only_in_vector = true;
/* current rounding mode */
break;
+ case 0x1a: /* FCVTNS */
+ need_rmode = true;
+ rmode = FPROUNDING_TIEEVEN;
+ break;
+ case 0x1b: /* FCVTMS */
+ need_rmode = true;
+ rmode = FPROUNDING_NEGINF;
+ break;
+ case 0x1c: /* FCVTAS */
+ need_rmode = true;
+ rmode = FPROUNDING_TIEAWAY;
+ break;
+ case 0x3a: /* FCVTPS */
+ need_rmode = true;
+ rmode = FPROUNDING_POSINF;
+ break;
+ case 0x3b: /* FCVTZS */
+ need_rmode = true;
+ rmode = FPROUNDING_ZERO;
+ break;
+ case 0x5a: /* FCVTNU */
+ need_rmode = true;
+ rmode = FPROUNDING_TIEEVEN;
+ break;
+ case 0x5b: /* FCVTMU */
+ need_rmode = true;
+ rmode = FPROUNDING_NEGINF;
+ break;
+ case 0x5c: /* FCVTAU */
+ need_rmode = true;
+ rmode = FPROUNDING_TIEAWAY;
+ break;
+ case 0x7a: /* FCVTPU */
+ need_rmode = true;
+ rmode = FPROUNDING_POSINF;
+ break;
+ case 0x7b: /* FCVTZU */
+ need_rmode = true;
+ rmode = FPROUNDING_ZERO;
+ break;
default:
fprintf(stderr, "%s: insn %#04x fpop %#2x\n", __func__, insn, fpop);
g_assert_not_reached();
@@ -11273,7 +11313,36 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
}
if (is_scalar) {
- /* no operations yet */
+ TCGv_i32 tcg_op = tcg_temp_new_i32();
+ TCGv_i32 tcg_res = tcg_temp_new_i32();
+
+ read_vec_element_i32(s, tcg_op, rn, 0, MO_16);
+
+ switch (fpop) {
+ case 0x1a: /* FCVTNS */
+ case 0x1b: /* FCVTMS */
+ case 0x1c: /* FCVTAS */
+ case 0x3a: /* FCVTPS */
+ case 0x3b: /* FCVTZS */
+ gen_helper_advsimd_f16tosinth(tcg_res, tcg_op, tcg_fpstatus);
+ break;
+ case 0x5a: /* FCVTNU */
+ case 0x5b: /* FCVTMU */
+ case 0x5c: /* FCVTAU */
+ case 0x7a: /* FCVTPU */
+ case 0x7b: /* FCVTZU */
+ gen_helper_advsimd_f16touinth(tcg_res, tcg_op, tcg_fpstatus);
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
+ /* limit any sign extension going on */
+ tcg_gen_andi_i32(tcg_res, tcg_res, 0xffff);
+ write_fp_sreg(s, rd, tcg_res);
+
+ tcg_temp_free_i32(tcg_res);
+ tcg_temp_free_i32(tcg_op);
} else {
for (pass = 0; pass < (is_q ? 8 : 4); pass++) {
TCGv_i32 tcg_op = tcg_temp_new_i32();
@@ -11282,6 +11351,20 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
read_vec_element_i32(s, tcg_op, rn, pass, MO_16);
switch (fpop) {
+ case 0x1a: /* FCVTNS */
+ case 0x1b: /* FCVTMS */
+ case 0x1c: /* FCVTAS */
+ case 0x3a: /* FCVTPS */
+ case 0x3b: /* FCVTZS */
+ gen_helper_advsimd_f16tosinth(tcg_res, tcg_op, tcg_fpstatus);
+ break;
+ case 0x5a: /* FCVTNU */
+ case 0x5b: /* FCVTMU */
+ case 0x5c: /* FCVTAU */
+ case 0x7a: /* FCVTPU */
+ case 0x7b: /* FCVTZU */
+ gen_helper_advsimd_f16touinth(tcg_res, tcg_op, tcg_fpstatus);
+ break;
case 0x18: /* FRINTN */
case 0x19: /* FRINTM */
case 0x38: /* FRINTP */
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [Qemu-devel] [PATCH v3 19/31] arm/translate-a64: add FP16 FCMxx (zero) to simd_two_reg_misc_fp16
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (17 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 18/31] arm/translate-a64: add FCVTxx " Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-24 0:19 ` Richard Henderson
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 20/31] arm/translate-a64: add FP16 SCVTF/UCVFT " Alex Bennée
` (14 subsequent siblings)
33 siblings, 1 reply; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
I re-use the existing handle_2misc_fcmp_zero handler and tweak it
slightly to deal with the half-precision case.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
v3
- use size directly wuth read/write_vec_element
- drop unneeded break
- WIP: mess with calculating maxpasses
---
target/arm/translate-a64.c | 80 +++++++++++++++++++++++++++++++++-------------
1 file changed, 57 insertions(+), 23 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index e3318837c9..c251121c2b 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -7821,14 +7821,14 @@ static void handle_2misc_fcmp_zero(DisasContext *s, int opcode,
bool is_scalar, bool is_u, bool is_q,
int size, int rn, int rd)
{
- bool is_double = (size == 3);
+ bool is_double = (size == MO_64);
TCGv_ptr fpst;
if (!fp_access_check(s)) {
return;
}
- fpst = get_fpstatus_ptr(false);
+ fpst = get_fpstatus_ptr(size == MO_16);
if (is_double) {
TCGv_i64 tcg_op = tcg_temp_new_i64();
@@ -7880,34 +7880,57 @@ static void handle_2misc_fcmp_zero(DisasContext *s, int opcode,
bool swap = false;
int pass, maxpasses;
- switch (opcode) {
- case 0x2e: /* FCMLT (zero) */
- swap = true;
- /* fall through */
- case 0x2c: /* FCMGT (zero) */
- genfn = gen_helper_neon_cgt_f32;
- break;
- case 0x2d: /* FCMEQ (zero) */
- genfn = gen_helper_neon_ceq_f32;
- break;
- case 0x6d: /* FCMLE (zero) */
- swap = true;
- /* fall through */
- case 0x6c: /* FCMGE (zero) */
- genfn = gen_helper_neon_cge_f32;
- break;
- default:
- g_assert_not_reached();
+ if (size == MO_16) {
+ switch (opcode) {
+ case 0x2e: /* FCMLT (zero) */
+ swap = true;
+ /* fall through */
+ case 0x2c: /* FCMGT (zero) */
+ genfn = gen_helper_advsimd_cgt_f16;
+ break;
+ case 0x2d: /* FCMEQ (zero) */
+ genfn = gen_helper_advsimd_ceq_f16;
+ break;
+ case 0x6d: /* FCMLE (zero) */
+ swap = true;
+ /* fall through */
+ case 0x6c: /* FCMGE (zero) */
+ genfn = gen_helper_advsimd_cge_f16;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+ } else {
+ switch (opcode) {
+ case 0x2e: /* FCMLT (zero) */
+ swap = true;
+ /* fall through */
+ case 0x2c: /* FCMGT (zero) */
+ genfn = gen_helper_neon_cgt_f32;
+ break;
+ case 0x2d: /* FCMEQ (zero) */
+ genfn = gen_helper_neon_ceq_f32;
+ break;
+ case 0x6d: /* FCMLE (zero) */
+ swap = true;
+ /* fall through */
+ case 0x6c: /* FCMGE (zero) */
+ genfn = gen_helper_neon_cge_f32;
+ break;
+ default:
+ g_assert_not_reached();
+ }
}
if (is_scalar) {
maxpasses = 1;
} else {
- maxpasses = is_q ? 4 : 2;
+ int vector_size = 8 << is_q;
+ maxpasses = vector_size >> size;
}
for (pass = 0; pass < maxpasses; pass++) {
- read_vec_element_i32(s, tcg_op, rn, pass, MO_32);
+ read_vec_element_i32(s, tcg_op, rn, pass, size);
if (swap) {
genfn(tcg_res, tcg_zero, tcg_op, fpst);
} else {
@@ -7916,7 +7939,7 @@ static void handle_2misc_fcmp_zero(DisasContext *s, int opcode,
if (is_scalar) {
write_fp_sreg(s, rd, tcg_res);
} else {
- write_vec_element_i32(s, tcg_res, rd, pass, MO_32);
+ write_vec_element_i32(s, tcg_res, rd, pass, size);
}
}
tcg_temp_free_i32(tcg_res);
@@ -11209,7 +11232,18 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
fpop = deposit32(opcode, 5, 1, a);
fpop = deposit32(fpop, 6, 1, u);
+ rd = extract32(insn, 0, 5);
+ rn = extract32(insn, 5, 5);
+
switch (fpop) {
+ break;
+ case 0x2c: /* FCMGT (zero) */
+ case 0x2d: /* FCMEQ (zero) */
+ case 0x2e: /* FCMLT (zero) */
+ case 0x6c: /* FCMGE (zero) */
+ case 0x6d: /* FCMLE (zero) */
+ handle_2misc_fcmp_zero(s, fpop, is_scalar, 0, is_q, MO_16, rn, rd);
+ return;
case 0x18: /* FRINTN */
need_rmode = true;
only_in_vector = true;
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [Qemu-devel] [PATCH v3 20/31] arm/translate-a64: add FP16 SCVTF/UCVFT to simd_two_reg_misc_fp16
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (18 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 19/31] arm/translate-a64: add FP16 FCMxx (zero) " Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 21/31] arm/translate-a64: add FP16 FNEG/FABS " Alex Bennée
` (13 subsequent siblings)
33 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
I've re-factored the handle_simd_intfp_conv helper to properly handle
half-precision as well as call plain conversion helpers when we are
not doing fixed point conversion.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/helper.c | 4 ++
target/arm/helper.h | 10 ++++
target/arm/translate-a64.c | 114 +++++++++++++++++++++++++++++++++++----------
3 files changed, 104 insertions(+), 24 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 303cd1eaf9..6e3dadb754 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -11302,8 +11302,10 @@ CONV_ITOF(vfp_##name##to##p, fsz, sign) \
CONV_FTOI(vfp_to##name##p, fsz, sign, ) \
CONV_FTOI(vfp_to##name##z##p, fsz, sign, _round_to_zero)
+FLOAT_CONVS(si, h, 16, )
FLOAT_CONVS(si, s, 32, )
FLOAT_CONVS(si, d, 64, )
+FLOAT_CONVS(ui, h, 16, u)
FLOAT_CONVS(ui, s, 32, u)
FLOAT_CONVS(ui, d, 64, u)
@@ -11386,6 +11388,8 @@ VFP_CONV_FIX_A64(sq, s, 32, 64, int64)
VFP_CONV_FIX(uh, s, 32, 32, uint16)
VFP_CONV_FIX(ul, s, 32, 32, uint32)
VFP_CONV_FIX_A64(uq, s, 32, 64, uint64)
+VFP_CONV_FIX_A64(sl, h, 16, 32, int32)
+VFP_CONV_FIX_A64(ul, h, 16, 32, uint32)
#undef VFP_CONV_FIX
#undef VFP_CONV_FIX_FLOAT
#undef VFP_CONV_FLOAT_FIX_ROUND
diff --git a/target/arm/helper.h b/target/arm/helper.h
index 81ecb319b3..c0f35592ff 100644
--- a/target/arm/helper.h
+++ b/target/arm/helper.h
@@ -120,17 +120,23 @@ DEF_HELPER_3(vfp_cmped, void, f64, f64, env)
DEF_HELPER_2(vfp_fcvtds, f64, f32, env)
DEF_HELPER_2(vfp_fcvtsd, f32, f64, env)
+DEF_HELPER_2(vfp_uitoh, f16, i32, ptr)
DEF_HELPER_2(vfp_uitos, f32, i32, ptr)
DEF_HELPER_2(vfp_uitod, f64, i32, ptr)
+DEF_HELPER_2(vfp_sitoh, f16, i32, ptr)
DEF_HELPER_2(vfp_sitos, f32, i32, ptr)
DEF_HELPER_2(vfp_sitod, f64, i32, ptr)
+DEF_HELPER_2(vfp_touih, i32, f16, ptr)
DEF_HELPER_2(vfp_touis, i32, f32, ptr)
DEF_HELPER_2(vfp_touid, i32, f64, ptr)
+DEF_HELPER_2(vfp_touizh, i32, f16, ptr)
DEF_HELPER_2(vfp_touizs, i32, f32, ptr)
DEF_HELPER_2(vfp_touizd, i32, f64, ptr)
+DEF_HELPER_2(vfp_tosih, i32, f16, ptr)
DEF_HELPER_2(vfp_tosis, i32, f32, ptr)
DEF_HELPER_2(vfp_tosid, i32, f64, ptr)
+DEF_HELPER_2(vfp_tosizh, i32, f16, ptr)
DEF_HELPER_2(vfp_tosizs, i32, f32, ptr)
DEF_HELPER_2(vfp_tosizd, i32, f64, ptr)
@@ -142,6 +148,8 @@ DEF_HELPER_3(vfp_toshd_round_to_zero, i64, f64, i32, ptr)
DEF_HELPER_3(vfp_tosld_round_to_zero, i64, f64, i32, ptr)
DEF_HELPER_3(vfp_touhd_round_to_zero, i64, f64, i32, ptr)
DEF_HELPER_3(vfp_tould_round_to_zero, i64, f64, i32, ptr)
+DEF_HELPER_3(vfp_toulh, i32, f16, i32, ptr)
+DEF_HELPER_3(vfp_toslh, i32, f16, i32, ptr)
DEF_HELPER_3(vfp_toshs, i32, f32, i32, ptr)
DEF_HELPER_3(vfp_tosls, i32, f32, i32, ptr)
DEF_HELPER_3(vfp_tosqs, i64, f32, i32, ptr)
@@ -166,6 +174,8 @@ DEF_HELPER_3(vfp_sqtod, f64, i64, i32, ptr)
DEF_HELPER_3(vfp_uhtod, f64, i64, i32, ptr)
DEF_HELPER_3(vfp_ultod, f64, i64, i32, ptr)
DEF_HELPER_3(vfp_uqtod, f64, i64, i32, ptr)
+DEF_HELPER_3(vfp_sltoh, f16, i32, i32, ptr)
+DEF_HELPER_3(vfp_ultoh, f16, i32, i32, ptr)
DEF_HELPER_FLAGS_2(set_rmode, TCG_CALL_NO_RWG, i32, i32, ptr)
DEF_HELPER_FLAGS_2(set_neon_rmode, TCG_CALL_NO_RWG, i32, i32, env)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index c251121c2b..abe23f7d3f 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -6902,23 +6902,28 @@ static void handle_simd_intfp_conv(DisasContext *s, int rd, int rn,
int elements, int is_signed,
int fracbits, int size)
{
- bool is_double = size == 3 ? true : false;
- TCGv_ptr tcg_fpst = get_fpstatus_ptr(false);
- TCGv_i32 tcg_shift = tcg_const_i32(fracbits);
- TCGv_i64 tcg_int = tcg_temp_new_i64();
+ TCGv_ptr tcg_fpst = get_fpstatus_ptr(size == MO_16);
+ TCGv_i32 tcg_shift = NULL;
+
TCGMemOp mop = size | (is_signed ? MO_SIGN : 0);
int pass;
- for (pass = 0; pass < elements; pass++) {
- read_vec_element(s, tcg_int, rn, pass, mop);
+ if (fracbits || size == MO_64) {
+ tcg_shift = tcg_const_i32(fracbits);
+ }
+
+ if (size == MO_64) {
+ TCGv_i64 tcg_int64 = tcg_temp_new_i64();
+ TCGv_i64 tcg_double = tcg_temp_new_i64();
+
+ for (pass = 0; pass < elements; pass++) {
+ read_vec_element(s, tcg_int64, rn, pass, mop);
- if (is_double) {
- TCGv_i64 tcg_double = tcg_temp_new_i64();
if (is_signed) {
- gen_helper_vfp_sqtod(tcg_double, tcg_int,
+ gen_helper_vfp_sqtod(tcg_double, tcg_int64,
tcg_shift, tcg_fpst);
} else {
- gen_helper_vfp_uqtod(tcg_double, tcg_int,
+ gen_helper_vfp_uqtod(tcg_double, tcg_int64,
tcg_shift, tcg_fpst);
}
if (elements == 1) {
@@ -6926,28 +6931,72 @@ static void handle_simd_intfp_conv(DisasContext *s, int rd, int rn,
} else {
write_vec_element(s, tcg_double, rd, pass, MO_64);
}
- tcg_temp_free_i64(tcg_double);
- } else {
- TCGv_i32 tcg_single = tcg_temp_new_i32();
- if (is_signed) {
- gen_helper_vfp_sqtos(tcg_single, tcg_int,
- tcg_shift, tcg_fpst);
- } else {
- gen_helper_vfp_uqtos(tcg_single, tcg_int,
- tcg_shift, tcg_fpst);
+ }
+
+ tcg_temp_free_i64(tcg_int64);
+ tcg_temp_free_i64(tcg_double);
+
+ } else {
+ TCGv_i32 tcg_int32 = tcg_temp_new_i32();
+ TCGv_i32 tcg_float = tcg_temp_new_i32();
+
+ for (pass = 0; pass < elements; pass++) {
+ read_vec_element_i32(s, tcg_int32, rn, pass, mop);
+
+ switch (size) {
+ case MO_32:
+ if (fracbits) {
+ if (is_signed) {
+ gen_helper_vfp_sltos(tcg_float, tcg_int32,
+ tcg_shift, tcg_fpst);
+ } else {
+ gen_helper_vfp_ultos(tcg_float, tcg_int32,
+ tcg_shift, tcg_fpst);
+ }
+ } else {
+ if (is_signed) {
+ gen_helper_vfp_sitos(tcg_float, tcg_int32, tcg_fpst);
+ } else {
+ gen_helper_vfp_uitos(tcg_float, tcg_int32, tcg_fpst);
+ }
+ }
+ break;
+ case MO_16:
+ if (fracbits) {
+ if (is_signed) {
+ gen_helper_vfp_sltoh(tcg_float, tcg_int32,
+ tcg_shift, tcg_fpst);
+ } else {
+ gen_helper_vfp_ultoh(tcg_float, tcg_int32,
+ tcg_shift, tcg_fpst);
+ }
+ } else {
+ if (is_signed) {
+ gen_helper_vfp_sitoh(tcg_float, tcg_int32, tcg_fpst);
+ } else {
+ gen_helper_vfp_uitoh(tcg_float, tcg_int32, tcg_fpst);
+ }
+ }
+ break;
+ default:
+ g_assert_not_reached();
}
+
if (elements == 1) {
- write_fp_sreg(s, rd, tcg_single);
+ write_fp_sreg(s, rd, tcg_float);
} else {
- write_vec_element_i32(s, tcg_single, rd, pass, MO_32);
+ write_vec_element_i32(s, tcg_float, rd, pass, size);
}
- tcg_temp_free_i32(tcg_single);
}
+
+ tcg_temp_free_i32(tcg_int32);
+ tcg_temp_free_i32(tcg_float);
}
- tcg_temp_free_i64(tcg_int);
tcg_temp_free_ptr(tcg_fpst);
- tcg_temp_free_i32(tcg_shift);
+ if (tcg_shift) {
+ tcg_temp_free_i32(tcg_shift);
+ }
clear_vec_high(s, elements << size == 16, rd);
}
@@ -11236,6 +11285,23 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
rn = extract32(insn, 5, 5);
switch (fpop) {
+ case 0x1d: /* SCVTF */
+ case 0x5d: /* UCVTF */
+ {
+ int elements;
+
+ if (is_scalar) {
+ elements = 1;
+ } else {
+ elements = (is_q ? 8 : 4);
+ }
+
+ if (!fp_access_check(s)) {
+ return;
+ }
+ handle_simd_intfp_conv(s, rd, rn, elements, !u, 0, MO_16);
+ return;
+ }
break;
case 0x2c: /* FCMGT (zero) */
case 0x2d: /* FCMEQ (zero) */
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [Qemu-devel] [PATCH v3 21/31] arm/translate-a64: add FP16 FNEG/FABS to simd_two_reg_misc_fp16
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (19 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 20/31] arm/translate-a64: add FP16 SCVTF/UCVFT " Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-24 0:28 ` Richard Henderson
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 22/31] arm/helper.c: re-factor recpe and add recepe_f16 Alex Bennée
` (12 subsequent siblings)
33 siblings, 1 reply; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
Neither of these operations alter the floating point status registers
so we can do a pure bitwise operation, either squashing any sign
bit (ABS) or inverting it (NEG).
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
v3
- fixup re-base conflicts
- make both operations pure bitwise TCG
---
target/arm/translate-a64.c | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index abe23f7d3f..00b04d34f9 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -11262,6 +11262,7 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
TCGv_i32 tcg_rmode = NULL;
TCGv_ptr tcg_fpstatus = NULL;
bool need_rmode = false;
+ bool need_fpst = true;
int rmode;
if (!arm_dc_feature(s, ARM_FEATURE_V8_FP16)) {
@@ -11380,6 +11381,10 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
need_rmode = true;
rmode = FPROUNDING_ZERO;
break;
+ case 0x2f: /* FABS */
+ case 0x6f: /* FNEG */
+ need_fpst = false;
+ break;
default:
fprintf(stderr, "%s: insn %#04x fpop %#2x\n", __func__, insn, fpop);
g_assert_not_reached();
@@ -11403,7 +11408,7 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
return;
}
- if (need_rmode) {
+ if (need_rmode || need_fpst) {
tcg_fpstatus = get_fpstatus_ptr(true);
}
@@ -11433,6 +11438,9 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
case 0x7b: /* FCVTZU */
gen_helper_advsimd_f16touinth(tcg_res, tcg_op, tcg_fpstatus);
break;
+ case 0x6f: /* FNEG */
+ tcg_gen_xori_i32(tcg_res, tcg_op, 0x8000);
+ break;
default:
g_assert_not_reached();
}
@@ -11476,6 +11484,12 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
case 0x59: /* FRINTX */
gen_helper_advsimd_rinth_exact(tcg_res, tcg_op, tcg_fpstatus);
break;
+ case 0x2f: /* FABS */
+ tcg_gen_andi_i32(tcg_res, tcg_op, 0x7fff);
+ break;
+ case 0x6f: /* FNEG */
+ tcg_gen_xori_i32(tcg_res, tcg_op, 0x8000);
+ break;
default:
g_assert_not_reached();
}
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* Re: [Qemu-devel] [PATCH v3 21/31] arm/translate-a64: add FP16 FNEG/FABS to simd_two_reg_misc_fp16
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 21/31] arm/translate-a64: add FP16 FNEG/FABS " Alex Bennée
@ 2018-02-24 0:28 ` Richard Henderson
0 siblings, 0 replies; 46+ messages in thread
From: Richard Henderson @ 2018-02-24 0:28 UTC (permalink / raw)
To: Alex Bennée, qemu-arm; +Cc: qemu-devel, Peter Maydell
On 02/23/2018 07:36 AM, Alex Bennée wrote:
> Neither of these operations alter the floating point status registers
> so we can do a pure bitwise operation, either squashing any sign
> bit (ABS) or inverting it (NEG).
>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>
> ---
> v3
> - fixup re-base conflicts
> - make both operations pure bitwise TCG
> ---
> target/arm/translate-a64.c | 16 +++++++++++++++-
> 1 file changed, 15 insertions(+), 1 deletion(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 46+ messages in thread
* [Qemu-devel] [PATCH v3 22/31] arm/helper.c: re-factor recpe and add recepe_f16
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (20 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 21/31] arm/translate-a64: add FP16 FNEG/FABS " Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-24 0:34 ` Richard Henderson
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 23/31] arm/translate-a64: add FP16 FRECPE Alex Bennée
` (11 subsequent siblings)
33 siblings, 1 reply; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
It looks like the ARM ARM has simplified the pseudo code for the
calculation which is done on a fixed point 9 bit integer maths. So
while adding f16 we can also clean this up to be a little less heavy
on the floating point and just return the fractional part and leave
the calle's to do the final packing of the result.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
v3
- fix comment 2.0^-16
- f16_exp >= 29 (biased)
- remove confusing comment about fpst
---
target/arm/helper.c | 224 +++++++++++++++++++++++++++++-----------------------
target/arm/helper.h | 1 +
2 files changed, 128 insertions(+), 97 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 6e3dadb754..e2d0ff0b4c 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -11523,80 +11523,75 @@ float32 HELPER(rsqrts_f32)(float32 a, float32 b, CPUARMState *env)
* int->float conversions at run-time. */
#define float64_256 make_float64(0x4070000000000000LL)
#define float64_512 make_float64(0x4080000000000000LL)
+#define float16_maxnorm make_float16(0x7bff)
#define float32_maxnorm make_float32(0x7f7fffff)
#define float64_maxnorm make_float64(0x7fefffffffffffffLL)
/* Reciprocal functions
*
* The algorithm that must be used to calculate the estimate
- * is specified by the ARM ARM, see FPRecipEstimate()
+ * is specified by the ARM ARM, see FPRecipEstimate()/RecipEstimate
*/
-static float64 recip_estimate(float64 a, float_status *real_fp_status)
-{
- /* These calculations mustn't set any fp exception flags,
- * so we use a local copy of the fp_status.
- */
- float_status dummy_status = *real_fp_status;
- float_status *s = &dummy_status;
- /* q = (int)(a * 512.0) */
- float64 q = float64_mul(float64_512, a, s);
- int64_t q_int = float64_to_int64_round_to_zero(q, s);
-
- /* r = 1.0 / (((double)q + 0.5) / 512.0) */
- q = int64_to_float64(q_int, s);
- q = float64_add(q, float64_half, s);
- q = float64_div(q, float64_512, s);
- q = float64_div(float64_one, q, s);
-
- /* s = (int)(256.0 * r + 0.5) */
- q = float64_mul(q, float64_256, s);
- q = float64_add(q, float64_half, s);
- q_int = float64_to_int64_round_to_zero(q, s);
+/* See RecipEstimate()
+ *
+ * input is a 9 bit fixed point number
+ * input range 256 .. 511 for a number from 0.5 <= x < 1.0.
+ * result range 256 .. 511 for a number from 1.0 to 511/256.
+ */
- /* return (double)s / 256.0 */
- return float64_div(int64_to_float64(q_int, s), float64_256, s);
+static int recip_estimate(int input)
+{
+ int a, b, r;
+ assert(256 <= input && input < 512);
+ a = (input * 2) + 1;
+ b = (1 << 19) / a;
+ r = (b + 1) >> 1;
+ assert(256 <= r && r < 512);
+ return r;
}
-/* Common wrapper to call recip_estimate */
-static float64 call_recip_estimate(float64 num, int off, float_status *fpst)
+/*
+ * Common wrapper to call recip_estimate
+ *
+ * The parameters are exponent and 64 bit fraction (without implicit
+ * bit) where the binary point is nominally at bit 52. Returns a
+ * float64 which can then be rounded to the appropriate size by the
+ * callee.
+ */
+
+static uint64_t call_recip_estimate(int *exp, int exp_off, uint64_t frac)
{
- uint64_t val64 = float64_val(num);
- uint64_t frac = extract64(val64, 0, 52);
- int64_t exp = extract64(val64, 52, 11);
- uint64_t sbit;
- float64 scaled, estimate;
+ uint32_t scaled, estimate;
+ uint64_t result_frac;
+ int result_exp;
- /* Generate the scaled number for the estimate function */
- if (exp == 0) {
+ /* Handle sub-normals */
+ if (*exp == 0) {
if (extract64(frac, 51, 1) == 0) {
- exp = -1;
- frac = extract64(frac, 0, 50) << 2;
+ *exp = -1;
+ frac <<= 2;
} else {
- frac = extract64(frac, 0, 51) << 1;
+ frac <<= 1;
}
}
- /* scaled = '0' : '01111111110' : fraction<51:44> : Zeros(44); */
- scaled = make_float64((0x3feULL << 52)
- | extract64(frac, 44, 8) << 44);
-
- estimate = recip_estimate(scaled, fpst);
+ /* scaled = UInt('1':fraction<51:44>) */
+ scaled = deposit32(1 << 8, 0, 8, extract64(frac, 44, 8));
+ estimate = recip_estimate(scaled);
- /* Build new result */
- val64 = float64_val(estimate);
- sbit = 0x8000000000000000ULL & val64;
- exp = off - exp;
- frac = extract64(val64, 0, 52);
-
- if (exp == 0) {
- frac = 1ULL << 51 | extract64(frac, 1, 51);
- } else if (exp == -1) {
- frac = 1ULL << 50 | extract64(frac, 2, 50);
- exp = 0;
+ result_exp = exp_off - *exp;
+ result_frac = deposit64(0, 44, 8, estimate);
+ if (result_exp == 0) {
+ result_frac = deposit64(result_frac >> 1, 51, 1, 1);
+ } else if (result_exp == -1) {
+ result_frac = deposit64(result_frac >> 2, 50, 2, 1);
+ result_exp = 0;
}
- return make_float64(sbit | (exp << 52) | frac);
+ *exp = result_exp;
+
+ return result_frac;
}
static bool round_to_inf(float_status *fpst, bool sign_bit)
@@ -11615,18 +11610,63 @@ static bool round_to_inf(float_status *fpst, bool sign_bit)
g_assert_not_reached();
}
+float16 HELPER(recpe_f16)(float16 input, void *fpstp)
+{
+ float_status *fpst = fpstp;
+ float16 f16 = float16_squash_input_denormal(input, fpst);
+ uint32_t f16_val = float16_val(f16);
+ uint32_t f16_sign = float16_is_neg(f16);
+ int f16_exp = extract32(f16_val, 10, 5);
+ uint32_t f16_frac = extract32(f16_val, 0, 10);
+ uint64_t f64_frac;
+
+ if (float16_is_any_nan(f16)) {
+ float16 nan = f16;
+ if (float16_is_signaling_nan(f16, fpst)) {
+ float_raise(float_flag_invalid, fpst);
+ nan = float16_maybe_silence_nan(f16, fpst);
+ }
+ if (fpst->default_nan_mode) {
+ nan = float16_default_nan(fpst);
+ }
+ return nan;
+ } else if (float16_is_infinity(f16)) {
+ return float16_set_sign(float16_zero, float16_is_neg(f16));
+ } else if (float16_is_zero(f16)) {
+ float_raise(float_flag_divbyzero, fpst);
+ return float16_set_sign(float16_infinity, float16_is_neg(f16));
+ } else if (float16_abs(f16) < (1 << 8)) {
+ /* Abs(value) < 2.0^-16 */
+ float_raise(float_flag_overflow | float_flag_inexact, fpst);
+ if (round_to_inf(fpst, f16_sign)) {
+ return float16_set_sign(float16_infinity, f16_sign);
+ } else {
+ return float16_set_sign(float16_maxnorm, f16_sign);
+ }
+ } else if (f16_exp >= 29 && fpst->flush_to_zero) {
+ float_raise(float_flag_underflow, fpst);
+ return float16_set_sign(float16_zero, float16_is_neg(f16));
+ }
+
+ f64_frac = call_recip_estimate(&f16_exp, 29,
+ ((uint64_t) f16_frac) << (52 - 10));
+
+ /* result = sign : result_exp<4:0> : fraction<51:42> */
+ f16_val = deposit32(0, 15, 1, f16_sign);
+ f16_val = deposit32(f16_val, 10, 5, f16_exp);
+ f16_val = deposit32(f16_val, 0, 10, extract64(f64_frac, 52 - 10, 10));
+ return make_float16(f16_val);
+}
+
float32 HELPER(recpe_f32)(float32 input, void *fpstp)
{
float_status *fpst = fpstp;
float32 f32 = float32_squash_input_denormal(input, fpst);
uint32_t f32_val = float32_val(f32);
- uint32_t f32_sbit = 0x80000000ULL & f32_val;
- int32_t f32_exp = extract32(f32_val, 23, 8);
+ bool f32_sign = float32_is_neg(f32);
+ int f32_exp = extract32(f32_val, 23, 8);
uint32_t f32_frac = extract32(f32_val, 0, 23);
- float64 f64, r64;
- uint64_t r64_val;
- int64_t r64_exp;
- uint64_t r64_frac;
+ uint64_t f64_frac;
if (float32_is_any_nan(f32)) {
float32 nan = f32;
@@ -11643,30 +11683,27 @@ float32 HELPER(recpe_f32)(float32 input, void *fpstp)
} else if (float32_is_zero(f32)) {
float_raise(float_flag_divbyzero, fpst);
return float32_set_sign(float32_infinity, float32_is_neg(f32));
- } else if ((f32_val & ~(1ULL << 31)) < (1ULL << 21)) {
+ } else if (float32_abs(f32) < (1ULL << 21)) {
/* Abs(value) < 2.0^-128 */
float_raise(float_flag_overflow | float_flag_inexact, fpst);
- if (round_to_inf(fpst, f32_sbit)) {
- return float32_set_sign(float32_infinity, float32_is_neg(f32));
+ if (round_to_inf(fpst, f32_sign)) {
+ return float32_set_sign(float32_infinity, f32_sign);
} else {
- return float32_set_sign(float32_maxnorm, float32_is_neg(f32));
+ return float32_set_sign(float32_maxnorm, f32_sign);
}
} else if (f32_exp >= 253 && fpst->flush_to_zero) {
float_raise(float_flag_underflow, fpst);
return float32_set_sign(float32_zero, float32_is_neg(f32));
}
+ f64_frac = call_recip_estimate(&f32_exp, 253,
+ ((uint64_t) f32_frac) << (52 - 23));
- f64 = make_float64(((int64_t)(f32_exp) << 52) | (int64_t)(f32_frac) << 29);
- r64 = call_recip_estimate(f64, 253, fpst);
- r64_val = float64_val(r64);
- r64_exp = extract64(r64_val, 52, 11);
- r64_frac = extract64(r64_val, 0, 52);
-
- /* result = sign : result_exp<7:0> : fraction<51:29>; */
- return make_float32(f32_sbit |
- (r64_exp & 0xff) << 23 |
- extract64(r64_frac, 29, 24));
+ /* result = sign : result_exp<7:0> : fraction<51:29> */
+ f32_val = deposit32(0, 31, 1, f32_sign);
+ f32_val = deposit32(f32_val, 23, 8, f32_exp);
+ f32_val = deposit32(f32_val, 0, 23, extract64(f64_frac, 52 - 23, 23));
+ return make_float32(f32_val);
}
float64 HELPER(recpe_f64)(float64 input, void *fpstp)
@@ -11674,12 +11711,9 @@ float64 HELPER(recpe_f64)(float64 input, void *fpstp)
float_status *fpst = fpstp;
float64 f64 = float64_squash_input_denormal(input, fpst);
uint64_t f64_val = float64_val(f64);
- uint64_t f64_sbit = 0x8000000000000000ULL & f64_val;
- int64_t f64_exp = extract64(f64_val, 52, 11);
- float64 r64;
- uint64_t r64_val;
- int64_t r64_exp;
- uint64_t r64_frac;
+ bool f64_sign = float64_is_neg(f64);
+ int f64_exp = extract64(f64_val, 52, 11);
+ uint64_t f64_frac = extract64(f64_val, 0, 52);
/* Deal with any special cases */
if (float64_is_any_nan(f64)) {
@@ -11700,25 +11734,23 @@ float64 HELPER(recpe_f64)(float64 input, void *fpstp)
} else if ((f64_val & ~(1ULL << 63)) < (1ULL << 50)) {
/* Abs(value) < 2.0^-1024 */
float_raise(float_flag_overflow | float_flag_inexact, fpst);
- if (round_to_inf(fpst, f64_sbit)) {
- return float64_set_sign(float64_infinity, float64_is_neg(f64));
+ if (round_to_inf(fpst, f64_sign)) {
+ return float64_set_sign(float64_infinity, f64_sign);
} else {
- return float64_set_sign(float64_maxnorm, float64_is_neg(f64));
+ return float64_set_sign(float64_maxnorm, f64_sign);
}
} else if (f64_exp >= 2045 && fpst->flush_to_zero) {
float_raise(float_flag_underflow, fpst);
return float64_set_sign(float64_zero, float64_is_neg(f64));
}
- r64 = call_recip_estimate(f64, 2045, fpst);
- r64_val = float64_val(r64);
- r64_exp = extract64(r64_val, 52, 11);
- r64_frac = extract64(r64_val, 0, 52);
+ f64_frac = call_recip_estimate(&f64_exp, 2045, f64_frac);
- /* result = sign : result_exp<10:0> : fraction<51:0> */
- return make_float64(f64_sbit |
- ((r64_exp & 0x7ff) << 52) |
- r64_frac);
+ /* result = sign : result_exp<10:0> : fraction<51:0>; */
+ f64_val = deposit64(0, 63, 1, f64_sign);
+ f64_val = deposit64(f64_val, 52, 11, f64_exp);
+ f64_val = deposit64(f64_val, 0, 52, f64_frac);
+ return make_float64(f64_val);
}
/* The algorithm that must be used to calculate the estimate
@@ -11907,19 +11939,17 @@ float64 HELPER(rsqrte_f64)(float64 input, void *fpstp)
uint32_t HELPER(recpe_u32)(uint32_t a, void *fpstp)
{
- float_status *s = fpstp;
- float64 f64;
+ /* float_status *s = fpstp; */
+ int input, estimate;
if ((a & 0x80000000) == 0) {
return 0xffffffff;
}
- f64 = make_float64((0x3feULL << 52)
- | ((int64_t)(a & 0x7fffffff) << 21));
-
- f64 = recip_estimate(f64, s);
+ input = extract32(a, 23, 9);
+ estimate = recip_estimate(input);
- return 0x80000000 | ((float64_val(f64) >> 21) & 0x7fffffff);
+ return deposit32(0, (32 - 9), 9, estimate);
}
uint32_t HELPER(rsqrte_u32)(uint32_t a, void *fpstp)
diff --git a/target/arm/helper.h b/target/arm/helper.h
index c0f35592ff..81d7baed6d 100644
--- a/target/arm/helper.h
+++ b/target/arm/helper.h
@@ -192,6 +192,7 @@ DEF_HELPER_4(vfp_muladds, f32, f32, f32, f32, ptr)
DEF_HELPER_3(recps_f32, f32, f32, f32, env)
DEF_HELPER_3(rsqrts_f32, f32, f32, f32, env)
+DEF_HELPER_FLAGS_2(recpe_f16, TCG_CALL_NO_RWG, f16, f16, ptr)
DEF_HELPER_FLAGS_2(recpe_f32, TCG_CALL_NO_RWG, f32, f32, ptr)
DEF_HELPER_FLAGS_2(recpe_f64, TCG_CALL_NO_RWG, f64, f64, ptr)
DEF_HELPER_FLAGS_2(rsqrte_f32, TCG_CALL_NO_RWG, f32, f32, ptr)
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* Re: [Qemu-devel] [PATCH v3 22/31] arm/helper.c: re-factor recpe and add recepe_f16
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 22/31] arm/helper.c: re-factor recpe and add recepe_f16 Alex Bennée
@ 2018-02-24 0:34 ` Richard Henderson
0 siblings, 0 replies; 46+ messages in thread
From: Richard Henderson @ 2018-02-24 0:34 UTC (permalink / raw)
To: Alex Bennée, qemu-arm; +Cc: qemu-devel, Peter Maydell
On 02/23/2018 07:36 AM, Alex Bennée wrote:
> It looks like the ARM ARM has simplified the pseudo code for the
> calculation which is done on a fixed point 9 bit integer maths. So
> while adding f16 we can also clean this up to be a little less heavy
> on the floating point and just return the fractional part and leave
> the calle's to do the final packing of the result.
>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>
> ---
> v3
> - fix comment 2.0^-16
> - f16_exp >= 29 (biased)
> - remove confusing comment about fpst
> ---
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 46+ messages in thread
* [Qemu-devel] [PATCH v3 23/31] arm/translate-a64: add FP16 FRECPE
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (21 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 22/31] arm/helper.c: re-factor recpe and add recepe_f16 Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 24/31] arm/translate-a64: add FP16 FRCPX to simd_two_reg_misc_fp16 Alex Bennée
` (10 subsequent siblings)
33 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
Now we have added f16 during the re-factoring we can simply call the
helper.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate-a64.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 00b04d34f9..56de5711fe 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -11311,6 +11311,8 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
case 0x6d: /* FCMLE (zero) */
handle_2misc_fcmp_zero(s, fpop, is_scalar, 0, is_q, MO_16, rn, rd);
return;
+ case 0x3d: /* FRECPE */
+ break;
case 0x18: /* FRINTN */
need_rmode = true;
only_in_vector = true;
@@ -11431,6 +11433,9 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
case 0x3b: /* FCVTZS */
gen_helper_advsimd_f16tosinth(tcg_res, tcg_op, tcg_fpstatus);
break;
+ case 0x3d: /* FRECPE */
+ gen_helper_recpe_f16(tcg_res, tcg_op, tcg_fpstatus);
+ break;
case 0x5a: /* FCVTNU */
case 0x5b: /* FCVTMU */
case 0x5c: /* FCVTAU */
@@ -11466,6 +11471,9 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
case 0x3b: /* FCVTZS */
gen_helper_advsimd_f16tosinth(tcg_res, tcg_op, tcg_fpstatus);
break;
+ case 0x3d: /* FRECPE */
+ gen_helper_recpe_f16(tcg_res, tcg_op, tcg_fpstatus);
+ break;
case 0x5a: /* FCVTNU */
case 0x5b: /* FCVTMU */
case 0x5c: /* FCVTAU */
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [Qemu-devel] [PATCH v3 24/31] arm/translate-a64: add FP16 FRCPX to simd_two_reg_misc_fp16
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (22 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 23/31] arm/translate-a64: add FP16 FRECPE Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 25/31] arm/translate-a64: add FP16 FSQRT " Alex Bennée
` (9 subsequent siblings)
33 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
We go with the localised helper.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/helper-a64.c | 29 +++++++++++++++++++++++++++++
target/arm/helper-a64.h | 1 +
target/arm/translate-a64.c | 4 ++++
3 files changed, 34 insertions(+)
diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c
index 722fff2349..92a0d55a9c 100644
--- a/target/arm/helper-a64.c
+++ b/target/arm/helper-a64.c
@@ -356,6 +356,35 @@ uint64_t HELPER(neon_addlp_u16)(uint64_t a)
}
/* Floating-point reciprocal exponent - see FPRecpX in ARM ARM */
+float16 HELPER(frecpx_f16)(float16 a, void *fpstp)
+{
+ float_status *fpst = fpstp;
+ uint16_t val16, sbit;
+ int16_t exp;
+
+ if (float16_is_any_nan(a)) {
+ float16 nan = a;
+ if (float16_is_signaling_nan(a, fpst)) {
+ float_raise(float_flag_invalid, fpst);
+ nan = float16_maybe_silence_nan(a, fpst);
+ }
+ if (fpst->default_nan_mode) {
+ nan = float16_default_nan(fpst);
+ }
+ return nan;
+ }
+
+ val16 = float16_val(a);
+ sbit = 0x8000 & val16;
+ exp = extract32(val16, 10, 5);
+
+ if (exp == 0) {
+ return make_float16(deposit32(sbit, 10, 5, 0x1e));
+ } else {
+ return make_float16(deposit32(sbit, 10, 5, ~exp));
+ }
+}
+
float32 HELPER(frecpx_f32)(float32 a, void *fpstp)
{
float_status *fpst = fpstp;
diff --git a/target/arm/helper-a64.h b/target/arm/helper-a64.h
index 32931b17c6..339323fc3d 100644
--- a/target/arm/helper-a64.h
+++ b/target/arm/helper-a64.h
@@ -41,6 +41,7 @@ DEF_HELPER_FLAGS_1(neon_addlp_s16, TCG_CALL_NO_RWG_SE, i64, i64)
DEF_HELPER_FLAGS_1(neon_addlp_u16, TCG_CALL_NO_RWG_SE, i64, i64)
DEF_HELPER_FLAGS_2(frecpx_f64, TCG_CALL_NO_RWG, f64, f64, ptr)
DEF_HELPER_FLAGS_2(frecpx_f32, TCG_CALL_NO_RWG, f32, f32, ptr)
+DEF_HELPER_FLAGS_2(frecpx_f16, TCG_CALL_NO_RWG, f16, f16, ptr)
DEF_HELPER_FLAGS_2(fcvtx_f64_to_f32, TCG_CALL_NO_RWG, f32, f64, env)
DEF_HELPER_FLAGS_3(crc32_64, TCG_CALL_NO_RWG_SE, i64, i64, i64, i32)
DEF_HELPER_FLAGS_3(crc32c_64, TCG_CALL_NO_RWG_SE, i64, i64, i64, i32)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 56de5711fe..a7e99e2a2f 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -11312,6 +11312,7 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
handle_2misc_fcmp_zero(s, fpop, is_scalar, 0, is_q, MO_16, rn, rd);
return;
case 0x3d: /* FRECPE */
+ case 0x3f: /* FRECPX */
break;
case 0x18: /* FRINTN */
need_rmode = true;
@@ -11436,6 +11437,9 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
case 0x3d: /* FRECPE */
gen_helper_recpe_f16(tcg_res, tcg_op, tcg_fpstatus);
break;
+ case 0x3f: /* FRECPX */
+ gen_helper_frecpx_f16(tcg_res, tcg_op, tcg_fpstatus);
+ break;
case 0x5a: /* FCVTNU */
case 0x5b: /* FCVTMU */
case 0x5c: /* FCVTAU */
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [Qemu-devel] [PATCH v3 25/31] arm/translate-a64: add FP16 FSQRT to simd_two_reg_misc_fp16
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (23 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 24/31] arm/translate-a64: add FP16 FRCPX to simd_two_reg_misc_fp16 Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 26/31] arm/helper.c: re-factor rsqrte and add rsqrte_f16 Alex Bennée
` (8 subsequent siblings)
33 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
v2
remove superfluous helpers
---
target/arm/helper-a64.c | 13 +++++++++++++
target/arm/helper-a64.h | 1 +
target/arm/translate-a64.c | 5 +++++
3 files changed, 19 insertions(+)
diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c
index 92a0d55a9c..afb25ad20c 100644
--- a/target/arm/helper-a64.c
+++ b/target/arm/helper-a64.c
@@ -828,3 +828,16 @@ uint32_t HELPER(advsimd_f16touinth)(float16 a, void *fpstp)
}
return float16_to_uint16(a, fpst);
}
+
+/*
+ * Square Root and Reciprocal square root
+ */
+
+float16 HELPER(sqrt_f16)(float16 a, void *fpstp)
+{
+ float_status *s = fpstp;
+
+ return float16_sqrt(a, s);
+}
+
+
diff --git a/target/arm/helper-a64.h b/target/arm/helper-a64.h
index 339323fc3d..ef4ddfe9d8 100644
--- a/target/arm/helper-a64.h
+++ b/target/arm/helper-a64.h
@@ -80,3 +80,4 @@ DEF_HELPER_2(advsimd_rinth_exact, f16, f16, ptr)
DEF_HELPER_2(advsimd_rinth, f16, f16, ptr)
DEF_HELPER_2(advsimd_f16tosinth, i32, f16, ptr)
DEF_HELPER_2(advsimd_f16touinth, i32, f16, ptr)
+DEF_HELPER_2(sqrt_f16, f16, f16, ptr)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index a7e99e2a2f..ba3926262e 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -11388,6 +11388,8 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
case 0x6f: /* FNEG */
need_fpst = false;
break;
+ case 0x7f: /* FSQRT (vector) */
+ break;
default:
fprintf(stderr, "%s: insn %#04x fpop %#2x\n", __func__, insn, fpop);
g_assert_not_reached();
@@ -11502,6 +11504,9 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
case 0x6f: /* FNEG */
tcg_gen_xori_i32(tcg_res, tcg_op, 0x8000);
break;
+ case 0x7f: /* FSQRT */
+ gen_helper_sqrt_f16(tcg_res, tcg_op, tcg_fpstatus);
+ break;
default:
g_assert_not_reached();
}
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [Qemu-devel] [PATCH v3 26/31] arm/helper.c: re-factor rsqrte and add rsqrte_f16
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (24 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 25/31] arm/translate-a64: add FP16 FSQRT " Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 27/31] arm/translate-a64: add FP16 FRSQRTE to simd_two_reg_misc_fp16 Alex Bennée
` (7 subsequent siblings)
33 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
Much like recpe the ARM ARM has simplified the pseudo code for the
calculation which is done on a fixed point 9 bit integer maths. So
while adding f16 we can also clean this up to be a little less heavy
on the floating point and just return the fractional part and leave
the calle's to do the final packing of the result.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
v2
- checkpatch fixes
---
target/arm/helper.c | 221 ++++++++++++++++++++++++----------------------------
target/arm/helper.h | 1 +
2 files changed, 104 insertions(+), 118 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index e2d0ff0b4c..c82f63d440 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -11756,56 +11756,97 @@ float64 HELPER(recpe_f64)(float64 input, void *fpstp)
/* The algorithm that must be used to calculate the estimate
* is specified by the ARM ARM.
*/
-static float64 recip_sqrt_estimate(float64 a, float_status *real_fp_status)
-{
- /* These calculations mustn't set any fp exception flags,
- * so we use a local copy of the fp_status.
- */
- float_status dummy_status = *real_fp_status;
- float_status *s = &dummy_status;
- float64 q;
- int64_t q_int;
-
- if (float64_lt(a, float64_half, s)) {
- /* range 0.25 <= a < 0.5 */
-
- /* a in units of 1/512 rounded down */
- /* q0 = (int)(a * 512.0); */
- q = float64_mul(float64_512, a, s);
- q_int = float64_to_int64_round_to_zero(q, s);
-
- /* reciprocal root r */
- /* r = 1.0 / sqrt(((double)q0 + 0.5) / 512.0); */
- q = int64_to_float64(q_int, s);
- q = float64_add(q, float64_half, s);
- q = float64_div(q, float64_512, s);
- q = float64_sqrt(q, s);
- q = float64_div(float64_one, q, s);
+
+static int do_recip_sqrt_estimate(int a)
+{
+ int b, estimate;
+
+ assert(128 <= a && a < 512);
+ if (a < 256) {
+ a = a * 2 + 1;
} else {
- /* range 0.5 <= a < 1.0 */
+ a = (a >> 1) << 1;
+ a = (a + 1) * 2;
+ }
+ b = 512;
+ while (a * (b + 1) * (b + 1) < (1 << 28)) {
+ b += 1;
+ }
+ estimate = (b + 1) / 2;
+ assert(256 <= estimate && estimate < 512);
+
+ return estimate;
+}
+
- /* a in units of 1/256 rounded down */
- /* q1 = (int)(a * 256.0); */
- q = float64_mul(float64_256, a, s);
- int64_t q_int = float64_to_int64_round_to_zero(q, s);
+static uint64_t recip_sqrt_estimate(int *exp , int exp_off, uint64_t frac)
+{
+ int estimate;
+ uint32_t scaled;
- /* reciprocal root r */
- /* r = 1.0 /sqrt(((double)q1 + 0.5) / 256); */
- q = int64_to_float64(q_int, s);
- q = float64_add(q, float64_half, s);
- q = float64_div(q, float64_256, s);
- q = float64_sqrt(q, s);
- q = float64_div(float64_one, q, s);
+ if (*exp == 0) {
+ while (extract64(frac, 51, 1) == 0) {
+ frac = frac << 1;
+ *exp -= 1;
+ }
+ frac = extract64(frac, 0, 51) << 1;
}
- /* r in units of 1/256 rounded to nearest */
- /* s = (int)(256.0 * r + 0.5); */
- q = float64_mul(q, float64_256,s );
- q = float64_add(q, float64_half, s);
- q_int = float64_to_int64_round_to_zero(q, s);
+ if (*exp & 1) {
+ /* scaled = UInt('01':fraction<51:45>) */
+ scaled = deposit32(1 << 7, 0, 7, extract64(frac, 45, 7));
+ } else {
+ /* scaled = UInt('1':fraction<51:44>) */
+ scaled = deposit32(1 << 8, 0, 8, extract64(frac, 44, 8));
+ }
+ estimate = do_recip_sqrt_estimate(scaled);
- /* return (double)s / 256.0;*/
- return float64_div(int64_to_float64(q_int, s), float64_256, s);
+ *exp = (exp_off - *exp) / 2;
+ return extract64(estimate, 0, 8) << 44;
+}
+
+float16 HELPER(rsqrte_f16)(float16 input, void *fpstp)
+{
+ float_status *s = fpstp;
+ float16 f16 = float16_squash_input_denormal(input, s);
+ uint16_t val = float16_val(f16);
+ bool f16_sign = float16_is_neg(f16);
+ int f16_exp = extract32(val, 10, 5);
+ uint16_t f16_frac = extract32(val, 0, 10);
+ uint64_t f64_frac;
+
+ if (float16_is_any_nan(f16)) {
+ float16 nan = f16;
+ if (float16_is_signaling_nan(f16, s)) {
+ float_raise(float_flag_invalid, s);
+ nan = float16_maybe_silence_nan(f16, s);
+ }
+ if (s->default_nan_mode) {
+ nan = float16_default_nan(s);
+ }
+ return nan;
+ } else if (float16_is_zero(f16)) {
+ float_raise(float_flag_divbyzero, s);
+ return float16_set_sign(float16_infinity, f16_sign);
+ } else if (f16_sign) {
+ float_raise(float_flag_invalid, s);
+ return float16_default_nan(s);
+ } else if (float16_is_infinity(f16)) {
+ return float16_zero;
+ }
+
+ /* Scale and normalize to a double-precision value between 0.25 and 1.0,
+ * preserving the parity of the exponent. */
+
+ f64_frac = ((uint64_t) f16_frac) << (52 - 10);
+
+ f64_frac = recip_sqrt_estimate(&f16_exp, 44, f64_frac);
+
+ /* result = sign : result_exp<4:0> : estimate<7:0> : Zeros(2) */
+ val = deposit32(0, 15, 1, f16_sign);
+ val = deposit32(val, 10, 5, f16_exp);
+ val = deposit32(val, 2, 8, extract64(f64_frac, 52 - 8, 8));
+ return make_float16(val);
}
float32 HELPER(rsqrte_f32)(float32 input, void *fpstp)
@@ -11813,13 +11854,10 @@ float32 HELPER(rsqrte_f32)(float32 input, void *fpstp)
float_status *s = fpstp;
float32 f32 = float32_squash_input_denormal(input, s);
uint32_t val = float32_val(f32);
- uint32_t f32_sbit = 0x80000000 & val;
- int32_t f32_exp = extract32(val, 23, 8);
+ uint32_t f32_sign = float32_is_neg(f32);
+ int f32_exp = extract32(val, 23, 8);
uint32_t f32_frac = extract32(val, 0, 23);
uint64_t f64_frac;
- uint64_t val64;
- int result_exp;
- float64 f64;
if (float32_is_any_nan(f32)) {
float32 nan = f32;
@@ -11845,32 +11883,13 @@ float32 HELPER(rsqrte_f32)(float32 input, void *fpstp)
* preserving the parity of the exponent. */
f64_frac = ((uint64_t) f32_frac) << 29;
- if (f32_exp == 0) {
- while (extract64(f64_frac, 51, 1) == 0) {
- f64_frac = f64_frac << 1;
- f32_exp = f32_exp-1;
- }
- f64_frac = extract64(f64_frac, 0, 51) << 1;
- }
-
- if (extract64(f32_exp, 0, 1) == 0) {
- f64 = make_float64(((uint64_t) f32_sbit) << 32
- | (0x3feULL << 52)
- | f64_frac);
- } else {
- f64 = make_float64(((uint64_t) f32_sbit) << 32
- | (0x3fdULL << 52)
- | f64_frac);
- }
- result_exp = (380 - f32_exp) / 2;
+ f64_frac = recip_sqrt_estimate(&f32_exp, 380, f64_frac);
- f64 = recip_sqrt_estimate(f64, s);
-
- val64 = float64_val(f64);
-
- val = ((result_exp & 0xff) << 23)
- | ((val64 >> 29) & 0x7fffff);
+ /* result = sign : result_exp<4:0> : estimate<7:0> : Zeros(15) */
+ val = deposit32(0, 31, 1, f32_sign);
+ val = deposit32(val, 23, 8, f32_exp);
+ val = deposit32(val, 15, 8, extract64(f64_frac, 52 - 8, 8));
return make_float32(val);
}
@@ -11879,11 +11898,9 @@ float64 HELPER(rsqrte_f64)(float64 input, void *fpstp)
float_status *s = fpstp;
float64 f64 = float64_squash_input_denormal(input, s);
uint64_t val = float64_val(f64);
- uint64_t f64_sbit = 0x8000000000000000ULL & val;
- int64_t f64_exp = extract64(val, 52, 11);
+ bool f64_sign = float64_is_neg(f64);
+ int f64_exp = extract64(val, 52, 11);
uint64_t f64_frac = extract64(val, 0, 52);
- int64_t result_exp;
- uint64_t result_frac;
if (float64_is_any_nan(f64)) {
float64 nan = f64;
@@ -11905,36 +11922,13 @@ float64 HELPER(rsqrte_f64)(float64 input, void *fpstp)
return float64_zero;
}
- /* Scale and normalize to a double-precision value between 0.25 and 1.0,
- * preserving the parity of the exponent. */
-
- if (f64_exp == 0) {
- while (extract64(f64_frac, 51, 1) == 0) {
- f64_frac = f64_frac << 1;
- f64_exp = f64_exp - 1;
- }
- f64_frac = extract64(f64_frac, 0, 51) << 1;
- }
+ f64_frac = recip_sqrt_estimate(&f64_exp, 3068, f64_frac);
- if (extract64(f64_exp, 0, 1) == 0) {
- f64 = make_float64(f64_sbit
- | (0x3feULL << 52)
- | f64_frac);
- } else {
- f64 = make_float64(f64_sbit
- | (0x3fdULL << 52)
- | f64_frac);
- }
-
- result_exp = (3068 - f64_exp) / 2;
-
- f64 = recip_sqrt_estimate(f64, s);
-
- result_frac = extract64(float64_val(f64), 0, 52);
-
- return make_float64(f64_sbit |
- ((result_exp & 0x7ff) << 52) |
- result_frac);
+ /* result = sign : result_exp<4:0> : estimate<7:0> : Zeros(44) */
+ val = deposit64(0, 61, 1, f64_sign);
+ val = deposit64(val, 52, 11, f64_exp);
+ val = deposit64(val, 44, 8, extract64(f64_frac, 52 - 8, 8));
+ return make_float64(val);
}
uint32_t HELPER(recpe_u32)(uint32_t a, void *fpstp)
@@ -11954,24 +11948,15 @@ uint32_t HELPER(recpe_u32)(uint32_t a, void *fpstp)
uint32_t HELPER(rsqrte_u32)(uint32_t a, void *fpstp)
{
- float_status *fpst = fpstp;
- float64 f64;
+ int estimate;
if ((a & 0xc0000000) == 0) {
return 0xffffffff;
}
- if (a & 0x80000000) {
- f64 = make_float64((0x3feULL << 52)
- | ((uint64_t)(a & 0x7fffffff) << 21));
- } else { /* bits 31-30 == '01' */
- f64 = make_float64((0x3fdULL << 52)
- | ((uint64_t)(a & 0x3fffffff) << 22));
- }
-
- f64 = recip_sqrt_estimate(f64, fpst);
+ estimate = do_recip_sqrt_estimate(extract32(a, 23, 9));
- return 0x80000000 | ((float64_val(f64) >> 21) & 0x7fffffff);
+ return deposit32(0, 23, 9, estimate);
}
/* VFPv4 fused multiply-accumulate */
diff --git a/target/arm/helper.h b/target/arm/helper.h
index 81d7baed6d..6dd8504ec3 100644
--- a/target/arm/helper.h
+++ b/target/arm/helper.h
@@ -195,6 +195,7 @@ DEF_HELPER_3(rsqrts_f32, f32, f32, f32, env)
DEF_HELPER_FLAGS_2(recpe_f16, TCG_CALL_NO_RWG, f16, f16, ptr)
DEF_HELPER_FLAGS_2(recpe_f32, TCG_CALL_NO_RWG, f32, f32, ptr)
DEF_HELPER_FLAGS_2(recpe_f64, TCG_CALL_NO_RWG, f64, f64, ptr)
+DEF_HELPER_FLAGS_2(rsqrte_f16, TCG_CALL_NO_RWG, f16, f16, ptr)
DEF_HELPER_FLAGS_2(rsqrte_f32, TCG_CALL_NO_RWG, f32, f32, ptr)
DEF_HELPER_FLAGS_2(rsqrte_f64, TCG_CALL_NO_RWG, f64, f64, ptr)
DEF_HELPER_2(recpe_u32, i32, i32, ptr)
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [Qemu-devel] [PATCH v3 27/31] arm/translate-a64: add FP16 FRSQRTE to simd_two_reg_misc_fp16
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (25 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 26/31] arm/helper.c: re-factor rsqrte and add rsqrte_f16 Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 28/31] arm/translate-a64: add FP16 FMOV to simd_mod_imm Alex Bennée
` (6 subsequent siblings)
33 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate-a64.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index ba3926262e..faec8084fa 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -11388,6 +11388,7 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
case 0x6f: /* FNEG */
need_fpst = false;
break;
+ case 0x7d: /* FRSQRTE */
case 0x7f: /* FSQRT (vector) */
break;
default:
@@ -11452,6 +11453,9 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
case 0x6f: /* FNEG */
tcg_gen_xori_i32(tcg_res, tcg_op, 0x8000);
break;
+ case 0x7d: /* FRSQRTE */
+ gen_helper_rsqrte_f16(tcg_res, tcg_op, tcg_fpstatus);
+ break;
default:
g_assert_not_reached();
}
@@ -11504,6 +11508,9 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
case 0x6f: /* FNEG */
tcg_gen_xori_i32(tcg_res, tcg_op, 0x8000);
break;
+ case 0x7d: /* FRSQRTE */
+ gen_helper_rsqrte_f16(tcg_res, tcg_op, tcg_fpstatus);
+ break;
case 0x7f: /* FSQRT */
gen_helper_sqrt_f16(tcg_res, tcg_op, tcg_fpstatus);
break;
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [Qemu-devel] [PATCH v3 28/31] arm/translate-a64: add FP16 FMOV to simd_mod_imm
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (26 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 27/31] arm/translate-a64: add FP16 FRSQRTE to simd_two_reg_misc_fp16 Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-24 0:42 ` Richard Henderson
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 29/31] arm/translate-a64: add all FP16 ops in simd_scalar_pairwise Alex Bennée
` (5 subsequent siblings)
33 siblings, 1 reply; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
Only one half-precision instruction has been added to this group.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
v2
- checkpatch fixes
v3
- use vfp_expand_imm
---
target/arm/translate-a64.c | 35 +++++++++++++++++++++++++----------
1 file changed, 25 insertions(+), 10 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index faec8084fa..806f2eb34a 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -6234,6 +6234,8 @@ static void disas_simd_copy(DisasContext *s, uint32_t insn)
* MVNI - move inverted (shifted) imm into register
* ORR - bitwise OR of (shifted) imm with register
* BIC - bitwise clear of (shifted) imm with register
+ * With ARMv8.2 we also have:
+ * FMOV half-precision
*/
static void disas_simd_mod_imm(DisasContext *s, uint32_t insn)
{
@@ -6248,8 +6250,11 @@ static void disas_simd_mod_imm(DisasContext *s, uint32_t insn)
uint64_t imm = 0;
if (o2 != 0 || ((cmode == 0xf) && is_neg && !is_q)) {
- unallocated_encoding(s);
- return;
+ /* Check for FMOV (vector, immediate) - half-precision */
+ if (!(arm_dc_feature(s, ARM_FEATURE_V8_FP16) && o2 && cmode == 0xf)) {
+ unallocated_encoding(s);
+ return;
+ }
}
if (!fp_access_check(s)) {
@@ -6307,19 +6312,29 @@ static void disas_simd_mod_imm(DisasContext *s, uint32_t insn)
imm |= 0x4000000000000000ULL;
}
} else {
- imm = (abcdefgh & 0x3f) << 19;
- if (abcdefgh & 0x80) {
- imm |= 0x80000000;
- }
- if (abcdefgh & 0x40) {
- imm |= 0x3e000000;
+ if (o2) {
+ /* FMOV (vector, immediate) - half-precision */
+ imm = vfp_expand_imm(MO_16, abcdefgh);
+ /* now duplicate across the lanes */
+ imm = bitfield_replicate(imm, 16);
} else {
- imm |= 0x40000000;
+ imm = (abcdefgh & 0x3f) << 19;
+ if (abcdefgh & 0x80) {
+ imm |= 0x80000000;
+ }
+ if (abcdefgh & 0x40) {
+ imm |= 0x3e000000;
+ } else {
+ imm |= 0x40000000;
+ }
+ imm |= (imm << 32);
}
- imm |= (imm << 32);
}
}
break;
+ default:
+ fprintf(stderr, "%s: cmode_3_1: %x\n", __func__, cmode_3_1);
+ g_assert_not_reached();
}
if (cmode_3_1 != 7 && is_neg) {
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [Qemu-devel] [PATCH v3 29/31] arm/translate-a64: add all FP16 ops in simd_scalar_pairwise
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (27 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 28/31] arm/translate-a64: add FP16 FMOV to simd_mod_imm Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 30/31] arm/translate-a64: implement simd_scalar_three_reg_same_fp16 Alex Bennée
` (4 subsequent siblings)
33 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
I only needed to do a little light re-factoring to support the
half-precision helpers.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate-a64.c | 80 +++++++++++++++++++++++++++++++---------------
1 file changed, 54 insertions(+), 26 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 806f2eb34a..6eae8bd8b1 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -6416,24 +6416,30 @@ static void disas_simd_scalar_pairwise(DisasContext *s, uint32_t insn)
case 0xf: /* FMAXP */
case 0x2c: /* FMINNMP */
case 0x2f: /* FMINP */
- /* FP op, size[0] is 32 or 64 bit */
+ /* FP op, size[0] is 32 or 64 bit*/
if (!u) {
- unallocated_encoding(s);
- return;
+ if (!arm_dc_feature(s, ARM_FEATURE_V8_FP16)) {
+ unallocated_encoding(s);
+ return;
+ } else {
+ size = MO_16;
+ }
+ } else {
+ size = extract32(size, 0, 1) ? MO_64 : MO_32;
}
+
if (!fp_access_check(s)) {
return;
}
- size = extract32(size, 0, 1) ? 3 : 2;
- fpst = get_fpstatus_ptr(false);
+ fpst = get_fpstatus_ptr(size == MO_16);
break;
default:
unallocated_encoding(s);
return;
}
- if (size == 3) {
+ if (size == MO_64) {
TCGv_i64 tcg_op1 = tcg_temp_new_i64();
TCGv_i64 tcg_op2 = tcg_temp_new_i64();
TCGv_i64 tcg_res = tcg_temp_new_i64();
@@ -6474,27 +6480,49 @@ static void disas_simd_scalar_pairwise(DisasContext *s, uint32_t insn)
TCGv_i32 tcg_op2 = tcg_temp_new_i32();
TCGv_i32 tcg_res = tcg_temp_new_i32();
- read_vec_element_i32(s, tcg_op1, rn, 0, MO_32);
- read_vec_element_i32(s, tcg_op2, rn, 1, MO_32);
+ read_vec_element_i32(s, tcg_op1, rn, 0, size);
+ read_vec_element_i32(s, tcg_op2, rn, 1, size);
- switch (opcode) {
- case 0xc: /* FMAXNMP */
- gen_helper_vfp_maxnums(tcg_res, tcg_op1, tcg_op2, fpst);
- break;
- case 0xd: /* FADDP */
- gen_helper_vfp_adds(tcg_res, tcg_op1, tcg_op2, fpst);
- break;
- case 0xf: /* FMAXP */
- gen_helper_vfp_maxs(tcg_res, tcg_op1, tcg_op2, fpst);
- break;
- case 0x2c: /* FMINNMP */
- gen_helper_vfp_minnums(tcg_res, tcg_op1, tcg_op2, fpst);
- break;
- case 0x2f: /* FMINP */
- gen_helper_vfp_mins(tcg_res, tcg_op1, tcg_op2, fpst);
- break;
- default:
- g_assert_not_reached();
+ if (size == MO_16) {
+ switch (opcode) {
+ case 0xc: /* FMAXNMP */
+ gen_helper_advsimd_maxnumh(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0xd: /* FADDP */
+ gen_helper_advsimd_addh(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0xf: /* FMAXP */
+ gen_helper_advsimd_maxh(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x2c: /* FMINNMP */
+ gen_helper_advsimd_minnumh(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x2f: /* FMINP */
+ gen_helper_advsimd_minh(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ default:
+ g_assert_not_reached();
+ }
+ } else {
+ switch (opcode) {
+ case 0xc: /* FMAXNMP */
+ gen_helper_vfp_maxnums(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0xd: /* FADDP */
+ gen_helper_vfp_adds(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0xf: /* FMAXP */
+ gen_helper_vfp_maxs(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x2c: /* FMINNMP */
+ gen_helper_vfp_minnums(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x2f: /* FMINP */
+ gen_helper_vfp_mins(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ default:
+ g_assert_not_reached();
+ }
}
write_fp_sreg(s, rd, tcg_res);
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [Qemu-devel] [PATCH v3 30/31] arm/translate-a64: implement simd_scalar_three_reg_same_fp16
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (28 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 29/31] arm/translate-a64: add all FP16 ops in simd_scalar_pairwise Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-24 0:49 ` Richard Henderson
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 31/31] arm/translate-a64: add all single op FP16 to handle_fp_1src_half Alex Bennée
` (3 subsequent siblings)
33 siblings, 1 reply; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
This covers the encoding group:
Advanced SIMD scalar three same FP16
As all the helpers are already there it is simply a case of calling the
existing helpers in the scalar context.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
v2
- checkpatch fixes
v3
- check for FP16 feature
- remove stray debug
- make abs a bitwise operation
- checkpatch long line
---
target/arm/translate-a64.c | 99 ++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 99 insertions(+)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 6eae8bd8b1..6704d66be7 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -7802,6 +7802,104 @@ static void disas_simd_scalar_three_reg_same(DisasContext *s, uint32_t insn)
tcg_temp_free_i64(tcg_rd);
}
+/* AdvSIMD scalar three same FP16
+ * 31 30 29 28 24 23 22 21 20 16 15 14 13 11 10 9 5 4 0
+ * +-----+---+-----------+---+-----+------+-----+--------+---+----+----+
+ * | 0 1 | U | 1 1 1 1 0 | a | 1 0 | Rm | 0 0 | opcode | 1 | Rn | Rd |
+ * +-----+---+-----------+---+-----+------+-----+--------+---+----+----+
+ * v: 0101 1110 0100 0000 0000 0100 0000 0000 => 5e400400
+ * m: 1101 1111 0110 0000 1100 0100 0000 0000 => df60c400
+ */
+static void disas_simd_scalar_three_reg_same_fp16(DisasContext *s,
+ uint32_t insn)
+{
+ int rd = extract32(insn, 0, 5);
+ int rn = extract32(insn, 5, 5);
+ int opcode = extract32(insn, 11, 3);
+ int rm = extract32(insn, 16, 5);
+ bool u = extract32(insn, 29, 1);
+ bool a = extract32(insn, 23, 1);
+ int fpopcode = opcode | (a << 3) | (u << 4);
+ TCGv_ptr fpst;
+ TCGv_i32 tcg_op1;
+ TCGv_i32 tcg_op2;
+ TCGv_i32 tcg_res;
+
+ switch (fpopcode) {
+ case 0x03: /* FMULX */
+ case 0x04: /* FCMEQ (reg) */
+ case 0x07: /* FRECPS */
+ case 0x0f: /* FRSQRTS */
+ case 0x14: /* FCMGE (reg) */
+ case 0x15: /* FACGE */
+ case 0x1a: /* FABD */
+ case 0x1c: /* FCMGT (reg) */
+ case 0x1d: /* FACGT */
+ break;
+ default:
+ unallocated_encoding(s);
+ return;
+ }
+
+ if (!arm_dc_feature(s, ARM_FEATURE_V8_FP16)) {
+ unallocated_encoding(s);
+ }
+
+ if (!fp_access_check(s)) {
+ return;
+ }
+
+ fpst = get_fpstatus_ptr(true);
+
+ tcg_op1 = tcg_temp_new_i32();
+ tcg_op2 = tcg_temp_new_i32();
+ tcg_res = tcg_temp_new_i32();
+
+ read_vec_element_i32(s, tcg_op1, rn, 0, MO_16);
+ read_vec_element_i32(s, tcg_op2, rm, 0, MO_16);
+
+ switch (fpopcode) {
+ case 0x03: /* FMULX */
+ gen_helper_advsimd_mulxh(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x04: /* FCMEQ (reg) */
+ gen_helper_advsimd_ceq_f16(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x07: /* FRECPS */
+ gen_helper_recpsf_f16(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x0f: /* FRSQRTS */
+ gen_helper_rsqrtsf_f16(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x14: /* FCMGE (reg) */
+ gen_helper_advsimd_cge_f16(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x15: /* FACGE */
+ gen_helper_advsimd_acge_f16(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x1a: /* FABD */
+ gen_helper_advsimd_subh(tcg_res, tcg_op1, tcg_op2, fpst);
+ tcg_gen_andi_i32(tcg_res, tcg_res, 0x7fff);
+ break;
+ case 0x1c: /* FCMGT (reg) */
+ gen_helper_advsimd_cgt_f16(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ case 0x1d: /* FACGT */
+ gen_helper_advsimd_acgt_f16(tcg_res, tcg_op1, tcg_op2, fpst);
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
+ write_fp_sreg(s, rd, tcg_res);
+
+
+ tcg_temp_free_i32(tcg_res);
+ tcg_temp_free_i32(tcg_op1);
+ tcg_temp_free_i32(tcg_op2);
+ tcg_temp_free_ptr(fpst);
+}
+
static void handle_2misc_64(DisasContext *s, int opcode, bool u,
TCGv_i64 tcg_rd, TCGv_i64 tcg_rn,
TCGv_i32 tcg_rmode, TCGv_ptr tcg_fpstatus)
@@ -12654,6 +12752,7 @@ static const AArch64DecodeTable data_proc_simd[] = {
{ 0xce408000, 0xffe0c000, disas_crypto_three_reg_imm2 },
{ 0x0e400400, 0x9f60c400, disas_simd_three_reg_same_fp16 },
{ 0x0e780800, 0x8f7e0c00, disas_simd_two_reg_misc_fp16 },
+ { 0x5e400400, 0xdf60c400, disas_simd_scalar_three_reg_same_fp16 },
{ 0x00000000, 0x00000000, NULL }
};
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* Re: [Qemu-devel] [PATCH v3 30/31] arm/translate-a64: implement simd_scalar_three_reg_same_fp16
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 30/31] arm/translate-a64: implement simd_scalar_three_reg_same_fp16 Alex Bennée
@ 2018-02-24 0:49 ` Richard Henderson
0 siblings, 0 replies; 46+ messages in thread
From: Richard Henderson @ 2018-02-24 0:49 UTC (permalink / raw)
To: Alex Bennée, qemu-arm; +Cc: qemu-devel, Peter Maydell
On 02/23/2018 07:36 AM, Alex Bennée wrote:
> This covers the encoding group:
>
> Advanced SIMD scalar three same FP16
>
> As all the helpers are already there it is simply a case of calling the
> existing helpers in the scalar context.
>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>
> ---
> v2
> - checkpatch fixes
> v3
> - check for FP16 feature
> - remove stray debug
> - make abs a bitwise operation
> - checkpatch long line
> ---
> target/arm/translate-a64.c | 99 ++++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 99 insertions(+)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 46+ messages in thread
* [Qemu-devel] [PATCH v3 31/31] arm/translate-a64: add all single op FP16 to handle_fp_1src_half
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (29 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 30/31] arm/translate-a64: implement simd_scalar_three_reg_same_fp16 Alex Bennée
@ 2018-02-23 15:36 ` Alex Bennée
2018-02-24 0:53 ` Richard Henderson
2018-02-24 0:58 ` [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Richard Henderson
` (2 subsequent siblings)
33 siblings, 1 reply; 46+ messages in thread
From: Alex Bennée @ 2018-02-23 15:36 UTC (permalink / raw)
To: qemu-arm; +Cc: qemu-devel, richard.henderson, Alex Bennée, Peter Maydell
This includes FMOV, FABS, FNEG, FSQRT and FRINT[NPMZAXI]. We re-use
existing helpers to achieve this.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
v3
- make fabs a bitwise operation
- use read_vec_element_i32 to read value
- properly wire into disas_fp_1rc
---
target/arm/translate-a64.c | 71 ++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 71 insertions(+)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 6704d66be7..be2bf50ddb 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -4596,6 +4596,65 @@ static void disas_fp_csel(DisasContext *s, uint32_t insn)
tcg_temp_free_i64(t_true);
}
+/* Floating-point data-processing (1 source) - half precision */
+static void handle_fp_1src_half(DisasContext *s, int opcode, int rd, int rn)
+{
+ TCGv_ptr fpst = NULL;
+ TCGv_i32 tcg_op = tcg_temp_new_i32();
+ TCGv_i32 tcg_res = tcg_temp_new_i32();
+
+ read_vec_element_i32(s, tcg_op, rn, 0, MO_16);
+
+ switch (opcode) {
+ case 0x0: /* FMOV */
+ tcg_gen_mov_i32(tcg_res, tcg_op);
+ break;
+ case 0x1: /* FABS */
+ tcg_gen_andi_i32(tcg_res, tcg_op, 0x7fff);
+ break;
+ case 0x2: /* FNEG */
+ tcg_gen_xori_i32(tcg_res, tcg_op, 0x8000);
+ break;
+ case 0x3: /* FSQRT */
+ gen_helper_sqrt_f16(tcg_res, tcg_op, cpu_env);
+ break;
+ case 0x8: /* FRINTN */
+ case 0x9: /* FRINTP */
+ case 0xa: /* FRINTM */
+ case 0xb: /* FRINTZ */
+ case 0xc: /* FRINTA */
+ {
+ TCGv_i32 tcg_rmode = tcg_const_i32(arm_rmode_to_sf(opcode & 7));
+ fpst = get_fpstatus_ptr(true);
+
+ gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
+ gen_helper_advsimd_rinth(tcg_res, tcg_op, fpst);
+
+ gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
+ tcg_temp_free_i32(tcg_rmode);
+ break;
+ }
+ case 0xe: /* FRINTX */
+ fpst = get_fpstatus_ptr(true);
+ gen_helper_advsimd_rinth_exact(tcg_res, tcg_op, fpst);
+ break;
+ case 0xf: /* FRINTI */
+ fpst = get_fpstatus_ptr(true);
+ gen_helper_advsimd_rinth(tcg_res, tcg_op, fpst);
+ break;
+ default:
+ abort();
+ }
+
+ write_fp_sreg(s, rd, tcg_res);
+
+ if (fpst) {
+ tcg_temp_free_ptr(fpst);
+ }
+ tcg_temp_free_i32(tcg_op);
+ tcg_temp_free_i32(tcg_res);
+}
+
/* Floating-point data-processing (1 source) - single precision */
static void handle_fp_1src_single(DisasContext *s, int opcode, int rd, int rn)
{
@@ -4825,6 +4884,18 @@ static void disas_fp_1src(DisasContext *s, uint32_t insn)
handle_fp_1src_double(s, opcode, rd, rn);
break;
+ case 3:
+ if (!arm_dc_feature(s, ARM_FEATURE_V8_FP16)) {
+ unallocated_encoding(s);
+ return;
+ }
+
+ if (!fp_access_check(s)) {
+ return;
+ }
+
+ handle_fp_1src_half(s, opcode, rd, rn);
+ break;
default:
unallocated_encoding(s);
}
--
2.15.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* Re: [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (30 preceding siblings ...)
2018-02-23 15:36 ` [Qemu-devel] [PATCH v3 31/31] arm/translate-a64: add all single op FP16 to handle_fp_1src_half Alex Bennée
@ 2018-02-24 0:58 ` Richard Henderson
2018-02-24 7:59 ` no-reply
2018-02-24 12:36 ` no-reply
33 siblings, 0 replies; 46+ messages in thread
From: Richard Henderson @ 2018-02-24 0:58 UTC (permalink / raw)
To: Alex Bennée, qemu-arm; +Cc: qemu-devel
On 02/23/2018 07:36 AM, Alex Bennée wrote:
> Now that the softfloat re-factoring has been merged I re-based this
> directly from master. Alternatively you can grab the full tree from:
>
> https://github.com/stsquad/qemu/tree/arm-fp16-v3
>
> I've tested with the following RISU test binaries:
>
> http://people.linaro.org/~alex.bennee/testcases/arm64.risu/testcases.armv8.2_hp.tar.xz
>
> Which now includes insn_FP1SRC.risu.bin which tests the final patch in
> the series which wasn't being exercised by my previous set of tests.
>
> I've dropped the fp16 patch to both avoid the bikesheding but also
> because I could achieve the same effect by running RISU with:
>
> -cpu cortex-a57
>
> The changes are all relatively minor based on feedback. The details
> are as usual included in the commit messages bellow ---.
Unless I've missed something, that's the whole patch set reviewed.
r~
^ permalink raw reply [flat|nested] 46+ messages in thread* Re: [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (31 preceding siblings ...)
2018-02-24 0:58 ` [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Richard Henderson
@ 2018-02-24 7:59 ` no-reply
2018-02-24 12:36 ` no-reply
33 siblings, 0 replies; 46+ messages in thread
From: no-reply @ 2018-02-24 7:59 UTC (permalink / raw)
To: alex.bennee; +Cc: famz, qemu-arm, richard.henderson, qemu-devel
Hi,
This series failed build test on s390x host. Please find the details below.
Type: series
Message-id: 20180223153636.29809-1-alex.bennee@linaro.org
Subject: [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions
=== TEST SCRIPT BEGIN ===
#!/bin/bash
# Testing script will be invoked under the git checkout with
# HEAD pointing to a commit that has the patches applied on top of "base"
# branch
set -e
echo "=== ENV ==="
env
echo "=== PACKAGES ==="
rpm -qa
echo "=== TEST BEGIN ==="
CC=$HOME/bin/cc
INSTALL=$PWD/install
BUILD=$PWD/build
echo -n "Using CC: "
realpath $CC
mkdir -p $BUILD $INSTALL
SRC=$PWD
cd $BUILD
$SRC/configure --cc=$CC --prefix=$INSTALL
make -j4
# XXX: we need reliable clean up
# make check -j4 V=1
make install
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
973d6ea847 arm/translate-a64: add all single op FP16 to handle_fp_1src_half
865c5efee7 arm/translate-a64: implement simd_scalar_three_reg_same_fp16
fd1fec9d84 arm/translate-a64: add all FP16 ops in simd_scalar_pairwise
34a9ee1b72 arm/translate-a64: add FP16 FMOV to simd_mod_imm
e61c7193a5 arm/translate-a64: add FP16 FRSQRTE to simd_two_reg_misc_fp16
dbbbc15721 arm/helper.c: re-factor rsqrte and add rsqrte_f16
1f776415c0 arm/translate-a64: add FP16 FSQRT to simd_two_reg_misc_fp16
01a7993654 arm/translate-a64: add FP16 FRCPX to simd_two_reg_misc_fp16
3e2b3ca80f arm/translate-a64: add FP16 FRECPE
33514ae31f arm/helper.c: re-factor recpe and add recepe_f16
a1dfb85e0f arm/translate-a64: add FP16 FNEG/FABS to simd_two_reg_misc_fp16
92e3338b5a arm/translate-a64: add FP16 SCVTF/UCVFT to simd_two_reg_misc_fp16
5b86cb374f arm/translate-a64: add FP16 FCMxx (zero) to simd_two_reg_misc_fp16
17e2eee31c arm/translate-a64: add FCVTxx to simd_two_reg_misc_fp16
893c84283a arm/translate-a64: add FP16 FPRINTx to simd_two_reg_misc_fp16
c29baaf9c1 arm/translate-a64: initial decode for simd_two_reg_misc_fp16
714d9395cc arm/translate-a64: add FP16 x2 ops for simd_indexed
b026878d1c arm/translate-a64: add FP16 FMULX/MLS/FMLA to simd_indexed
ea0357c725 arm/translate-a64: add FP16 pairwise ops simd_three_reg_same_fp16
dfbe2602d6 arm/translate-a64: add FP16 FR[ECP/SQRT]S to simd_three_reg_same_fp16
c17489ca3b arm/translate-a64: add FP16 FMULA/X/S to simd_three_reg_same_fp16
e4fa306574 arm/translate-a64: add FP16 F[A]C[EQ/GE/GT] to simd_three_reg_same_fp16
688c5a1edc arm/translate-a64: add FP16 FADD/FABD/FSUB/FMUL/FDIV to simd_three_reg_same_fp16
3d44f35de5 arm/translate-a64: initial decode for simd_three_reg_same_fp16
db5773e357 arm/translate-a64: handle_3same_64 comment fix
2e96f5c4ee arm/translate-a64: implement half-precision F(MIN|MAX)(V|NMV)
278b916615 target/arm/helper: pass explicit fpst to set_rmode
4ef0855eb3 target/arm/cpu.h: add additional float_status flags
9360101ac7 target/arm/cpu.h: update comment for half-precision values
7a30500e92 target/arm/cpu64: introduce ARM_V8_FP16 feature bit
47fba618d4 include/exec/helper-head.h: support f16 in helper calls
=== OUTPUT BEGIN ===
=== ENV ===
LANG=en_US.UTF-8
XDG_SESSION_ID=70538
USER=fam
PWD=/var/tmp/patchew-tester-tmp-2foxcz3r/src
HOME=/home/fam
SHELL=/bin/sh
SHLVL=2
PATCHEW=/home/fam/patchew/patchew-cli -s http://patchew.org --nodebug
LOGNAME=fam
DBUS_SESSION_BUS_ADDRESS=unix:path=/run/user/1012/bus
XDG_RUNTIME_DIR=/run/user/1012
PATH=/usr/bin:/bin
_=/usr/bin/env
=== PACKAGES ===
gpg-pubkey-873529b8-54e386ff
glibc-debuginfo-common-2.24-10.fc25.s390x
fedora-release-26-1.noarch
dejavu-sans-mono-fonts-2.35-4.fc26.noarch
xemacs-filesystem-21.5.34-22.20170124hgf412e9f093d4.fc26.noarch
bash-4.4.12-7.fc26.s390x
freetype-2.7.1-9.fc26.s390x
libSM-1.2.2-5.fc26.s390x
libmpc-1.0.2-6.fc26.s390x
libaio-0.3.110-7.fc26.s390x
libverto-0.2.6-7.fc26.s390x
perl-Scalar-List-Utils-1.48-1.fc26.s390x
iptables-libs-1.6.1-2.fc26.s390x
perl-threads-shared-1.57-1.fc26.s390x
p11-kit-trust-0.23.9-2.fc26.s390x
tcl-8.6.6-2.fc26.s390x
libxshmfence-1.2-4.fc26.s390x
expect-5.45-23.fc26.s390x
perl-Thread-Queue-3.12-1.fc26.noarch
perl-encoding-2.19-6.fc26.s390x
keyutils-1.5.10-1.fc26.s390x
gmp-devel-6.1.2-4.fc26.s390x
enchant-1.6.0-16.fc26.s390x
net-snmp-libs-5.7.3-17.fc26.s390x
python-gobject-base-3.24.1-1.fc26.s390x
python3-distro-1.0.3-1.fc26.noarch
python3-enchant-1.6.10-1.fc26.noarch
python-lockfile-0.11.0-6.fc26.noarch
python2-pyparsing-2.1.10-3.fc26.noarch
python2-lxml-4.1.1-1.fc26.s390x
librados2-10.2.7-2.fc26.s390x
trousers-lib-0.3.13-7.fc26.s390x
libpaper-1.1.24-14.fc26.s390x
libdatrie-0.2.9-4.fc26.s390x
libsoup-2.58.2-1.fc26.s390x
passwd-0.79-9.fc26.s390x
bind99-libs-9.9.10-3.P3.fc26.s390x
python3-rpm-4.13.0.2-1.fc26.s390x
mock-core-configs-27.4-1.fc26.noarch
systemd-233-7.fc26.s390x
virglrenderer-0.6.0-1.20170210git76b3da97b.fc26.s390x
s390utils-ziomon-1.36.1-3.fc26.s390x
s390utils-osasnmpd-1.36.1-3.fc26.s390x
libXrandr-1.5.1-2.fc26.s390x
libglvnd-glx-1.0.0-1.fc26.s390x
texlive-ifxetex-svn19685.0.5-33.fc26.2.noarch
texlive-psnfss-svn33946.9.2a-33.fc26.2.noarch
texlive-dvipdfmx-def-svn40328-33.fc26.2.noarch
texlive-natbib-svn20668.8.31b-33.fc26.2.noarch
texlive-xdvi-bin-svn40750-33.20160520.fc26.2.s390x
texlive-cm-svn32865.0-33.fc26.2.noarch
texlive-beton-svn15878.0-33.fc26.2.noarch
texlive-fpl-svn15878.1.002-33.fc26.2.noarch
texlive-mflogo-svn38628-33.fc26.2.noarch
texlive-texlive-docindex-svn41430-33.fc26.2.noarch
texlive-luaotfload-bin-svn34647.0-33.20160520.fc26.2.noarch
texlive-koma-script-svn41508-33.fc26.2.noarch
texlive-pst-tree-svn24142.1.12-33.fc26.2.noarch
texlive-breqn-svn38099.0.98d-33.fc26.2.noarch
texlive-xetex-svn41438-33.fc26.2.noarch
gstreamer1-plugins-bad-free-1.12.3-1.fc26.s390x
xorg-x11-font-utils-7.5-33.fc26.s390x
ghostscript-fonts-5.50-36.fc26.noarch
libXext-devel-1.3.3-5.fc26.s390x
libusbx-devel-1.0.21-2.fc26.s390x
libglvnd-devel-1.0.0-1.fc26.s390x
emacs-25.3-3.fc26.s390x
alsa-lib-devel-1.1.4.1-1.fc26.s390x
kbd-2.0.4-2.fc26.s390x
dconf-0.26.0-2.fc26.s390x
ccache-3.3.4-1.fc26.s390x
glibc-static-2.25-12.fc26.s390x
mc-4.8.19-5.fc26.s390x
doxygen-1.8.13-9.fc26.s390x
dpkg-1.18.24-1.fc26.s390x
libtdb-1.3.13-1.fc26.s390x
python2-pynacl-1.1.1-1.fc26.s390x
nss-sysinit-3.34.0-1.0.fc26.s390x
kernel-4.13.16-202.fc26.s390x
perl-Filter-1.58-1.fc26.s390x
python2-pip-9.0.1-11.fc26.noarch
dnf-2.7.5-2.fc26.noarch
pcre2-utf16-10.23-11.fc26.s390x
glusterfs-devel-3.10.8-1.fc26.s390x
sssd-common-1.16.0-4.fc26.s390x
python2-sssdconfig-1.16.0-4.fc26.noarch
acpica-tools-20171110-1.fc26.s390x
glibc-debuginfo-2.24-10.fc25.s390x
fedora-repos-26-1.noarch
dejavu-fonts-common-2.35-4.fc26.noarch
bind99-license-9.9.10-3.P3.fc26.noarch
ncurses-libs-6.0-8.20170212.fc26.s390x
libpng-1.6.28-2.fc26.s390x
libICE-1.0.9-9.fc26.s390x
kmod-24-1.fc26.s390x
libseccomp-2.3.2-1.fc26.s390x
perl-Text-ParseWords-3.30-366.fc26.noarch
libtool-ltdl-2.4.6-17.fc26.s390x
perl-threads-2.16-1.fc26.s390x
libselinux-utils-2.6-7.fc26.s390x
userspace-rcu-0.9.3-2.fc26.s390x
libXfont-1.5.2-5.fc26.s390x
perl-Class-Inspector-1.31-3.fc26.noarch
perl-open-1.10-395.fc26.noarch
keyutils-libs-devel-1.5.10-1.fc26.s390x
isl-0.16.1-1.fc26.s390x
libsecret-0.18.5-3.fc26.s390x
compat-openssl10-1.0.2m-1.fc26.s390x
python3-iniparse-0.4-24.fc26.noarch
python3-dateutil-2.6.0-3.fc26.noarch
python3-firewall-0.4.4.5-1.fc26.noarch
python-enum34-1.1.6-1.fc26.noarch
python2-pygments-2.2.0-7.fc26.noarch
python2-dockerfile-parse-0.0.7-1.fc26.noarch
perl-Net-SSLeay-1.81-1.fc26.s390x
hostname-3.18-2.fc26.s390x
libtirpc-1.0.2-0.fc26.s390x
rpm-build-libs-4.13.0.2-1.fc26.s390x
libutempter-1.1.6-9.fc26.s390x
systemd-pam-233-7.fc26.s390x
pcre-utf16-8.41-3.fc26.s390x
libXinerama-1.1.3-7.fc26.s390x
mesa-libGL-17.2.4-2.fc26.s390x
texlive-amsfonts-svn29208.3.04-33.fc26.2.noarch
texlive-caption-svn41409-33.fc26.2.noarch
texlive-enumitem-svn24146.3.5.2-33.fc26.2.noarch
texlive-pdftex-def-svn22653.0.06d-33.fc26.2.noarch
texlive-xdvi-svn40768-33.fc26.2.noarch
texlive-courier-svn35058.0-33.fc26.2.noarch
texlive-charter-svn15878.0-33.fc26.2.noarch
texlive-graphics-def-svn41879-33.fc26.2.noarch
texlive-mfnfss-svn19410.0-33.fc26.2.noarch
texlive-texlive-en-svn41185-33.fc26.2.noarch
texlive-ifplatform-svn21156.0.4-33.fc26.2.noarch
texlive-ms-svn29849.0-33.fc26.2.noarch
texlive-pst-tools-svn34067.0.05-33.fc26.2.noarch
texlive-powerdot-svn38984-33.fc26.2.noarch
texlive-xetexconfig-svn41133-33.fc26.2.noarch
libvdpau-1.1.1-4.fc26.s390x
zlib-devel-1.2.11-2.fc26.s390x
gdk-pixbuf2-devel-2.36.9-1.fc26.s390x
libX11-devel-1.6.5-2.fc26.s390x
libtasn1-devel-4.12-1.fc26.s390x
libglvnd-core-devel-1.0.0-1.fc26.s390x
SDL2-devel-2.0.7-2.fc26.s390x
webkitgtk3-2.4.11-5.fc26.s390x
grubby-8.40-4.fc26.s390x
uboot-tools-2017.05-4.fc26.s390x
cracklib-dicts-2.9.6-5.fc26.s390x
texinfo-6.3-3.fc26.s390x
time-1.7-52.fc26.s390x
python2-deltarpm-3.6-19.fc26.s390x
nss-3.34.0-1.0.fc26.s390x
webkitgtk4-2.18.3-1.fc26.s390x
net-tools-2.0-0.43.20160912git.fc26.s390x
python2-setuptools-37.0.0-1.fc26.noarch
python2-dnf-2.7.5-2.fc26.noarch
pcre2-10.23-11.fc26.s390x
groff-base-1.22.3-10.fc26.s390x
python2-devel-2.7.14-4.fc26.s390x
python2-GitPython-2.1.7-2.fc26.noarch
boost-iostreams-1.63.0-10.fc26.s390x
gpg-pubkey-efe550f5-5220ba41
gpg-pubkey-81b46521-55b3ca9a
filesystem-3.2-40.fc26.s390x
basesystem-11-3.fc26.noarch
js-jquery-3.2.1-1.fc26.noarch
pcre-8.41-3.fc26.s390x
elfutils-libelf-0.169-1.fc26.s390x
libidn-1.33-2.fc26.s390x
libogg-1.3.2-6.fc26.s390x
slang-2.3.1a-2.fc26.s390x
apr-1.6.3-1.fc26.s390x
libxkbcommon-0.7.1-3.fc26.s390x
perl-IO-1.36-395.fc26.s390x
libvorbis-1.3.5-2.fc26.s390x
less-487-3.fc26.s390x
lttng-ust-2.9.0-2.fc26.s390x
OpenEXR-libs-2.2.0-6.fc26.s390x
ipset-libs-6.29-3.fc26.s390x
perl-XML-XPath-1.42-1.fc26.noarch
lua-filesystem-1.6.3-3.fc24.s390x
sqlite-3.20.1-1.fc26.s390x
gstreamer1-1.12.3-1.fc26.s390x
libpwquality-1.3.0-8.fc26.s390x
gettext-libs-0.19.8.1-9.fc26.s390x
python3-chardet-2.3.0-3.fc26.noarch
python3-slip-dbus-0.6.4-6.fc26.noarch
python-chardet-2.3.0-3.fc26.noarch
python2-pyasn1-0.2.3-1.fc26.noarch
python-slip-dbus-0.6.4-6.fc26.noarch
libarchive-3.2.2-4.fc26.s390x
libbabeltrace-1.5.2-2.fc26.s390x
cdparanoia-libs-10.2-22.fc26.s390x
krb5-workstation-1.15.2-4.fc26.s390x
python3-requests-kerberos-0.10.0-4.fc26.noarch
gpgme-1.8.0-12.fc26.s390x
python2-gpg-1.8.0-12.fc26.s390x
shadow-utils-4.3.1-3.fc26.s390x
cryptsetup-libs-1.7.5-1.fc26.s390x
kpartx-0.4.9-88.fc26.s390x
net-snmp-agent-libs-5.7.3-17.fc26.s390x
libXi-1.7.9-2.fc26.s390x
texlive-tetex-svn41059-33.fc26.2.noarch
texlive-tools-svn40934-33.fc26.2.noarch
texlive-bibtex-bin-svn40473-33.20160520.fc26.2.s390x
texlive-mfware-bin-svn40473-33.20160520.fc26.2.s390x
texlive-underscore-svn18261.0-33.fc26.2.noarch
texlive-avantgar-svn31835.0-33.fc26.2.noarch
texlive-anysize-svn15878.0-33.fc26.2.noarch
texlive-lineno-svn21442.4.41-33.fc26.2.noarch
texlive-mathpazo-svn15878.1.003-33.fc26.2.noarch
texlive-soul-svn15878.2.4-33.fc26.2.noarch
texlive-luatexbase-svn38550-33.fc26.2.noarch
texlive-listings-svn37534.1.6-33.fc26.2.noarch
texlive-pstricks-svn41321-33.fc26.2.noarch
texlive-metalogo-svn18611.0.12-33.fc26.2.noarch
texlive-dvipdfmx-svn41149-33.fc26.2.noarch
kbd-legacy-2.0.4-2.fc26.noarch
nspr-devel-4.17.0-1.fc26.s390x
ghostscript-x11-9.20-10.fc26.s390x
libXrender-devel-0.9.10-2.fc26.s390x
libxkbcommon-devel-0.7.1-3.fc26.s390x
mesa-libGL-devel-17.2.4-2.fc26.s390x
sqlite-devel-3.20.1-1.fc26.s390x
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libbsd-0.8.3-3.fc26.s390x
c-ares-1.13.0-1.fc26.s390x
python2-pyxdg-0.25-12.fc26.noarch
nss-softokn-freebl-devel-3.34.0-1.0.fc26.s390x
python2-rpkg-1.51-2.fc26.noarch
strace-4.20-1.fc26.s390x
valgrind-3.13.0-12.fc26.s390x
libsss_idmap-1.16.0-4.fc26.s390x
gnutls-c++-3.5.16-4.fc26.s390x
libwayland-server-1.13.0-3.fc26.s390x
dhcp-client-4.3.5-10.fc26.s390x
bind-libs-9.11.1-4.P3.fc26.s390x
man-pages-4.09-4.fc26.noarch
gpg-pubkey-a29cb19c-53bcbba6
quota-nls-4.03-9.fc26.noarch
qt5-srpm-macros-5.8.0-2.fc26.noarch
xz-libs-5.2.3-2.fc26.s390x
gmp-6.1.2-4.fc26.s390x
audit-libs-2.8.1-1.fc26.s390x
file-5.30-11.fc26.s390x
libusbx-1.0.21-2.fc26.s390x
binutils-2.27-28.fc26.s390x
perl-Errno-1.25-395.fc26.s390x
perl-HTTP-Tiny-0.070-2.fc26.noarch
xml-common-0.6.3-45.fc26.noarch
opus-1.2.1-1.fc26.s390x
kernel-devel-4.13.13-200.fc26.s390x
perl-podlators-4.09-2.fc26.noarch
flac-libs-1.3.2-2.fc26.s390x
libacl-devel-2.2.52-15.fc26.s390x
coreutils-common-8.27-7.fc26.s390x
cracklib-2.9.6-5.fc26.s390x
pyliblzma-0.5.3-17.fc26.s390x
libnotify-0.7.7-2.fc26.s390x
python3-idna-2.5-1.fc26.noarch
python3-pyOpenSSL-16.2.0-6.fc26.noarch
python2-pbr-1.10.0-4.fc26.noarch
pyusb-1.0.0-4.fc26.noarch
python2-fedora-0.9.0-6.fc26.noarch
librbd1-10.2.7-2.fc26.s390x
pcre-cpp-8.41-3.fc26.s390x
glibc-devel-2.25-12.fc26.s390x
libnfs-1.9.8-3.fc26.s390x
libsolv-0.6.30-2.fc26.s390x
python3-pycurl-7.43.0-8.fc26.s390x
libyubikey-1.13-3.fc26.s390x
rpmlint-1.10-5.fc26.noarch
python2-pygpgme-0.3-22.fc26.s390x
s390utils-base-1.36.1-3.fc26.s390x
ppp-2.4.7-11.fc26.s390x
s390utils-cpuplugd-1.36.1-3.fc26.s390x
nfs-utils-2.1.1-6.rc6.fc26.s390x
libXrender-0.9.10-2.fc26.s390x
libglvnd-gles-1.0.0-1.fc26.s390x
texlive-texlive.infra-svn41280-33.fc26.2.noarch
texlive-lm-svn28119.2.004-33.fc26.2.noarch
texlive-babelbib-svn25245.1.31-33.fc26.2.noarch
texlive-index-svn24099.4.1beta-33.fc26.2.noarch
texlive-pdftex-bin-svn40987-33.20160520.fc26.2.s390x
texlive-csquotes-svn39538-33.fc26.2.noarch
texlive-rsfs-svn15878.0-33.fc26.2.noarch
texlive-etex-svn37057.0-33.fc26.2.noarch
texlive-knuth-lib-svn35820.0-33.fc26.2.noarch
texlive-pst-math-svn34786.0.63-33.fc26.2.noarch
texlive-utopia-svn15878.0-33.fc26.2.noarch
texlive-eso-pic-svn37925.2.0g-33.fc26.2.noarch
texlive-pst-fill-svn15878.1.01-33.fc26.2.noarch
texlive-latex-bin-bin-svn14050.0-33.20160520.fc26.2.noarch
texlive-jknapltx-svn19440.0-33.fc26.2.noarch
texlive-collection-latexrecommended-svn35765.0-33.20160520.fc26.2.noarch
adwaita-cursor-theme-3.24.0-2.fc26.noarch
xorg-x11-fonts-ISO8859-1-100dpi-7.5-17.fc26.noarch
libXcomposite-devel-0.4.4-9.fc26.s390x
at-spi2-core-devel-2.24.1-1.fc26.s390x
harfbuzz-devel-1.4.4-1.fc26.s390x
rpmdevtools-8.10-2.fc26.noarch
texi2html-5.0-5.fc26.noarch
libnfs-devel-1.9.8-3.fc26.s390x
firewalld-0.4.4.5-1.fc26.noarch
wpa_supplicant-2.6-12.fc26.s390x
systemtap-sdt-devel-3.2-2.fc26.s390x
newt-python-0.52.20-1.fc26.s390x
perl-Mozilla-CA-20160104-4.fc26.noarch
pth-2.0.7-28.fc26.s390x
python3-pyxdg-0.25-12.fc26.noarch
nss-softokn-devel-3.34.0-1.0.fc26.s390x
fedpkg-1.30-4.fc26.noarch
timedatex-0.4-3.fc26.s390x
libjpeg-turbo-1.5.3-1.fc26.s390x
glusterfs-cli-3.10.8-1.fc26.s390x
libsss_nss_idmap-1.16.0-4.fc26.s390x
gdb-8.0.1-33.fc26.s390x
dnf-yum-2.7.5-2.fc26.noarch
perl-Data-Dumper-2.161-3.fc26.s390x
python-async-0.6.1-9.fc22.s390x
poppler-data-0.4.7-7.fc26.noarch
ocaml-srpm-macros-4-2.fc26.noarch
libuuid-2.30.2-1.fc26.s390x
libgpg-error-1.25-2.fc26.s390x
libassuan-2.4.3-2.fc26.s390x
graphite2-1.3.10-1.fc26.s390x
perl-Text-Tabs+Wrap-2013.0523-366.fc26.noarch
perl-Error-0.17024-8.fc26.noarch
which-2.21-2.fc26.s390x
libXau-1.0.8-7.fc26.s390x
orc-0.4.27-1.fc26.s390x
perl-Pod-Perldoc-3.28-1.fc26.noarch
libsndfile-1.0.28-6.fc26.s390x
patch-2.7.5-4.fc26.s390x
gzip-1.8-2.fc26.s390x
python-ipaddress-1.0.16-4.fc26.noarch
yum-metadata-parser-1.1.4-18.fc26.s390x
python3-dbus-1.2.4-6.fc26.s390x
python3-cryptography-2.0.2-2.fc26.s390x
python3-kickstart-2.35-2.fc26.noarch
python2-imagesize-0.7.1-5.fc26.noarch
python2-jinja2-2.9.6-1.fc26.noarch
libradosstriper-devel-10.2.7-2.fc26.s390x
soundtouch-1.9.2-4.fc26.s390x
glibc-headers-2.25-12.fc26.s390x
libndp-1.6-2.fc26.s390x
rpm-4.13.0.2-1.fc26.s390x
rest-0.8.0-2.fc26.s390x
libvisual-0.4.0-21.fc26.s390x
python2-hawkey-0.11.1-1.fc26.s390x
dnf-plugins-core-2.1.5-1.fc26.noarch
fakeroot-libs-1.22-1.fc26.s390x
device-mapper-event-libs-1.02.137-6.fc26.s390x
cyrus-sasl-2.1.26-32.fc26.s390x
kernel-modules-4.13.13-200.fc26.s390x
cronie-anacron-1.5.1-5.fc26.s390x
libpath_utils-0.2.1-34.fc26.s390x
libX11-common-1.6.5-2.fc26.noarch
libXft-2.3.2-5.fc26.s390x
gtk2-2.24.31-4.fc26.s390x
texlive-etoolbox-svn38031.2.2a-33.fc26.2.noarch
texlive-multido-svn18302.1.42-33.fc26.2.noarch
texlive-glyphlist-svn28576.0-33.fc26.2.noarch
texlive-setspace-svn24881.6.7a-33.fc26.2.noarch
texlive-mathtools-svn38833-33.fc26.2.noarch
texlive-ncntrsbk-svn31835.0-33.fc26.2.noarch
texlive-dvisvgm-def-svn41011-33.fc26.2.noarch
texlive-ifetex-svn24853.1.2-33.fc26.2.noarch
texlive-parskip-svn19963.2.0-33.fc26.2.noarch
texlive-bera-svn20031.0-33.fc26.2.noarch
texlive-pgf-svn40966-33.fc26.2.noarch
texlive-auto-pst-pdf-svn23723.0.6-33.fc26.2.noarch
texlive-ctable-svn38672-33.fc26.2.noarch
texlive-typehtml-svn17134.0-33.fc26.2.noarch
mesa-libGLES-17.2.4-2.fc26.s390x
vte291-0.48.4-1.fc26.s390x
libdrm-devel-2.4.88-1.fc26.s390x
libcephfs_jni1-10.2.7-2.fc26.s390x
bzip2-devel-1.0.6-22.fc26.s390x
expat-devel-2.2.4-1.fc26.s390x
libsepol-devel-2.6-2.fc26.s390x
glib2-static-2.52.3-2.fc26.s390x
virglrenderer-devel-0.6.0-1.20170210git76b3da97b.fc26.s390x
yum-utils-1.1.31-512.fc26.noarch
parted-3.2-24.fc26.s390x
python3-beautifulsoup4-4.6.0-1.fc26.noarch
python-bunch-1.0.1-10.fc26.noarch
perl-Time-HiRes-1.9746-1.fc26.s390x
lz4-1.8.0-1.fc26.s390x
nss-util-3.34.0-1.0.fc26.s390x
openssh-clients-7.5p1-4.fc26.s390x
chrony-3.2-1.fc26.s390x
dnf-conf-2.7.5-2.fc26.noarch
glusterfs-server-3.10.8-1.fc26.s390x
sssd-client-1.16.0-4.fc26.s390x
man-db-2.7.6.1-8.fc26.s390x
bodhi-client-2.12.2-3.fc26.noarch
perl-Module-CoreList-5.20171120-1.fc26.noarch
hawkey-0.6.4-3.fc25.s390x
python-srpm-macros-3-20.fc26.noarch
perl-srpm-macros-1-21.fc26.noarch
expat-2.2.4-1.fc26.s390x
chkconfig-1.10-1.fc26.s390x
findutils-4.6.0-12.fc26.s390x
mesa-libwayland-egl-17.2.4-2.fc26.s390x
procps-ng-3.3.10-13.fc26.s390x
mesa-libglapi-17.2.4-2.fc26.s390x
perl-Unicode-Normalize-1.25-366.fc26.s390x
perl-IO-Socket-IP-0.39-1.fc26.noarch
hunspell-en-US-0.20140811.1-6.fc26.noarch
libxcb-1.12-3.fc26.s390x
libgo-devel-7.2.1-2.fc26.s390x
perl-Pod-Escapes-1.07-366.fc26.noarch
perl-Pod-Usage-1.69-2.fc26.noarch
libtheora-1.1.1-15.fc26.s390x
tcp_wrappers-7.6-85.fc26.s390x
coreutils-8.27-7.fc26.s390x
libmount-2.30.2-1.fc26.s390x
python2-iniparse-0.4-24.fc26.noarch
python2-decorator-4.0.11-2.fc26.noarch
ModemManager-glib-1.6.10-1.fc26.s390x
python3-decorator-4.0.11-2.fc26.noarch
python3-cffi-1.9.1-2.fc26.s390x
python-bugzilla-cli-2.1.0-1.fc26.noarch
python2-funcsigs-1.0.2-5.fc26.noarch
python2-babel-2.3.4-5.fc26.noarch
python-bugzilla-2.1.0-1.fc26.noarch
libradosstriper1-10.2.7-2.fc26.s390x
snappy-1.1.4-3.fc26.s390x
dtc-1.4.5-1.fc26.s390x
libmpcdec-1.2.6-17.fc26.s390x
rpm-libs-4.13.0.2-1.fc26.s390x
python-urlgrabber-3.10.1-11.fc26.noarch
sysfsutils-2.1.0-20.fc26.s390x
python3-hawkey-0.11.1-1.fc26.s390x
python3-dnf-plugins-core-2.1.5-1.fc26.noarch
ethtool-4.13-1.fc26.s390x
iputils-20161105-5.fc26.s390x
plymouth-scripts-0.9.3-0.7.20160620git0e65b86c.fc26.s390x
cronie-1.5.1-5.fc26.s390x
libini_config-1.3.1-34.fc26.s390x
libX11-1.6.5-2.fc26.s390x
libglvnd-egl-1.0.0-1.fc26.s390x
texlive-kpathsea-svn41139-33.fc26.2.noarch
texlive-thumbpdf-bin-svn6898.0-33.20160520.fc26.2.noarch
texlive-subfig-svn15878.1.3-33.fc26.2.noarch
texlive-gsftopk-bin-svn40473-33.20160520.fc26.2.s390x
texlive-tex-ini-files-svn40533-33.fc26.2.noarch
texlive-qstest-svn15878.0-33.fc26.2.noarch
texlive-palatino-svn31835.0-33.fc26.2.noarch
texlive-ec-svn25033.1.0-33.fc26.2.noarch
texlive-iftex-svn29654.0.2-33.fc26.2.noarch
texlive-pslatex-svn16416.0-33.fc26.2.noarch
texlive-algorithms-svn38085.0.1-33.fc26.2.noarch
texlive-filehook-svn24280.0.5d-33.fc26.2.noarch
texlive-pst-node-svn40743-33.fc26.2.noarch
texlive-rotating-svn16832.2.16b-33.fc26.2.noarch
texlive-seminar-svn34011.1.62-33.fc26.2.noarch
gtk3-3.22.21-2.fc26.s390x
libuuid-devel-2.30.2-1.fc26.s390x
java-1.8.0-openjdk-1.8.0.151-1.b12.fc26.s390x
libXinerama-devel-1.1.3-7.fc26.s390x
emacs-common-25.3-3.fc26.s390x
gtk3-devel-3.22.21-2.fc26.s390x
fedora-packager-0.6.0.1-2.fc26.noarch
libxml2-devel-2.9.4-2.fc26.s390x
snappy-devel-1.1.4-3.fc26.s390x
python2-dnf-plugin-migrate-2.1.5-1.fc26.noarch
authconfig-7.0.1-2.fc26.s390x
newt-python3-0.52.20-1.fc26.s390x
python-decoratortools-1.8-13.fc26.noarch
python-systemd-doc-234-1.fc26.s390x
openssl-libs-1.1.0g-1.fc26.s390x
git-core-2.13.6-2.fc26.s390x
python3-dnf-plugin-system-upgrade-2.0.4-1.fc26.noarch
glusterfs-libs-3.10.8-1.fc26.s390x
ca-certificates-2017.2.20-1.0.fc26.noarch
unbound-libs-1.6.7-1.fc26.s390x
libsss_certmap-1.16.0-4.fc26.s390x
glusterfs-api-devel-3.10.8-1.fc26.s390x
selinux-policy-targeted-3.13.1-260.17.fc26.noarch
publicsuffix-list-dafsa-20171028-1.fc26.noarch
gpg-pubkey-a0a7badb-52844296
gpg-pubkey-e372e838-56fd7943
gpg-pubkey-3b921d09-57a87096
google-roboto-slab-fonts-1.100263-0.5.20150923git.fc26.noarch
libreport-filesystem-2.9.1-3.fc26.s390x
glibc-all-langpacks-2.25-12.fc26.s390x
libcom_err-1.43.4-2.fc26.s390x
libffi-3.1-12.fc26.s390x
keyutils-libs-1.5.10-1.fc26.s390x
diffutils-3.5-3.fc26.s390x
apr-util-1.5.4-6.fc26.s390x
bluez-libs-5.46-6.fc26.s390x
libksba-1.3.5-3.fc26.s390x
ncurses-6.0-8.20170212.fc26.s390x
gsm-1.0.17-1.fc26.s390x
libteam-1.27-1.fc26.s390x
perl-Fedora-VSP-0.001-5.fc26.noarch
libusb-0.1.5-8.fc26.s390x
acl-2.2.52-15.fc26.s390x
dwz-0.12-3.fc26.s390x
libblkid-2.30.2-1.fc26.s390x
polkit-libs-0.113-8.fc26.s390x
dbus-python-1.2.4-6.fc26.s390x
gts-0.7.6-30.20121130.fc26.s390x
libfdisk-2.30.2-1.fc26.s390x
python3-pycparser-2.14-10.fc26.noarch
python3-bugzilla-2.1.0-1.fc26.noarch
python2-docutils-0.13.1-4.fc26.noarch
pytz-2016.10-4.fc26.noarch
python2-requests-2.13.0-1.fc26.noarch
libcephfs-devel-10.2.7-2.fc26.s390x
ncurses-c++-libs-6.0-8.20170212.fc26.s390x
GeoIP-1.6.11-1.fc26.s390x
liblockfile-1.09-5.fc26.s390x
rpm-plugin-selinux-4.13.0.2-1.fc26.s390x
systemtap-devel-3.2-2.fc26.s390x
libsysfs-2.1.0-20.fc26.s390x
libdnf-0.11.1-1.fc26.s390x
libgfortran-7.2.1-2.fc26.s390x
mesa-libgbm-17.2.4-2.fc26.s390x
dracut-046-3.1.fc26.s390x
lvm2-libs-2.02.168-6.fc26.s390x
libXfixes-5.0.3-2.fc26.s390x
brlapi-0.6.6-5.fc26.s390x
texlive-metafont-svn40793-33.fc26.2.noarch
texlive-graphics-cfg-svn40269-33.fc26.2.noarch
texlive-mptopdf-svn41282-33.fc26.2.noarch
texlive-makeindex-bin-svn40473-33.20160520.fc26.2.s390x
texlive-texlive-scripts-bin-svn29741.0-33.20160520.fc26.2.noarch
texlive-sauerj-svn15878.0-33.fc26.2.noarch
texlive-txfonts-svn15878.0-33.fc26.2.noarch
texlive-filecontents-svn24250.1.3-33.fc26.2.noarch
texlive-lualibs-svn40370-33.fc26.2.noarch
texlive-section-svn20180.0-33.fc26.2.noarch
texlive-ucharcat-svn38907-33.fc26.2.noarch
texlive-hyperref-svn41396-33.fc26.2.noarch
texlive-pst-3d-svn17257.1.10-33.fc26.2.noarch
texlive-oberdiek-svn41346-33.fc26.2.noarch
texlive-ae-svn15878.1.4-33.fc26.2.noarch
texlive-collection-basic-svn41149-33.20160520.fc26.2.noarch
gnat-srpm-macros-4-2.fc26.noarch
glib2-devel-2.52.3-2.fc26.s390x
netpbm-progs-10.80.00-2.fc26.s390x
libXxf86vm-devel-1.1.4-4.fc26.s390x
nettle-devel-3.3-2.fc26.s390x
cairo-gobject-devel-1.14.10-1.fc26.s390x
fedora-rpm-macros-26-2.fc26.noarch
elfutils-devel-0.169-1.fc26.s390x
libidn-devel-1.33-2.fc26.s390x
s390utils-1.36.1-3.fc26.s390x
gcc-gfortran-7.2.1-2.fc26.s390x
libtool-2.4.6-17.fc26.s390x
python3-cssselect-0.9.2-4.fc26.noarch
python2-cssselect-0.9.2-4.fc26.noarch
bison-3.0.4-6.fc26.s390x
rootfiles-8.1-20.fc26.noarch
git-core-doc-2.13.6-2.fc26.s390x
vim-enhanced-8.0.1360-1.fc26.s390x
glusterfs-3.10.8-1.fc26.s390x
boost-system-1.63.0-10.fc26.s390x
gnutls-dane-3.5.16-4.fc26.s390x
pkgconf-m4-1.3.12-1.fc26.noarch
libcurl-devel-7.53.1-13.fc26.s390x
python3-urllib3-1.20-2.fc26.noarch
libsss_autofs-1.16.0-4.fc26.s390x
=== TEST BEGIN ===
Using CC: /home/fam/bin/cc
Install prefix /var/tmp/patchew-tester-tmp-2foxcz3r/src/install
BIOS directory /var/tmp/patchew-tester-tmp-2foxcz3r/src/install/share/qemu
firmware path /var/tmp/patchew-tester-tmp-2foxcz3r/src/install/share/qemu-firmware
binary directory /var/tmp/patchew-tester-tmp-2foxcz3r/src/install/bin
library directory /var/tmp/patchew-tester-tmp-2foxcz3r/src/install/lib
module directory /var/tmp/patchew-tester-tmp-2foxcz3r/src/install/lib/qemu
libexec directory /var/tmp/patchew-tester-tmp-2foxcz3r/src/install/libexec
include directory /var/tmp/patchew-tester-tmp-2foxcz3r/src/install/include
config directory /var/tmp/patchew-tester-tmp-2foxcz3r/src/install/etc
local state directory /var/tmp/patchew-tester-tmp-2foxcz3r/src/install/var
Manual directory /var/tmp/patchew-tester-tmp-2foxcz3r/src/install/share/man
ELF interp prefix /usr/gnemul/qemu-%M
Source path /var/tmp/patchew-tester-tmp-2foxcz3r/src
GIT binary git
GIT submodules ui/keycodemapdb capstone
C compiler /home/fam/bin/cc
Host C compiler cc
C++ compiler c++
Objective-C compiler /home/fam/bin/cc
ARFLAGS rv
CFLAGS -O2 -U_FORTIFY_SOURCE -D_FORTIFY_SOURCE=2 -g
QEMU_CFLAGS -I/usr/include/pixman-1 -Werror -DHAS_LIBSSH2_SFTP_FSYNC -pthread -I/usr/include/glib-2.0 -I/usr/lib64/glib-2.0/include -DNCURSES_WIDECHAR -D_GNU_SOURCE -D_DEFAULT_SOURCE -m64 -D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE -Wstrict-prototypes -Wredundant-decls -Wall -Wundef -Wwrite-strings -Wmissing-prototypes -fno-strict-aliasing -fno-common -fwrapv -Wexpansion-to-defined -Wendif-labels -Wno-shift-negative-value -Wno-missing-include-dirs -Wempty-body -Wnested-externs -Wformat-security -Wformat-y2k -Winit-self -Wignored-qualifiers -Wold-style-declaration -Wold-style-definition -Wtype-limits -fstack-protector-strong -I/usr/include/p11-kit-1 -I/usr/include/libpng16 -I/usr/include/libdrm -I$(SRC_PATH)/capstone/include
LDFLAGS -Wl,--warn-common -m64 -g
make make
install install
python python -B
smbd /usr/sbin/smbd
module support no
host CPU s390x
host big endian yes
target list aarch64-softmmu alpha-softmmu arm-softmmu cris-softmmu hppa-softmmu i386-softmmu lm32-softmmu m68k-softmmu microblazeel-softmmu microblaze-softmmu mips64el-softmmu mips64-softmmu mipsel-softmmu mips-softmmu moxie-softmmu nios2-softmmu or1k-softmmu ppc64-softmmu ppcemb-softmmu ppc-softmmu s390x-softmmu sh4eb-softmmu sh4-softmmu sparc64-softmmu sparc-softmmu tricore-softmmu unicore32-softmmu x86_64-softmmu xtensaeb-softmmu xtensa-softmmu aarch64_be-linux-user aarch64-linux-user alpha-linux-user armeb-linux-user arm-linux-user cris-linux-user hppa-linux-user i386-linux-user m68k-linux-user microblazeel-linux-user microblaze-linux-user mips64el-linux-user mips64-linux-user mipsel-linux-user mips-linux-user mipsn32el-linux-user mipsn32-linux-user nios2-linux-user or1k-linux-user ppc64abi32-linux-user ppc64le-linux-user ppc64-linux-user ppc-linux-user s390x-linux-user sh4eb-linux-user sh4-linux-user sparc32plus-linux-user sparc64-linux-user sparc-linux-user tilegx-linux-user x86_64-linux-user
gprof enabled no
sparse enabled no
strip binaries yes
profiler no
static build no
SDL support yes (2.0.7)
GTK support yes (3.22.21)
GTK GL support yes
VTE support yes (0.48.4)
TLS priority NORMAL
GNUTLS support yes
GNUTLS rnd yes
libgcrypt no
libgcrypt kdf no
nettle yes (3.3)
nettle kdf yes
libtasn1 yes
curses support yes
virgl support yes
curl support yes
mingw32 support no
Audio drivers oss
Block whitelist (rw)
Block whitelist (ro)
VirtFS support yes
Multipath support no
VNC support yes
VNC SASL support yes
VNC JPEG support yes
VNC PNG support yes
xen support no
brlapi support yes
bluez support yes
Documentation yes
PIE no
vde support no
netmap support no
Linux AIO support yes
ATTR/XATTR support yes
Install blobs yes
KVM support yes
HAX support no
HVF support no
WHPX support no
TCG support yes
TCG debug enabled no
TCG interpreter no
malloc trim support yes
RDMA support no
fdt support yes
preadv support yes
fdatasync yes
madvise yes
posix_madvise yes
posix_memalign yes
libcap-ng support yes
vhost-net support yes
vhost-scsi support yes
vhost-vsock support yes
vhost-user support yes
Trace backends log
spice support no
rbd support yes
xfsctl support no
smartcard support yes
libusb yes
usb net redir yes
OpenGL support yes
OpenGL dmabufs yes
libiscsi support yes
libnfs support yes
build guest agent yes
QGA VSS support no
QGA w32 disk info no
QGA MSI support no
seccomp support yes
coroutine backend ucontext
coroutine pool yes
debug stack usage no
crypto afalg no
GlusterFS support yes
gcov gcov
gcov enabled no
TPM support yes
libssh2 support yes
TPM passthrough no
TPM emulator yes
QOM debugging yes
Live block migration yes
lzo support yes
snappy support yes
bzip2 support yes
NUMA host support no
libxml2 yes
tcmalloc support no
jemalloc support no
avx2 optimization no
replication support yes
VxHS block device no
capstone git
GEN aarch64-softmmu/config-devices.mak.tmp
GEN alpha-softmmu/config-devices.mak.tmp
GEN arm-softmmu/config-devices.mak.tmp
GEN cris-softmmu/config-devices.mak.tmp
GEN cris-softmmu/config-devices.mak
GEN alpha-softmmu/config-devices.mak
GEN hppa-softmmu/config-devices.mak.tmp
GEN aarch64-softmmu/config-devices.mak
GEN arm-softmmu/config-devices.mak
GEN i386-softmmu/config-devices.mak.tmp
GEN lm32-softmmu/config-devices.mak.tmp
GEN m68k-softmmu/config-devices.mak.tmp
GEN lm32-softmmu/config-devices.mak
GEN m68k-softmmu/config-devices.mak
GEN microblazeel-softmmu/config-devices.mak.tmp
GEN hppa-softmmu/config-devices.mak
GEN microblaze-softmmu/config-devices.mak.tmp
GEN mips64el-softmmu/config-devices.mak.tmp
GEN i386-softmmu/config-devices.mak
GEN microblaze-softmmu/config-devices.mak
GEN mips64-softmmu/config-devices.mak.tmp
GEN microblazeel-softmmu/config-devices.mak
GEN mipsel-softmmu/config-devices.mak.tmp
GEN mips-softmmu/config-devices.mak.tmp
GEN mips64el-softmmu/config-devices.mak
GEN mips64-softmmu/config-devices.mak
GEN moxie-softmmu/config-devices.mak.tmp
GEN nios2-softmmu/config-devices.mak.tmp
GEN mips-softmmu/config-devices.mak
GEN moxie-softmmu/config-devices.mak
GEN mipsel-softmmu/config-devices.mak
GEN or1k-softmmu/config-devices.mak.tmp
GEN nios2-softmmu/config-devices.mak
GEN ppc64-softmmu/config-devices.mak.tmp
GEN ppcemb-softmmu/config-devices.mak.tmp
GEN ppc-softmmu/config-devices.mak.tmp
GEN or1k-softmmu/config-devices.mak
GEN s390x-softmmu/config-devices.mak.tmp
GEN ppcemb-softmmu/config-devices.mak
GEN ppc64-softmmu/config-devices.mak
GEN s390x-softmmu/config-devices.mak
GEN sh4eb-softmmu/config-devices.mak.tmp
GEN sh4-softmmu/config-devices.mak.tmp
GEN ppc-softmmu/config-devices.mak
GEN sparc64-softmmu/config-devices.mak.tmp
GEN sparc-softmmu/config-devices.mak.tmp
GEN sh4eb-softmmu/config-devices.mak
GEN sparc-softmmu/config-devices.mak
GEN tricore-softmmu/config-devices.mak.tmp
GEN unicore32-softmmu/config-devices.mak.tmp
GEN sparc64-softmmu/config-devices.mak
GEN sh4-softmmu/config-devices.mak
GEN x86_64-softmmu/config-devices.mak.tmp
GEN xtensaeb-softmmu/config-devices.mak.tmp
GEN tricore-softmmu/config-devices.mak
GEN xtensaeb-softmmu/config-devices.mak
GEN unicore32-softmmu/config-devices.mak
GEN xtensa-softmmu/config-devices.mak.tmp
GEN aarch64_be-linux-user/config-devices.mak.tmp
GEN aarch64-linux-user/config-devices.mak.tmp
GEN xtensa-softmmu/config-devices.mak
GEN x86_64-softmmu/config-devices.mak
GEN alpha-linux-user/config-devices.mak.tmp
GEN armeb-linux-user/config-devices.mak.tmp
GEN aarch64_be-linux-user/config-devices.mak
GEN aarch64-linux-user/config-devices.mak
GEN arm-linux-user/config-devices.mak.tmp
GEN alpha-linux-user/config-devices.mak
GEN cris-linux-user/config-devices.mak.tmp
GEN armeb-linux-user/config-devices.mak
GEN hppa-linux-user/config-devices.mak.tmp
GEN i386-linux-user/config-devices.mak.tmp
GEN arm-linux-user/config-devices.mak
GEN m68k-linux-user/config-devices.mak.tmp
GEN hppa-linux-user/config-devices.mak
GEN cris-linux-user/config-devices.mak
GEN i386-linux-user/config-devices.mak
GEN microblazeel-linux-user/config-devices.mak.tmp
GEN microblaze-linux-user/config-devices.mak.tmp
GEN mips64el-linux-user/config-devices.mak.tmp
GEN m68k-linux-user/config-devices.mak
GEN mips64el-linux-user/config-devices.mak
GEN mipsel-linux-user/config-devices.mak.tmp
GEN mips64-linux-user/config-devices.mak.tmp
GEN microblaze-linux-user/config-devices.mak
GEN microblazeel-linux-user/config-devices.mak
GEN mips-linux-user/config-devices.mak.tmp
GEN mipsn32el-linux-user/config-devices.mak.tmp
GEN mipsel-linux-user/config-devices.mak
GEN mips64-linux-user/config-devices.mak
GEN mips-linux-user/config-devices.mak
GEN mipsn32-linux-user/config-devices.mak.tmp
GEN nios2-linux-user/config-devices.mak.tmp
GEN or1k-linux-user/config-devices.mak.tmp
GEN mipsn32el-linux-user/config-devices.mak
GEN ppc64abi32-linux-user/config-devices.mak.tmp
GEN mipsn32-linux-user/config-devices.mak
GEN nios2-linux-user/config-devices.mak
GEN ppc64le-linux-user/config-devices.mak.tmp
GEN or1k-linux-user/config-devices.mak
GEN ppc64-linux-user/config-devices.mak.tmp
GEN ppc64abi32-linux-user/config-devices.mak
GEN ppc-linux-user/config-devices.mak.tmp
GEN s390x-linux-user/config-devices.mak.tmp
GEN ppc64le-linux-user/config-devices.mak
GEN ppc64-linux-user/config-devices.mak
GEN sh4eb-linux-user/config-devices.mak.tmp
GEN ppc-linux-user/config-devices.mak
GEN sh4-linux-user/config-devices.mak.tmp
GEN s390x-linux-user/config-devices.mak
GEN sparc32plus-linux-user/config-devices.mak.tmp
GEN sparc64-linux-user/config-devices.mak.tmp
GEN sh4eb-linux-user/config-devices.mak
GEN sh4-linux-user/config-devices.mak
GEN sparc32plus-linux-user/config-devices.mak
GEN sparc-linux-user/config-devices.mak.tmp
GEN tilegx-linux-user/config-devices.mak.tmp
GEN sparc64-linux-user/config-devices.mak
GEN x86_64-linux-user/config-devices.mak.tmp
GEN sparc-linux-user/config-devices.mak
GEN tilegx-linux-user/config-devices.mak
GEN config-host.h
GIT ui/keycodemapdb capstone
GEN x86_64-linux-user/config-devices.mak
GEN qemu-options.def
GEN qmp-commands.h
GEN qapi-types.h
GEN qapi-visit.h
GEN qapi-event.h
GEN qmp-marshal.c
GEN qapi-types.c
GEN qapi-visit.c
GEN qapi-event.c
GEN qmp-introspect.h
GEN qmp-introspect.c
GEN trace/generated-tcg-tracers.h
GEN trace/generated-helpers-wrappers.h
GEN trace/generated-helpers.h
GEN trace/generated-helpers.c
GEN module_block.h
Submodule 'capstone' (git://git.qemu.org/capstone.git) registered for path 'capstone'
Submodule 'ui/keycodemapdb' (git://git.qemu.org/keycodemapdb.git) registered for path 'ui/keycodemapdb'
Cloning into '/var/tmp/patchew-tester-tmp-2foxcz3r/src/capstone'...
GEN tests/test-qapi-types.h
GEN tests/test-qapi-visit.h
GEN tests/test-qmp-commands.h
GEN tests/test-qapi-event.h
GEN tests/test-qmp-introspect.h
GEN trace-root.h
GEN util/trace.h
GEN crypto/trace.h
GEN io/trace.h
GEN migration/trace.h
GEN block/trace.h
GEN chardev/trace.h
GEN hw/block/trace.h
GEN hw/block/dataplane/trace.h
GEN hw/char/trace.h
GEN hw/intc/trace.h
GEN hw/net/trace.h
GEN hw/rdma/trace.h
GEN hw/rdma/vmw/trace.h
GEN hw/virtio/trace.h
GEN hw/audio/trace.h
GEN hw/misc/trace.h
GEN hw/misc/macio/trace.h
GEN hw/usb/trace.h
GEN hw/scsi/trace.h
GEN hw/nvram/trace.h
GEN hw/display/trace.h
GEN hw/input/trace.h
GEN hw/timer/trace.h
GEN hw/dma/trace.h
GEN hw/sparc/trace.h
GEN hw/sparc64/trace.h
GEN hw/sd/trace.h
GEN hw/isa/trace.h
GEN hw/mem/trace.h
GEN hw/i386/trace.h
GEN hw/i386/xen/trace.h
GEN hw/9pfs/trace.h
GEN hw/ppc/trace.h
GEN hw/pci/trace.h
GEN hw/pci-host/trace.h
GEN hw/s390x/trace.h
GEN hw/vfio/trace.h
GEN hw/acpi/trace.h
GEN hw/arm/trace.h
GEN hw/alpha/trace.h
GEN hw/hppa/trace.h
GEN hw/xen/trace.h
GEN hw/ide/trace.h
GEN ui/trace.h
GEN audio/trace.h
GEN net/trace.h
GEN target/arm/trace.h
GEN target/i386/trace.h
GEN target/mips/trace.h
GEN target/sparc/trace.h
GEN target/s390x/trace.h
GEN target/ppc/trace.h
GEN qom/trace.h
GEN linux-user/trace.h
GEN qapi/trace.h
GEN accel/tcg/trace.h
GEN accel/kvm/trace.h
GEN nbd/trace.h
GEN scsi/trace.h
GEN trace-root.c
GEN util/trace.c
GEN crypto/trace.c
GEN io/trace.c
GEN migration/trace.c
GEN block/trace.c
GEN chardev/trace.c
GEN hw/block/trace.c
GEN hw/block/dataplane/trace.c
GEN hw/char/trace.c
GEN hw/intc/trace.c
GEN hw/net/trace.c
GEN hw/rdma/trace.c
GEN hw/rdma/vmw/trace.c
GEN hw/virtio/trace.c
GEN hw/audio/trace.c
GEN hw/misc/trace.c
GEN hw/misc/macio/trace.c
GEN hw/usb/trace.c
GEN hw/scsi/trace.c
GEN hw/nvram/trace.c
GEN hw/display/trace.c
GEN hw/input/trace.c
GEN hw/timer/trace.c
GEN hw/dma/trace.c
GEN hw/sparc/trace.c
GEN hw/sparc64/trace.c
GEN hw/sd/trace.c
GEN hw/isa/trace.c
GEN hw/mem/trace.c
GEN hw/i386/trace.c
GEN hw/i386/xen/trace.c
GEN hw/9pfs/trace.c
GEN hw/ppc/trace.c
GEN hw/pci/trace.c
GEN hw/pci-host/trace.c
GEN hw/s390x/trace.c
GEN hw/vfio/trace.c
GEN hw/acpi/trace.c
GEN hw/arm/trace.c
GEN hw/alpha/trace.c
GEN hw/hppa/trace.c
GEN hw/xen/trace.c
GEN hw/ide/trace.c
GEN ui/trace.c
GEN audio/trace.c
GEN net/trace.c
GEN target/arm/trace.c
GEN target/i386/trace.c
GEN target/mips/trace.c
GEN target/sparc/trace.c
GEN target/s390x/trace.c
GEN target/ppc/trace.c
GEN qom/trace.c
GEN linux-user/trace.c
GEN qapi/trace.c
GEN accel/tcg/trace.c
GEN accel/kvm/trace.c
GEN nbd/trace.c
GEN scsi/trace.c
GEN config-all-devices.mak
Cloning into '/var/tmp/patchew-tester-tmp-2foxcz3r/src/ui/keycodemapdb'...
GEN ui/input-keymap-atset1-to-qcode.c
GEN ui/input-keymap-linux-to-qcode.c
GEN ui/input-keymap-qcode-to-atset1.c
GEN ui/input-keymap-qcode-to-atset2.c
GEN ui/input-keymap-qcode-to-atset3.c
GEN ui/input-keymap-qcode-to-linux.c
GEN ui/input-keymap-qcode-to-qnum.c
GEN ui/input-keymap-qcode-to-sun.c
GEN ui/input-keymap-qnum-to-qcode.c
CC cs.o
GEN ui/input-keymap-usb-to-qcode.c
GEN ui/input-keymap-win32-to-qcode.c
GEN ui/input-keymap-x11-to-qcode.c
GEN ui/input-keymap-xorgevdev-to-qcode.c
GEN ui/input-keymap-xorgkbd-to-qcode.c
GEN ui/input-keymap-xorgxquartz-to-qcode.c
CC utils.o
GEN ui/input-keymap-xorgxwin-to-qcode.c
CC SStream.o
CC MCInstrDesc.o
CC MCRegisterInfo.o
CC arch/ARM/ARMDisassembler.o
CC arch/ARM/ARMInstPrinter.o
CC arch/ARM/ARMMapping.o
CC arch/ARM/ARMModule.o
CC arch/AArch64/AArch64BaseInfo.o
CC arch/AArch64/AArch64Disassembler.o
CC arch/AArch64/AArch64InstPrinter.o
CC arch/AArch64/AArch64Mapping.o
CC arch/AArch64/AArch64Module.o
CC arch/Mips/MipsDisassembler.o
CC arch/Mips/MipsInstPrinter.o
CC arch/Mips/MipsMapping.o
CC arch/Mips/MipsModule.o
CC arch/PowerPC/PPCDisassembler.o
CC arch/PowerPC/PPCInstPrinter.o
CC arch/PowerPC/PPCMapping.o
CC arch/PowerPC/PPCModule.o
CC arch/Sparc/SparcDisassembler.o
CC arch/Sparc/SparcInstPrinter.o
CC arch/Sparc/SparcMapping.o
CC arch/Sparc/SparcModule.o
CC arch/SystemZ/SystemZDisassembler.o
CC arch/SystemZ/SystemZInstPrinter.o
CC arch/SystemZ/SystemZMapping.o
CC arch/SystemZ/SystemZModule.o
CC arch/SystemZ/SystemZMCTargetDesc.o
CC arch/X86/X86DisassemblerDecoder.o
CC arch/X86/X86Disassembler.o
CC arch/X86/X86IntelInstPrinter.o
CC arch/X86/X86ATTInstPrinter.o
CC arch/X86/X86Mapping.o
CC arch/X86/X86Module.o
CC arch/XCore/XCoreDisassembler.o
CC arch/XCore/XCoreInstPrinter.o
CC arch/XCore/XCoreMapping.o
CC arch/XCore/XCoreModule.o
CC MCInst.o
AR libcapstone.a
ar: creating /var/tmp/patchew-tester-tmp-2foxcz3r/src/build/capstone/libcapstone.a
GEN docs/version.texi
GEN qemu-options.texi
CC tests/qemu-iotests/socket_scm_helper.o
GEN qemu-monitor.texi
GEN qemu-img-cmds.texi
GEN qemu-monitor-info.texi
GEN qemu-img.1
GEN qemu-nbd.8
GEN qemu-ga.8
GEN docs/interop/qemu-qmp-qapi.texi
GEN docs/interop/qemu-ga-qapi.texi
GEN docs/qemu-block-drivers.7
GEN fsdev/virtfs-proxy-helper.1
GEN qga/qapi-generated/qga-qapi-types.h
GEN qga/qapi-generated/qga-qapi-visit.h
GEN qga/qapi-generated/qga-qmp-commands.h
GEN qga/qapi-generated/qga-qapi-types.c
GEN qga/qapi-generated/qga-qapi-visit.c
GEN qga/qapi-generated/qga-qmp-marshal.c
CC qmp-introspect.o
CC qapi-types.o
CC qapi-visit.o
CC qapi-event.o
CC qapi/qapi-visit-core.o
CC qapi/qapi-dealloc-visitor.o
CC qapi/qobject-input-visitor.o
CC qapi/qobject-output-visitor.o
CC qapi/qmp-registry.o
CC qapi/qmp-dispatch.o
CC qapi/string-input-visitor.o
CC qapi/string-output-visitor.o
CC qapi/opts-visitor.o
CC qapi/qapi-clone-visitor.o
CC qapi/qmp-event.o
CC qapi/qapi-util.o
CC qobject/qnull.o
CC qobject/qnum.o
CC qobject/qstring.o
CC qobject/qdict.o
CC qobject/qlist.o
CC qobject/qbool.o
CC qobject/qlit.o
CC qobject/qjson.o
CC qobject/qobject.o
CC qobject/json-lexer.o
CC qobject/json-streamer.o
CC qobject/json-parser.o
CC trace/control.o
CC trace/qmp.o
CC util/osdep.o
CC util/cutils.o
CC util/unicode.o
CC util/qemu-timer-common.o
CC util/bufferiszero.o
CC util/lockcnt.o
CC util/aiocb.o
CC util/async.o
CC util/thread-pool.o
CC util/qemu-timer.o
CC util/main-loop.o
CC util/iohandler.o
CC util/aio-posix.o
CC util/compatfd.o
CC util/event_notifier-posix.o
CC util/mmap-alloc.o
CC util/oslib-posix.o
CC util/qemu-openpty.o
CC util/qemu-thread-posix.o
CC util/memfd.o
CC util/envlist.o
CC util/path.o
CC util/module.o
CC util/host-utils.o
CC util/bitmap.o
CC util/bitops.o
CC util/hbitmap.o
CC util/fifo8.o
CC util/acl.o
CC util/cacheinfo.o
CC util/error.o
CC util/qemu-error.o
CC util/id.o
CC util/iov.o
CC util/qemu-config.o
CC util/qemu-sockets.o
CC util/uri.o
CC util/notify.o
CC util/qemu-option.o
CC util/qemu-progress.o
CC util/keyval.o
CC util/hexdump.o
CC util/crc32c.o
CC util/uuid.o
CC util/throttle.o
CC util/getauxval.o
CC util/readline.o
CC util/rcu.o
CC util/qemu-coroutine.o
CC util/qemu-coroutine-lock.o
CC util/qemu-coroutine-io.o
CC util/qemu-coroutine-sleep.o
CC util/coroutine-ucontext.o
CC util/buffer.o
CC util/timed-average.o
CC util/base64.o
CC util/log.o
CC util/pagesize.o
CC util/qdist.o
CC util/qht.o
CC util/range.o
CC util/stats64.o
CC util/systemd.o
CC util/vfio-helpers.o
CC trace-root.o
CC util/trace.o
CC crypto/trace.o
CC io/trace.o
CC migration/trace.o
CC block/trace.o
CC chardev/trace.o
CC hw/block/trace.o
CC hw/block/dataplane/trace.o
CC hw/char/trace.o
CC hw/intc/trace.o
CC hw/net/trace.o
CC hw/rdma/trace.o
CC hw/rdma/vmw/trace.o
CC hw/virtio/trace.o
CC hw/audio/trace.o
CC hw/misc/trace.o
CC hw/misc/macio/trace.o
CC hw/usb/trace.o
CC hw/scsi/trace.o
CC hw/nvram/trace.o
CC hw/display/trace.o
CC hw/input/trace.o
CC hw/timer/trace.o
CC hw/dma/trace.o
CC hw/sparc/trace.o
CC hw/sparc64/trace.o
CC hw/sd/trace.o
CC hw/isa/trace.o
CC hw/mem/trace.o
CC hw/i386/trace.o
CC hw/i386/xen/trace.o
CC hw/9pfs/trace.o
CC hw/ppc/trace.o
CC hw/pci/trace.o
CC hw/pci-host/trace.o
CC hw/s390x/trace.o
CC hw/vfio/trace.o
CC hw/acpi/trace.o
CC hw/arm/trace.o
CC hw/alpha/trace.o
CC hw/hppa/trace.o
CC hw/xen/trace.o
CC hw/ide/trace.o
CC ui/trace.o
CC audio/trace.o
CC net/trace.o
CC target/arm/trace.o
CC target/i386/trace.o
CC target/mips/trace.o
CC target/sparc/trace.o
CC target/s390x/trace.o
CC target/ppc/trace.o
CC qom/trace.o
CC linux-user/trace.o
CC qapi/trace.o
CC accel/tcg/trace.o
CC accel/kvm/trace.o
CC nbd/trace.o
CC scsi/trace.o
CC crypto/pbkdf-stub.o
CC stubs/arch-query-cpu-def.o
CC stubs/arch-query-cpu-model-expansion.o
CC stubs/arch-query-cpu-model-comparison.o
CC stubs/arch-query-cpu-model-baseline.o
CC stubs/bdrv-next-monitor-owned.o
CC stubs/blk-commit-all.o
CC stubs/blockdev-close-all-bdrv-states.o
CC stubs/clock-warp.o
CC stubs/cpu-get-clock.o
CC stubs/cpu-get-icount.o
CC stubs/dump.o
CC stubs/error-printf.o
CC stubs/fdset.o
CC stubs/gdbstub.o
CC stubs/get-vm-name.o
CC stubs/iothread.o
CC stubs/iothread-lock.o
CC stubs/is-daemonized.o
CC stubs/linux-aio.o
CC stubs/machine-init-done.o
CC stubs/migr-blocker.o
CC stubs/change-state-handler.o
CC stubs/monitor.o
CC stubs/notify-event.o
CC stubs/qtest.o
CC stubs/replay.o
CC stubs/runstate-check.o
CC stubs/set-fd-handler.o
CC stubs/slirp.o
CC stubs/sysbus.o
CC stubs/tpm.o
CC stubs/trace-control.o
CC stubs/uuid.o
CC stubs/vm-stop.o
CC stubs/vmstate.o
CC stubs/qmp_pc_dimm.o
CC stubs/target-monitor-defs.o
CC stubs/target-get-monitor-def.o
CC stubs/pc_madt_cpu_entry.o
CC stubs/vmgenid.o
CC stubs/xen-common.o
CC stubs/xen-hvm.o
CC stubs/pci-host-piix.o
CC stubs/ram-block.o
CC qemu-keymap.o
CC ui/input-keymap.o
CC contrib/ivshmem-client/ivshmem-client.o
CC contrib/ivshmem-client/main.o
CC contrib/ivshmem-server/ivshmem-server.o
CC contrib/ivshmem-server/main.o
CC qemu-nbd.o
CC block.o
CC blockjob.o
CC qemu-io-cmds.o
CC replication.o
CC block/raw-format.o
CC block/qcow.o
CC block/vdi.o
CC block/vmdk.o
CC block/cloop.o
CC block/bochs.o
CC block/vpc.o
CC block/vvfat.o
CC block/dmg.o
CC block/qcow2.o
CC block/qcow2-refcount.o
CC block/qcow2-cluster.o
CC block/qcow2-snapshot.o
CC block/qcow2-cache.o
CC block/qcow2-bitmap.o
CC block/qed.o
CC block/qed-l2-cache.o
CC block/qed-table.o
CC block/qed-cluster.o
CC block/qed-check.o
CC block/vhdx.o
CC block/vhdx-endian.o
CC block/vhdx-log.o
CC block/quorum.o
CC block/parallels.o
CC block/blkdebug.o
CC block/blkverify.o
CC block/blkreplay.o
CC block/block-backend.o
CC block/snapshot.o
CC block/qapi.o
CC block/file-posix.o
CC block/linux-aio.o
CC block/null.o
CC block/mirror.o
CC block/commit.o
CC block/io.o
CC block/throttle-groups.o
CC block/nvme.o
CC block/nbd.o
CC block/nbd-client.o
CC block/sheepdog.o
CC block/iscsi-opts.o
CC block/accounting.o
CC block/dirty-bitmap.o
CC block/write-threshold.o
CC block/backup.o
CC block/replication.o
CC block/throttle.o
CC block/crypto.o
CC nbd/server.o
CC nbd/client.o
CC nbd/common.o
CC scsi/utils.o
CC scsi/pr-manager.o
CC scsi/pr-manager-helper.o
CC block/iscsi.o
CC block/nfs.o
CC block/curl.o
CC block/rbd.o
CC block/gluster.o
CC block/ssh.o
CC block/dmg-bz2.o
CC crypto/init.o
CC crypto/hash.o
CC crypto/hash-nettle.o
CC crypto/hmac.o
CC crypto/hmac-nettle.o
CC crypto/aes.o
CC crypto/desrfb.o
CC crypto/cipher.o
CC crypto/tlscreds.o
CC crypto/tlscredsanon.o
CC crypto/tlscredsx509.o
CC crypto/tlssession.o
CC crypto/secret.o
CC crypto/random-gnutls.o
CC crypto/pbkdf.o
CC crypto/pbkdf-nettle.o
CC crypto/ivgen.o
CC crypto/ivgen-essiv.o
CC crypto/ivgen-plain.o
CC crypto/ivgen-plain64.o
CC crypto/afsplit.o
CC crypto/xts.o
CC crypto/block.o
CC crypto/block-qcow.o
CC crypto/block-luks.o
CC io/channel.o
CC io/channel-buffer.o
CC io/channel-command.o
CC io/channel-file.o
CC io/channel-socket.o
CC io/channel-tls.o
CC io/channel-watch.o
CC io/channel-websock.o
CC io/channel-util.o
CC io/dns-resolver.o
CC io/net-listener.o
CC io/task.o
CC qom/object.o
CC qom/container.o
CC qom/object_interfaces.o
CC qom/qom-qobject.o
GEN qemu-img-cmds.h
CC qemu-io.o
CC fsdev/virtfs-proxy-helper.o
CC fsdev/9p-marshal.o
CC fsdev/9p-iov-marshal.o
CC scsi/qemu-pr-helper.o
CC qemu-bridge-helper.o
CC blockdev.o
CC blockdev-nbd.o
CC bootdevice.o
CC iothread.o
CC qdev-monitor.o
CC device-hotplug.o
CC os-posix.o
CC bt-host.o
CC bt-vhci.o
CC dma-helpers.o
CC vl.o
CC tpm.o
CC qemu-seccomp.o
CC device_tree.o
CC qmp-marshal.o
CC qmp.o
CC hmp.o
CC cpus-common.o
CC audio/audio.o
CC audio/noaudio.o
CC audio/wavaudio.o
CC audio/mixeng.o
CC audio/sdlaudio.o
CC audio/ossaudio.o
CC audio/wavcapture.o
CC backends/rng.o
CC backends/rng-egd.o
CC backends/rng-random.o
CC backends/tpm.o
CC backends/hostmem.o
CC backends/hostmem-ram.o
CC backends/hostmem-file.o
CC backends/cryptodev.o
CC backends/cryptodev-builtin.o
CC backends/hostmem-memfd.o
CC block/stream.o
CC chardev/msmouse.o
CC chardev/wctablet.o
CC chardev/testdev.o
CC chardev/baum.o
CC disas/alpha.o
CC disas/arm.o
CXX disas/arm-a64.o
CC disas/cris.o
CC disas/hppa.o
CC disas/i386.o
CC disas/m68k.o
CC disas/microblaze.o
CC disas/mips.o
CC disas/nios2.o
CC disas/moxie.o
CC disas/ppc.o
CC disas/s390.o
CC disas/sh4.o
CC disas/sparc.o
CC disas/lm32.o
CC disas/xtensa.o
CXX disas/libvixl/vixl/utils.o
CXX disas/libvixl/vixl/compiler-intrinsics.o
CXX disas/libvixl/vixl/a64/instructions-a64.o
CXX disas/libvixl/vixl/a64/decoder-a64.o
CXX disas/libvixl/vixl/a64/disasm-a64.o
CC fsdev/qemu-fsdev.o
CC fsdev/qemu-fsdev-opts.o
CC fsdev/qemu-fsdev-throttle.o
CC fsdev/qemu-fsdev-dummy.o
CC hw/9pfs/9p.o
CC hw/9pfs/9p-util.o
CC hw/9pfs/9p-local.o
CC hw/9pfs/9p-xattr.o
CC hw/9pfs/9p-xattr-user.o
CC hw/9pfs/9p-posix-acl.o
CC hw/9pfs/coth.o
CC hw/9pfs/cofs.o
CC hw/9pfs/codir.o
CC hw/9pfs/cofile.o
CC hw/9pfs/coxattr.o
CC hw/9pfs/9p-synth.o
CC hw/9pfs/9p-handle.o
CC hw/9pfs/9p-proxy.o
CC hw/acpi/core.o
CC hw/acpi/piix4.o
CC hw/acpi/pcihp.o
CC hw/acpi/ich9.o
CC hw/acpi/tco.o
CC hw/acpi/cpu_hotplug.o
CC hw/acpi/memory_hotplug.o
CC hw/acpi/cpu.o
CC hw/acpi/nvdimm.o
CC hw/acpi/vmgenid.o
CC hw/acpi/acpi_interface.o
CC hw/acpi/bios-linker-loader.o
CC hw/acpi/aml-build.o
CC hw/acpi/ipmi.o
CC hw/acpi/acpi-stub.o
CC hw/acpi/ipmi-stub.o
CC hw/audio/sb16.o
CC hw/audio/es1370.o
CC hw/audio/ac97.o
CC hw/audio/fmopl.o
CC hw/audio/adlib.o
CC hw/audio/gus.o
CC hw/audio/gusemu_hal.o
CC hw/audio/gusemu_mixer.o
CC hw/audio/cs4231a.o
CC hw/audio/intel-hda.o
CC hw/audio/hda-codec.o
CC hw/audio/pcspk.o
CC hw/audio/wm8750.o
CC hw/audio/pl041.o
CC hw/audio/lm4549.o
CC hw/audio/cs4231.o
CC hw/audio/marvell_88w8618.o
CC hw/audio/milkymist-ac97.o
CC hw/audio/soundhw.o
CC hw/block/block.o
CC hw/block/cdrom.o
CC hw/block/hd-geometry.o
CC hw/block/fdc.o
CC hw/block/m25p80.o
CC hw/block/nand.o
CC hw/block/pflash_cfi01.o
CC hw/block/pflash_cfi02.o
CC hw/block/ecc.o
CC hw/block/onenand.o
CC hw/block/nvme.o
CC hw/bt/core.o
CC hw/bt/l2cap.o
CC hw/bt/sdp.o
CC hw/bt/hci.o
CC hw/bt/hid.o
CC hw/bt/hci-csr.o
CC hw/char/ipoctal232.o
CC hw/char/escc.o
CC hw/char/parallel.o
CC hw/char/pl011.o
CC hw/char/serial.o
CC hw/char/serial-isa.o
CC hw/char/serial-pci.o
CC hw/char/virtio-console.o
CC hw/char/xilinx_uartlite.o
CC hw/char/cadence_uart.o
CC hw/char/cmsdk-apb-uart.o
CC hw/char/etraxfs_ser.o
CC hw/char/debugcon.o
CC hw/char/grlib_apbuart.o
CC hw/char/imx_serial.o
CC hw/char/lm32_juart.o
CC hw/char/lm32_uart.o
CC hw/char/milkymist-uart.o
CC hw/char/sclpconsole.o
CC hw/char/sclpconsole-lm.o
CC hw/core/qdev.o
CC hw/core/qdev-properties.o
CC hw/core/bus.o
CC hw/core/reset.o
CC hw/core/qdev-fw.o
CC hw/core/fw-path-provider.o
CC hw/core/irq.o
CC hw/core/hotplug.o
CC hw/core/nmi.o
CC hw/core/empty_slot.o
CC hw/core/stream.o
CC hw/core/ptimer.o
CC hw/core/sysbus.o
CC hw/core/machine.o
CC hw/core/loader.o
CC hw/core/loader-fit.o
CC hw/core/qdev-properties-system.o
CC hw/core/register.o
CC hw/core/or-irq.o
CC hw/core/platform-bus.o
CC hw/cpu/core.o
CC hw/display/ads7846.o
CC hw/display/cirrus_vga.o
CC hw/display/g364fb.o
CC hw/display/jazz_led.o
CC hw/display/pl110.o
CC hw/display/ssd0303.o
CC hw/display/ssd0323.o
CC hw/display/vga-pci.o
CC hw/display/vga-isa.o
CC hw/display/vga-isa-mm.o
CC hw/display/vmware_vga.o
CC hw/display/blizzard.o
CC hw/display/exynos4210_fimd.o
CC hw/display/framebuffer.o
CC hw/display/milkymist-vgafb.o
CC hw/display/tc6393xb.o
CC hw/display/milkymist-tmu2.o
CC hw/dma/puv3_dma.o
CC hw/dma/rc4030.o
CC hw/dma/pl080.o
CC hw/dma/pl330.o
CC hw/dma/i82374.o
CC hw/dma/i8257.o
CC hw/dma/xilinx_axidma.o
CC hw/dma/xlnx-zynq-devcfg.o
CC hw/dma/etraxfs_dma.o
CC hw/dma/sparc32_dma.o
CC hw/gpio/max7310.o
CC hw/gpio/pl061.o
CC hw/gpio/puv3_gpio.o
CC hw/gpio/zaurus.o
CC hw/gpio/mpc8xxx.o
CC hw/gpio/gpio_key.o
CC hw/i2c/core.o
CC hw/i2c/smbus.o
CC hw/i2c/smbus_eeprom.o
CC hw/i2c/i2c-ddc.o
CC hw/i2c/versatile_i2c.o
CC hw/i2c/smbus_ich9.o
CC hw/i2c/pm_smbus.o
CC hw/i2c/bitbang_i2c.o
CC hw/i2c/exynos4210_i2c.o
CC hw/i2c/imx_i2c.o
CC hw/i2c/aspeed_i2c.o
CC hw/ide/core.o
CC hw/ide/atapi.o
CC hw/ide/qdev.o
CC hw/ide/pci.o
CC hw/ide/isa.o
CC hw/ide/piix.o
CC hw/ide/cmd646.o
CC hw/ide/macio.o
CC hw/ide/mmio.o
CC hw/ide/via.o
CC hw/ide/microdrive.o
CC hw/ide/ahci.o
CC hw/ide/ich.o
CC hw/ide/ahci-allwinner.o
CC hw/ide/sii3112.o
CC hw/input/adb.o
CC hw/input/adb-mouse.o
CC hw/input/adb-kbd.o
CC hw/input/hid.o
CC hw/input/lm832x.o
CC hw/input/pckbd.o
CC hw/input/pl050.o
CC hw/input/ps2.o
CC hw/input/stellaris_input.o
CC hw/input/tsc2005.o
CC hw/input/virtio-input.o
CC hw/input/virtio-input-hid.o
CC hw/input/virtio-input-host.o
CC hw/intc/heathrow_pic.o
CC hw/intc/i8259_common.o
CC hw/intc/i8259.o
CC hw/intc/pl190.o
CC hw/intc/puv3_intc.o
CC hw/intc/xilinx_intc.o
CC hw/intc/xlnx-pmu-iomod-intc.o
CC hw/intc/xlnx-zynqmp-ipi.o
CC hw/intc/etraxfs_pic.o
CC hw/intc/imx_avic.o
CC hw/intc/imx_gpcv2.o
CC hw/intc/lm32_pic.o
CC hw/intc/realview_gic.o
CC hw/intc/slavio_intctl.o
CC hw/intc/ioapic_common.o
CC hw/intc/arm_gic_common.o
CC hw/intc/arm_gic.o
CC hw/intc/arm_gicv2m.o
CC hw/intc/arm_gicv3_common.o
CC hw/intc/arm_gicv3.o
CC hw/intc/arm_gicv3_dist.o
CC hw/intc/arm_gicv3_redist.o
CC hw/intc/arm_gicv3_its_common.o
CC hw/intc/openpic.o
CC hw/intc/intc.o
CC hw/ipack/ipack.o
CC hw/ipack/tpci200.o
CC hw/ipmi/ipmi.o
CC hw/ipmi/ipmi_bmc_sim.o
CC hw/ipmi/ipmi_bmc_extern.o
CC hw/ipmi/isa_ipmi_kcs.o
CC hw/ipmi/isa_ipmi_bt.o
CC hw/isa/isa-bus.o
CC hw/isa/apm.o
CC hw/isa/i82378.o
CC hw/isa/pc87312.o
CC hw/isa/piix4.o
CC hw/isa/vt82c686.o
CC hw/mem/pc-dimm.o
CC hw/mem/nvdimm.o
CC hw/misc/applesmc.o
CC hw/misc/max111x.o
CC hw/misc/tmp105.o
CC hw/misc/tmp421.o
CC hw/misc/debugexit.o
CC hw/misc/sga.o
CC hw/misc/pc-testdev.o
CC hw/misc/pci-testdev.o
CC hw/misc/edu.o
CC hw/misc/unimp.o
CC hw/misc/vmcoreinfo.o
CC hw/misc/arm_l2x0.o
CC hw/misc/arm_integrator_debug.o
CC hw/misc/a9scu.o
CC hw/misc/arm11scu.o
CC hw/misc/mos6522.o
CC hw/misc/puv3_pm.o
CC hw/misc/macio/macio.o
CC hw/misc/macio/cuda.o
CC hw/misc/macio/mac_dbdma.o
CC hw/net/dp8393x.o
CC hw/net/ne2000.o
CC hw/net/eepro100.o
CC hw/net/pcnet-pci.o
CC hw/net/pcnet.o
CC hw/net/e1000.o
CC hw/net/e1000x_common.o
CC hw/net/net_tx_pkt.o
CC hw/net/net_rx_pkt.o
CC hw/net/e1000e.o
CC hw/net/e1000e_core.o
CC hw/net/rtl8139.o
CC hw/net/vmxnet3.o
CC hw/net/smc91c111.o
CC hw/net/lan9118.o
CC hw/net/ne2000-isa.o
CC hw/net/opencores_eth.o
CC hw/net/xgmac.o
CC hw/net/mipsnet.o
CC hw/net/xilinx_axienet.o
CC hw/net/allwinner_emac.o
CC hw/net/imx_fec.o
CC hw/net/cadence_gem.o
CC hw/net/stellaris_enet.o
CC hw/net/lance.o
CC hw/net/sunhme.o
CC hw/net/ftgmac100.o
CC hw/net/sungem.o
CC hw/net/rocker/rocker.o
CC hw/net/rocker/rocker_fp.o
CC hw/net/rocker/rocker_desc.o
CC hw/net/rocker/rocker_world.o
CC hw/net/rocker/rocker_of_dpa.o
CC hw/net/can/can_sja1000.o
CC hw/net/can/can_kvaser_pci.o
CC hw/net/can/can_pcm3680_pci.o
CC hw/net/can/can_mioe3680_pci.o
CC hw/nvram/ds1225y.o
CC hw/nvram/eeprom93xx.o
CC hw/nvram/eeprom_at24c.o
CC hw/nvram/fw_cfg.o
CC hw/nvram/chrp_nvram.o
CC hw/nvram/mac_nvram.o
CC hw/pci-bridge/pci_bridge_dev.o
CC hw/pci-bridge/pcie_root_port.o
CC hw/pci-bridge/gen_pcie_root_port.o
CC hw/pci-bridge/pcie_pci_bridge.o
CC hw/pci-bridge/pci_expander_bridge.o
CC hw/pci-bridge/xio3130_upstream.o
CC hw/pci-bridge/xio3130_downstream.o
CC hw/pci-bridge/ioh3420.o
CC hw/pci-bridge/i82801b11.o
CC hw/pci-bridge/dec.o
CC hw/pci-bridge/simba.o
CC hw/pci-host/pam.o
CC hw/pci-host/prep.o
CC hw/pci-host/grackle.o
CC hw/pci-host/uninorth.o
CC hw/pci-host/ppce500.o
CC hw/pci-host/versatile.o
CC hw/pci-host/sabre.o
CC hw/pci-host/bonito.o
CC hw/pci-host/piix.o
CC hw/pci-host/q35.o
CC hw/pci-host/gpex.o
CC hw/pci-host/xilinx-pcie.o
CC hw/pci/pci.o
CC hw/pci/pci_bridge.o
CC hw/pci/msix.o
CC hw/pci/msi.o
CC hw/pci/shpc.o
CC hw/pci/slotid_cap.o
CC hw/pci/pci_host.o
CC hw/pci/pcie_host.o
CC hw/pci/pcie.o
CC hw/pci/pcie_aer.o
CC hw/pci/pcie_port.o
CC hw/pci/pci-stub.o
CC hw/pcmcia/pcmcia.o
CC hw/scsi/scsi-disk.o
CC hw/scsi/scsi-generic.o
CC hw/scsi/scsi-bus.o
CC hw/scsi/lsi53c895a.o
CC hw/scsi/mptsas.o
CC hw/scsi/mptconfig.o
CC hw/scsi/mptendian.o
CC hw/scsi/megasas.o
CC hw/scsi/vmw_pvscsi.o
CC hw/scsi/esp.o
CC hw/scsi/esp-pci.o
CC hw/sd/pl181.o
CC hw/sd/ssi-sd.o
CC hw/sd/sd.o
CC hw/sd/core.o
CC hw/sd/sdhci.o
CC hw/smbios/smbios.o
CC hw/smbios/smbios_type_38.o
CC hw/smbios/smbios-stub.o
CC hw/smbios/smbios_type_38-stub.o
CC hw/ssi/pl022.o
CC hw/ssi/ssi.o
CC hw/ssi/xilinx_spi.o
CC hw/ssi/xilinx_spips.o
CC hw/ssi/aspeed_smc.o
CC hw/ssi/stm32f2xx_spi.o
CC hw/ssi/mss-spi.o
CC hw/timer/arm_timer.o
CC hw/timer/arm_mptimer.o
CC hw/timer/armv7m_systick.o
CC hw/timer/a9gtimer.o
CC hw/timer/cadence_ttc.o
CC hw/timer/ds1338.o
CC hw/timer/hpet.o
CC hw/timer/i8254_common.o
CC hw/timer/i8254.o
CC hw/timer/m48t59.o
CC hw/timer/m48t59-isa.o
CC hw/timer/pl031.o
CC hw/timer/puv3_ost.o
CC hw/timer/twl92230.o
CC hw/timer/xilinx_timer.o
CC hw/timer/slavio_timer.o
CC hw/timer/etraxfs_timer.o
CC hw/timer/grlib_gptimer.o
CC hw/timer/imx_epit.o
CC hw/timer/imx_gpt.o
CC hw/timer/lm32_timer.o
CC hw/timer/milkymist-sysctl.o
CC hw/timer/stm32f2xx_timer.o
CC hw/timer/aspeed_timer.o
CC hw/timer/sun4v-rtc.o
CC hw/timer/cmsdk-apb-timer.o
CC hw/timer/mss-timer.o
CC hw/tpm/tpm_util.o
CC hw/tpm/tpm_tis.o
CC hw/tpm/tpm_crb.o
CC hw/tpm/tpm_emulator.o
CC hw/usb/core.o
CC hw/usb/combined-packet.o
CC hw/usb/bus.o
CC hw/usb/libhw.o
CC hw/usb/desc.o
CC hw/usb/desc-msos.o
CC hw/usb/hcd-uhci.o
CC hw/usb/hcd-ohci.o
CC hw/usb/hcd-ehci.o
CC hw/usb/hcd-ehci-pci.o
CC hw/usb/hcd-ehci-sysbus.o
CC hw/usb/hcd-xhci.o
CC hw/usb/hcd-xhci-nec.o
CC hw/usb/hcd-musb.o
CC hw/usb/dev-hub.o
CC hw/usb/dev-hid.o
CC hw/usb/dev-wacom.o
CC hw/usb/dev-storage.o
CC hw/usb/dev-uas.o
CC hw/usb/dev-audio.o
CC hw/usb/dev-serial.o
CC hw/usb/dev-network.o
CC hw/usb/dev-bluetooth.o
CC hw/usb/dev-smartcard-reader.o
CC hw/usb/ccid-card-passthru.o
CC hw/usb/ccid-card-emulated.o
CC hw/usb/dev-mtp.o
CC hw/usb/redirect.o
CC hw/usb/quirks.o
CC hw/usb/host-libusb.o
CC hw/usb/host-stub.o
CC hw/virtio/virtio-rng.o
CC hw/virtio/virtio-pci.o
CC hw/virtio/virtio-bus.o
CC hw/virtio/virtio-mmio.o
CC hw/virtio/vhost-stub.o
CC hw/watchdog/watchdog.o
CC hw/watchdog/wdt_i6300esb.o
CC hw/watchdog/wdt_ib700.o
CC hw/watchdog/wdt_diag288.o
CC hw/watchdog/wdt_aspeed.o
CC migration/migration.o
CC migration/socket.o
CC migration/fd.o
CC migration/exec.o
CC migration/tls.o
CC migration/channel.o
CC migration/savevm.o
CC migration/colo-comm.o
CC migration/colo.o
CC migration/colo-failover.o
CC migration/vmstate.o
CC migration/vmstate-types.o
CC migration/page_cache.o
CC migration/qemu-file.o
CC migration/global_state.o
CC migration/qemu-file-channel.o
CC migration/xbzrle.o
CC migration/postcopy-ram.o
CC migration/qjson.o
CC migration/block.o
CC net/net.o
CC net/queue.o
CC net/checksum.o
CC net/util.o
CC net/hub.o
CC net/socket.o
CC net/dump.o
CC net/eth.o
CC net/l2tpv3.o
CC net/vhost-user.o
CC net/slirp.o
CC net/filter.o
CC net/filter-buffer.o
CC net/filter-mirror.o
CC net/colo-compare.o
CC net/colo.o
CC net/filter-rewriter.o
CC net/filter-replay.o
CC net/tap.o
CC net/tap-linux.o
CC net/can/can_core.o
CC net/can/can_host.o
CC net/can/can_socketcan.o
CC qom/cpu.o
CC replay/replay.o
CC replay/replay-internal.o
CC replay/replay-events.o
CC replay/replay-time.o
CC replay/replay-input.o
CC replay/replay-char.o
CC replay/replay-snapshot.o
CC replay/replay-net.o
CC replay/replay-audio.o
CC slirp/cksum.o
CC slirp/if.o
CC slirp/ip_icmp.o
CC slirp/ip6_icmp.o
CC slirp/ip6_input.o
CC slirp/ip6_output.o
CC slirp/ip_input.o
CC slirp/ip_output.o
CC slirp/dnssearch.o
CC slirp/dhcpv6.o
CC slirp/slirp.o
CC slirp/mbuf.o
CC slirp/misc.o
CC slirp/sbuf.o
CC slirp/socket.o
CC slirp/tcp_input.o
CC slirp/tcp_output.o
CC slirp/tcp_subr.o
CC slirp/tcp_timer.o
CC slirp/udp.o
CC slirp/udp6.o
CC slirp/bootp.o
CC slirp/tftp.o
CC slirp/arp_table.o
CC slirp/ndp_table.o
CC slirp/ncsi.o
CC ui/keymaps.o
CC ui/console.o
CC ui/cursor.o
CC ui/qemu-pixman.o
CC ui/input.o
CC ui/input-legacy.o
CC ui/input-linux.o
CC ui/sdl2.o
CC ui/sdl2-input.o
CC ui/sdl2-2d.o
CC ui/sdl2-gl.o
CC ui/curses.o
CC ui/vnc.o
CC ui/vnc-enc-zlib.o
CC ui/vnc-enc-hextile.o
CC ui/vnc-enc-tight.o
CC ui/vnc-palette.o
CC ui/vnc-enc-zrle.o
CC ui/vnc-auth-vencrypt.o
CC ui/vnc-auth-sasl.o
CC ui/vnc-ws.o
CC ui/vnc-jobs.o
CC ui/gtk.o
CC ui/x_keymap.o
VERT ui/shader/texture-blit-vert.h
VERT ui/shader/texture-blit-flip-vert.h
CC ui/console-gl.o
FRAG ui/shader/texture-blit-frag.h
CC ui/egl-helpers.o
CC ui/egl-context.o
CC ui/egl-headless.o
CC ui/gtk-gl-area.o
CC chardev/char.o
CC chardev/char-fd.o
CC chardev/char-fe.o
CC chardev/char-file.o
CC chardev/char-io.o
CC chardev/char-mux.o
CC chardev/char-null.o
CC chardev/char-parallel.o
CC chardev/char-pipe.o
CC chardev/char-pty.o
CC chardev/char-ringbuf.o
CC chardev/char-serial.o
CC chardev/char-socket.o
CC chardev/char-stdio.o
CC chardev/char-udp.o
CCAS s390-ccw/start.o
CC s390-ccw/main.o
LINK tests/qemu-iotests/socket_scm_helper
GEN qemu-doc.html
GEN qemu-doc.txt
CC s390-ccw/bootmap.o
GEN qemu.1
CC s390-ccw/sclp.o
GEN docs/interop/qemu-qmp-ref.html
CC s390-ccw/virtio.o
GEN docs/interop/qemu-qmp-ref.txt
CC s390-ccw/virtio-scsi.o
GEN docs/interop/qemu-qmp-ref.7
CC s390-ccw/virtio-blkdev.o
s390-netboot.img not built since roms/SLOF/ is not available.
BUILD s390-ccw/s390-ccw.elf
STRIP s390-ccw/s390-ccw.img
GEN docs/interop/qemu-ga-ref.html
GEN docs/interop/qemu-ga-ref.txt
GEN docs/interop/qemu-ga-ref.7
CC qga/commands.o
CC qga/guest-agent-command-state.o
CC qga/main.o
CC qga/commands-posix.o
CC qga/channel-posix.o
CC qga/qapi-generated/qga-qapi-types.o
CC qga/qapi-generated/qga-qapi-visit.o
CC qga/qapi-generated/qga-qmp-marshal.o
AR libqemuutil.a
CC qemu-img.o
LINK qemu-io
LINK fsdev/virtfs-proxy-helper
LINK scsi/qemu-pr-helper
LINK qemu-bridge-helper
CC ui/shader.o
LINK qemu-ga
LINK qemu-keymap
LINK ivshmem-client
LINK ivshmem-server
LINK qemu-nbd
GEN alpha-softmmu/hmp-commands.h
GEN alpha-softmmu/hmp-commands-info.h
GEN alpha-softmmu/config-target.h
GEN cris-softmmu/hmp-commands.h
GEN aarch64-softmmu/hmp-commands.h
GEN cris-softmmu/hmp-commands-info.h
CC alpha-softmmu/exec.o
GEN aarch64-softmmu/hmp-commands-info.h
GEN cris-softmmu/config-target.h
CC cris-softmmu/exec.o
GEN aarch64-softmmu/config-target.h
GEN arm-softmmu/hmp-commands.h
CC aarch64-softmmu/exec.o
GEN arm-softmmu/hmp-commands-info.h
GEN arm-softmmu/config-target.h
CC arm-softmmu/exec.o
CC arm-softmmu/tcg/tcg.o
CC cris-softmmu/tcg/tcg.o
CC alpha-softmmu/tcg/tcg.o
CC aarch64-softmmu/tcg/tcg.o
CC cris-softmmu/tcg/tcg-op.o
CC alpha-softmmu/tcg/tcg-op.o
CC arm-softmmu/tcg/tcg-op.o
CC aarch64-softmmu/tcg/tcg-op.o
CC alpha-softmmu/tcg/tcg-op-vec.o
CC cris-softmmu/tcg/tcg-op-vec.o
CC arm-softmmu/tcg/tcg-op-vec.o
CC cris-softmmu/tcg/tcg-op-gvec.o
CC alpha-softmmu/tcg/tcg-op-gvec.o
CC arm-softmmu/tcg/tcg-op-gvec.o
CC aarch64-softmmu/tcg/tcg-op-vec.o
CC alpha-softmmu/tcg/tcg-common.o
CC cris-softmmu/tcg/tcg-common.o
CC aarch64-softmmu/tcg/tcg-op-gvec.o
CC alpha-softmmu/tcg/optimize.o
CC cris-softmmu/tcg/optimize.o
CC arm-softmmu/tcg/tcg-common.o
CC alpha-softmmu/fpu/softfloat.o
CC arm-softmmu/tcg/optimize.o
CC cris-softmmu/fpu/softfloat.o
CC aarch64-softmmu/tcg/tcg-common.o
CC arm-softmmu/fpu/softfloat.o
CC aarch64-softmmu/tcg/optimize.o
CC aarch64-softmmu/fpu/softfloat.o
CC alpha-softmmu/disas.o
CC alpha-softmmu/arch_init.o
CC cris-softmmu/disas.o
CC alpha-softmmu/cpus.o
CC cris-softmmu/arch_init.o
CC arm-softmmu/disas.o
CC cris-softmmu/cpus.o
GEN arm-softmmu/gdbstub-xml.c
CC alpha-softmmu/monitor.o
CC cris-softmmu/monitor.o
CC arm-softmmu/arch_init.o
CC arm-softmmu/cpus.o
CC alpha-softmmu/gdbstub.o
CC arm-softmmu/monitor.o
CC aarch64-softmmu/disas.o
CC cris-softmmu/gdbstub.o
CC alpha-softmmu/balloon.o
CC alpha-softmmu/ioport.o
GEN aarch64-softmmu/gdbstub-xml.c
CC alpha-softmmu/numa.o
CC cris-softmmu/balloon.o
CC alpha-softmmu/qtest.o
CC cris-softmmu/ioport.o
CC aarch64-softmmu/arch_init.o
CC arm-softmmu/gdbstub.o
CC aarch64-softmmu/cpus.o
CC alpha-softmmu/memory.o
CC cris-softmmu/numa.o
CC aarch64-softmmu/monitor.o
CC arm-softmmu/balloon.o
CC cris-softmmu/qtest.o
CC cris-softmmu/memory.o
CC arm-softmmu/ioport.o
CC alpha-softmmu/memory_mapping.o
CC alpha-softmmu/dump.o
CC arm-softmmu/numa.o
CC aarch64-softmmu/gdbstub.o
CC cris-softmmu/memory_mapping.o
CC arm-softmmu/qtest.o
CC alpha-softmmu/migration/ram.o
CC cris-softmmu/dump.o
CC arm-softmmu/memory.o
CC aarch64-softmmu/balloon.o
CC alpha-softmmu/accel/accel.o
CC aarch64-softmmu/ioport.o
CC cris-softmmu/migration/ram.o
CC alpha-softmmu/accel/stubs/hax-stub.o
CC alpha-softmmu/accel/stubs/hvf-stub.o
CC aarch64-softmmu/numa.o
CC arm-softmmu/memory_mapping.o
CC aarch64-softmmu/qtest.o
CC alpha-softmmu/accel/stubs/whpx-stub.o
CC arm-softmmu/dump.o
CC cris-softmmu/accel/accel.o
CC alpha-softmmu/accel/stubs/kvm-stub.o
CC aarch64-softmmu/memory.o
CC alpha-softmmu/accel/tcg/tcg-all.o
CC cris-softmmu/accel/stubs/hax-stub.o
CC alpha-softmmu/accel/tcg/cputlb.o
CC cris-softmmu/accel/stubs/hvf-stub.o
CC arm-softmmu/migration/ram.o
CC cris-softmmu/accel/stubs/whpx-stub.o
CC aarch64-softmmu/memory_mapping.o
CC cris-softmmu/accel/stubs/kvm-stub.o
CC arm-softmmu/accel/accel.o
CC aarch64-softmmu/dump.o
CC arm-softmmu/accel/stubs/hax-stub.o
CC cris-softmmu/accel/tcg/tcg-all.o
CC arm-softmmu/accel/stubs/hvf-stub.o
CC alpha-softmmu/accel/tcg/tcg-runtime.o
CC cris-softmmu/accel/tcg/cputlb.o
CC arm-softmmu/accel/stubs/whpx-stub.o
CC alpha-softmmu/accel/tcg/tcg-runtime-gvec.o
CC aarch64-softmmu/migration/ram.o
CC arm-softmmu/accel/stubs/kvm-stub.o
CC arm-softmmu/accel/tcg/tcg-all.o
CC alpha-softmmu/accel/tcg/cpu-exec.o
CC arm-softmmu/accel/tcg/cputlb.o
CC aarch64-softmmu/accel/accel.o
CC alpha-softmmu/accel/tcg/cpu-exec-common.o
CC cris-softmmu/accel/tcg/tcg-runtime.o
CC aarch64-softmmu/accel/stubs/hax-stub.o
CC aarch64-softmmu/accel/stubs/hvf-stub.o
CC alpha-softmmu/accel/tcg/translate-all.o
CC cris-softmmu/accel/tcg/tcg-runtime-gvec.o
CC aarch64-softmmu/accel/stubs/whpx-stub.o
CC alpha-softmmu/accel/tcg/translator.o
CC aarch64-softmmu/accel/stubs/kvm-stub.o
CC alpha-softmmu/hw/9pfs/virtio-9p-device.o
CC aarch64-softmmu/accel/tcg/tcg-all.o
CC cris-softmmu/accel/tcg/cpu-exec.o
CC arm-softmmu/accel/tcg/tcg-runtime.o
CC alpha-softmmu/hw/block/virtio-blk.o
CC aarch64-softmmu/accel/tcg/cputlb.o
CC arm-softmmu/accel/tcg/tcg-runtime-gvec.o
CC cris-softmmu/accel/tcg/cpu-exec-common.o
CC alpha-softmmu/hw/block/vhost-user-blk.o
CC cris-softmmu/accel/tcg/translate-all.o
CC alpha-softmmu/hw/block/dataplane/virtio-blk.o
CC arm-softmmu/accel/tcg/cpu-exec.o
CC cris-softmmu/accel/tcg/translator.o
CC alpha-softmmu/hw/char/virtio-serial-bus.o
CC arm-softmmu/accel/tcg/cpu-exec-common.o
CC cris-softmmu/hw/core/generic-loader.o
CC aarch64-softmmu/accel/tcg/tcg-runtime.o
CC alpha-softmmu/hw/core/generic-loader.o
CC arm-softmmu/accel/tcg/translate-all.o
CC cris-softmmu/hw/core/null-machine.o
CC aarch64-softmmu/accel/tcg/tcg-runtime-gvec.o
CC alpha-softmmu/hw/core/null-machine.o
CC cris-softmmu/hw/misc/mmio_interface.o
CC arm-softmmu/accel/tcg/translator.o
CC cris-softmmu/hw/net/etraxfs_eth.o
CC alpha-softmmu/hw/display/vga.o
CC cris-softmmu/hw/net/vhost_net.o
CC arm-softmmu/hw/9pfs/virtio-9p-device.o
CC aarch64-softmmu/accel/tcg/cpu-exec.o
CC cris-softmmu/hw/net/rocker/qmp-norocker.o
CC arm-softmmu/hw/adc/stm32f2xx_adc.o
CC cris-softmmu/hw/vfio/common.o
CC aarch64-softmmu/accel/tcg/cpu-exec-common.o
CC arm-softmmu/hw/block/virtio-blk.o
CC alpha-softmmu/hw/display/virtio-gpu.o
CC aarch64-softmmu/accel/tcg/translate-all.o
CC cris-softmmu/hw/vfio/platform.o
CC arm-softmmu/hw/block/vhost-user-blk.o
CC arm-softmmu/hw/block/dataplane/virtio-blk.o
CC aarch64-softmmu/accel/tcg/translator.o
CC alpha-softmmu/hw/display/virtio-gpu-3d.o
CC cris-softmmu/hw/vfio/spapr.o
CC arm-softmmu/hw/char/exynos4210_uart.o
CC cris-softmmu/hw/cris/boot.o
CC alpha-softmmu/hw/display/virtio-gpu-pci.o
CC aarch64-softmmu/hw/9pfs/virtio-9p-device.o
CC arm-softmmu/hw/char/omap_uart.o
CC cris-softmmu/hw/cris/axis_dev88.o
CC aarch64-softmmu/hw/adc/stm32f2xx_adc.o
CC alpha-softmmu/hw/misc/ivshmem.o
CC arm-softmmu/hw/char/digic-uart.o
CC cris-softmmu/target/cris/translate.o
CC aarch64-softmmu/hw/block/virtio-blk.o
CC arm-softmmu/hw/char/stm32f2xx_usart.o
CC alpha-softmmu/hw/misc/mmio_interface.o
CC arm-softmmu/hw/char/bcm2835_aux.o
CC alpha-softmmu/hw/net/virtio-net.o
CC aarch64-softmmu/hw/block/vhost-user-blk.o
CC arm-softmmu/hw/char/virtio-serial-bus.o
CC aarch64-softmmu/hw/block/dataplane/virtio-blk.o
CC alpha-softmmu/hw/net/vhost_net.o
CC arm-softmmu/hw/core/generic-loader.o
CC aarch64-softmmu/hw/char/exynos4210_uart.o
CC alpha-softmmu/hw/scsi/virtio-scsi.o
CC cris-softmmu/target/cris/op_helper.o
CC arm-softmmu/hw/core/null-machine.o
CC aarch64-softmmu/hw/char/omap_uart.o
CC arm-softmmu/hw/cpu/arm11mpcore.o
CC cris-softmmu/target/cris/helper.o
CC alpha-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC arm-softmmu/hw/cpu/realview_mpcore.o
CC aarch64-softmmu/hw/char/digic-uart.o
CC cris-softmmu/target/cris/cpu.o
CC arm-softmmu/hw/cpu/a9mpcore.o
CC alpha-softmmu/hw/scsi/vhost-scsi-common.o
CC aarch64-softmmu/hw/char/stm32f2xx_usart.o
CC cris-softmmu/target/cris/gdbstub.o
CC arm-softmmu/hw/cpu/a15mpcore.o
CC aarch64-softmmu/hw/char/bcm2835_aux.o
CC alpha-softmmu/hw/scsi/vhost-scsi.o
CC cris-softmmu/target/cris/mmu.o
CC arm-softmmu/hw/display/omap_dss.o
CC aarch64-softmmu/hw/char/virtio-serial-bus.o
CC cris-softmmu/target/cris/machine.o
CC alpha-softmmu/hw/scsi/vhost-user-scsi.o
GEN trace/generated-helpers.c
CC cris-softmmu/trace/control-target.o
CC arm-softmmu/hw/display/omap_lcdc.o
CC alpha-softmmu/hw/timer/mc146818rtc.o
CC cris-softmmu/trace/generated-helpers.o
CC aarch64-softmmu/hw/core/generic-loader.o
CC alpha-softmmu/hw/vfio/common.o
CC arm-softmmu/hw/display/pxa2xx_lcd.o
CC aarch64-softmmu/hw/core/null-machine.o
LINK cris-softmmu/qemu-system-cris
CC aarch64-softmmu/hw/cpu/arm11mpcore.o
CC alpha-softmmu/hw/vfio/pci.o
CC aarch64-softmmu/hw/cpu/realview_mpcore.o
CC aarch64-softmmu/hw/cpu/a9mpcore.o
CC arm-softmmu/hw/display/bcm2835_fb.o
CC aarch64-softmmu/hw/cpu/a15mpcore.o
CC aarch64-softmmu/hw/display/omap_dss.o
CC aarch64-softmmu/hw/display/omap_lcdc.o
CC alpha-softmmu/hw/vfio/pci-quirks.o
CC aarch64-softmmu/hw/display/pxa2xx_lcd.o
CC aarch64-softmmu/hw/display/bcm2835_fb.o
CC aarch64-softmmu/hw/display/vga.o
CC aarch64-softmmu/hw/display/virtio-gpu.o
GEN hppa-softmmu/hmp-commands.h
GEN hppa-softmmu/hmp-commands-info.h
GEN hppa-softmmu/config-target.h
CC hppa-softmmu/exec.o
CC hppa-softmmu/tcg/tcg.o
CC hppa-softmmu/tcg/tcg-op.o
CC hppa-softmmu/tcg/tcg-op-vec.o
CC hppa-softmmu/tcg/tcg-op-gvec.o
CC hppa-softmmu/tcg/tcg-common.o
CC hppa-softmmu/tcg/optimize.o
CC hppa-softmmu/fpu/softfloat.o
CC hppa-softmmu/disas.o
CC hppa-softmmu/arch_init.o
CC hppa-softmmu/cpus.o
CC hppa-softmmu/monitor.o
CC hppa-softmmu/gdbstub.o
CC hppa-softmmu/balloon.o
CC hppa-softmmu/ioport.o
CC hppa-softmmu/numa.o
CC hppa-softmmu/qtest.o
CC hppa-softmmu/memory.o
CC hppa-softmmu/memory_mapping.o
CC hppa-softmmu/dump.o
CC hppa-softmmu/migration/ram.o
CC hppa-softmmu/accel/accel.o
CC hppa-softmmu/accel/stubs/hax-stub.o
CC hppa-softmmu/accel/stubs/hvf-stub.o
CC hppa-softmmu/accel/stubs/whpx-stub.o
CC hppa-softmmu/accel/stubs/kvm-stub.o
CC hppa-softmmu/accel/tcg/tcg-all.o
CC hppa-softmmu/accel/tcg/cputlb.o
CC hppa-softmmu/accel/tcg/tcg-runtime.o
CC hppa-softmmu/accel/tcg/tcg-runtime-gvec.o
CC hppa-softmmu/accel/tcg/cpu-exec.o
CC hppa-softmmu/accel/tcg/cpu-exec-common.o
CC hppa-softmmu/accel/tcg/translate-all.o
CC hppa-softmmu/accel/tcg/translator.o
CC hppa-softmmu/hw/9pfs/virtio-9p-device.o
CC hppa-softmmu/hw/block/virtio-blk.o
CC hppa-softmmu/hw/block/vhost-user-blk.o
CC hppa-softmmu/hw/block/dataplane/virtio-blk.o
CC hppa-softmmu/hw/char/virtio-serial-bus.o
CC hppa-softmmu/hw/core/generic-loader.o
CC hppa-softmmu/hw/core/null-machine.o
CC hppa-softmmu/hw/display/vga.o
CC hppa-softmmu/hw/display/virtio-gpu.o
CC hppa-softmmu/hw/display/virtio-gpu-3d.o
CC hppa-softmmu/hw/display/virtio-gpu-pci.o
CC hppa-softmmu/hw/display/virtio-vga.o
CC hppa-softmmu/hw/misc/ivshmem.o
CC hppa-softmmu/hw/misc/mmio_interface.o
CC hppa-softmmu/hw/net/virtio-net.o
CC hppa-softmmu/hw/net/vhost_net.o
CC hppa-softmmu/hw/scsi/virtio-scsi.o
CC hppa-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC hppa-softmmu/hw/scsi/vhost-scsi-common.o
CC hppa-softmmu/hw/scsi/vhost-scsi.o
CC hppa-softmmu/hw/scsi/vhost-user-scsi.o
CC hppa-softmmu/hw/timer/mc146818rtc.o
CC hppa-softmmu/hw/vfio/common.o
CC hppa-softmmu/hw/vfio/pci.o
CC hppa-softmmu/hw/vfio/pci-quirks.o
CC hppa-softmmu/hw/vfio/platform.o
CC hppa-softmmu/hw/vfio/spapr.o
CC hppa-softmmu/hw/virtio/virtio.o
CC hppa-softmmu/hw/virtio/virtio-balloon.o
CC hppa-softmmu/hw/virtio/vhost.o
CC hppa-softmmu/hw/virtio/vhost-backend.o
CC hppa-softmmu/hw/virtio/vhost-user.o
CC hppa-softmmu/hw/virtio/vhost-vsock.o
CC hppa-softmmu/hw/virtio/virtio-crypto.o
CC hppa-softmmu/hw/virtio/virtio-crypto-pci.o
CC hppa-softmmu/hw/hppa/machine.o
CC hppa-softmmu/hw/hppa/pci.o
CC hppa-softmmu/hw/hppa/dino.o
CC hppa-softmmu/target/hppa/translate.o
CC hppa-softmmu/target/hppa/helper.o
CC hppa-softmmu/target/hppa/cpu.o
CC hppa-softmmu/target/hppa/op_helper.o
CC hppa-softmmu/target/hppa/gdbstub.o
CC hppa-softmmu/target/hppa/mem_helper.o
CC hppa-softmmu/target/hppa/int_helper.o
CC hppa-softmmu/target/hppa/machine.o
GEN trace/generated-helpers.c
CC hppa-softmmu/trace/control-target.o
CC hppa-softmmu/trace/generated-helpers.o
LINK hppa-softmmu/qemu-system-hppa
CC arm-softmmu/hw/display/vga.o
CC aarch64-softmmu/hw/display/virtio-gpu-3d.o
CC aarch64-softmmu/hw/display/virtio-gpu-pci.o
CC aarch64-softmmu/hw/display/dpcd.o
CC aarch64-softmmu/hw/display/xlnx_dp.o
CC aarch64-softmmu/hw/dma/xlnx_dpdma.o
CC aarch64-softmmu/hw/dma/omap_dma.o
CC aarch64-softmmu/hw/dma/soc_dma.o
CC aarch64-softmmu/hw/dma/pxa2xx_dma.o
CC aarch64-softmmu/hw/dma/bcm2835_dma.o
CC aarch64-softmmu/hw/gpio/omap_gpio.o
CC aarch64-softmmu/hw/gpio/imx_gpio.o
CC aarch64-softmmu/hw/gpio/bcm2835_gpio.o
CC aarch64-softmmu/hw/i2c/omap_i2c.o
CC aarch64-softmmu/hw/input/pxa2xx_keypad.o
CC aarch64-softmmu/hw/input/tsc210x.o
GEN i386-softmmu/hmp-commands.h
GEN i386-softmmu/hmp-commands-info.h
GEN i386-softmmu/config-target.h
CC i386-softmmu/exec.o
CC i386-softmmu/tcg/tcg.o
CC i386-softmmu/tcg/tcg-op.o
CC i386-softmmu/tcg/tcg-op-vec.o
CC i386-softmmu/tcg/tcg-op-gvec.o
CC i386-softmmu/tcg/tcg-common.o
CC i386-softmmu/tcg/optimize.o
CC i386-softmmu/fpu/softfloat.o
CC i386-softmmu/disas.o
GEN i386-softmmu/gdbstub-xml.c
CC i386-softmmu/arch_init.o
CC i386-softmmu/cpus.o
CC i386-softmmu/monitor.o
CC i386-softmmu/gdbstub.o
CC i386-softmmu/balloon.o
CC i386-softmmu/ioport.o
CC i386-softmmu/numa.o
CC i386-softmmu/qtest.o
CC i386-softmmu/memory.o
CC i386-softmmu/memory_mapping.o
CC i386-softmmu/dump.o
CC i386-softmmu/migration/ram.o
CC i386-softmmu/accel/accel.o
CC i386-softmmu/accel/stubs/hax-stub.o
CC i386-softmmu/accel/stubs/hvf-stub.o
CC i386-softmmu/accel/stubs/whpx-stub.o
CC i386-softmmu/accel/stubs/kvm-stub.o
CC i386-softmmu/accel/tcg/tcg-all.o
CC i386-softmmu/accel/tcg/cputlb.o
CC i386-softmmu/accel/tcg/tcg-runtime.o
CC i386-softmmu/accel/tcg/tcg-runtime-gvec.o
CC i386-softmmu/accel/tcg/cpu-exec.o
CC i386-softmmu/accel/tcg/cpu-exec-common.o
CC i386-softmmu/accel/tcg/translate-all.o
CC i386-softmmu/accel/tcg/translator.o
CC i386-softmmu/hw/9pfs/virtio-9p-device.o
CC i386-softmmu/hw/block/virtio-blk.o
CC i386-softmmu/hw/block/vhost-user-blk.o
CC i386-softmmu/hw/block/dataplane/virtio-blk.o
CC i386-softmmu/hw/char/virtio-serial-bus.o
CC i386-softmmu/hw/core/generic-loader.o
CC i386-softmmu/hw/core/null-machine.o
CC i386-softmmu/hw/display/vga.o
CC i386-softmmu/hw/display/virtio-gpu.o
CC i386-softmmu/hw/display/virtio-gpu-3d.o
CC i386-softmmu/hw/display/virtio-gpu-pci.o
CC i386-softmmu/hw/display/virtio-vga.o
CC i386-softmmu/hw/intc/apic.o
CC i386-softmmu/hw/intc/apic_common.o
CC i386-softmmu/hw/intc/ioapic.o
CC i386-softmmu/hw/isa/lpc_ich9.o
CC i386-softmmu/hw/misc/ivshmem.o
CC i386-softmmu/hw/misc/pvpanic.o
CC i386-softmmu/hw/misc/mmio_interface.o
CC i386-softmmu/hw/net/virtio-net.o
CC i386-softmmu/hw/net/vhost_net.o
CC i386-softmmu/hw/scsi/virtio-scsi.o
CC i386-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC i386-softmmu/hw/scsi/vhost-scsi-common.o
CC i386-softmmu/hw/scsi/vhost-scsi.o
CC i386-softmmu/hw/scsi/vhost-user-scsi.o
CC i386-softmmu/hw/timer/mc146818rtc.o
CC i386-softmmu/hw/vfio/common.o
CC i386-softmmu/hw/vfio/pci.o
CC i386-softmmu/hw/vfio/pci-quirks.o
CC i386-softmmu/hw/vfio/platform.o
CC i386-softmmu/hw/vfio/spapr.o
CC i386-softmmu/hw/virtio/virtio.o
CC i386-softmmu/hw/virtio/virtio-balloon.o
CC i386-softmmu/hw/virtio/vhost.o
CC i386-softmmu/hw/virtio/vhost-backend.o
CC i386-softmmu/hw/virtio/vhost-user.o
CC i386-softmmu/hw/virtio/vhost-vsock.o
CC i386-softmmu/hw/virtio/virtio-crypto.o
CC i386-softmmu/hw/virtio/virtio-crypto-pci.o
CC i386-softmmu/hw/i386/multiboot.o
CC i386-softmmu/hw/i386/pc.o
CC i386-softmmu/hw/i386/pc_piix.o
CC i386-softmmu/hw/i386/pc_q35.o
CC i386-softmmu/hw/i386/pc_sysfw.o
CC i386-softmmu/hw/i386/x86-iommu.o
CC i386-softmmu/hw/i386/intel_iommu.o
CC i386-softmmu/hw/i386/amd_iommu.o
CC i386-softmmu/hw/i386/vmport.o
CC i386-softmmu/hw/i386/vmmouse.o
CC i386-softmmu/hw/i386/kvmvapic.o
CC i386-softmmu/hw/i386/acpi-build.o
CC i386-softmmu/target/i386/helper.o
CC i386-softmmu/target/i386/cpu.o
CC i386-softmmu/target/i386/gdbstub.o
CC i386-softmmu/target/i386/xsave_helper.o
CC i386-softmmu/target/i386/translate.o
CC i386-softmmu/target/i386/bpt_helper.o
CC i386-softmmu/target/i386/cc_helper.o
CC i386-softmmu/target/i386/excp_helper.o
CC i386-softmmu/target/i386/fpu_helper.o
CC i386-softmmu/target/i386/int_helper.o
CC i386-softmmu/target/i386/mem_helper.o
CC i386-softmmu/target/i386/misc_helper.o
CC i386-softmmu/target/i386/mpx_helper.o
CC i386-softmmu/target/i386/seg_helper.o
CC i386-softmmu/target/i386/smm_helper.o
CC i386-softmmu/target/i386/svm_helper.o
CC i386-softmmu/target/i386/machine.o
CC i386-softmmu/target/i386/arch_memory_mapping.o
CC i386-softmmu/target/i386/arch_dump.o
CC i386-softmmu/target/i386/monitor.o
CC i386-softmmu/target/i386/kvm-stub.o
GEN trace/generated-helpers.c
CC i386-softmmu/trace/control-target.o
CC i386-softmmu/gdbstub-xml.o
CC i386-softmmu/trace/generated-helpers.o
LINK i386-softmmu/qemu-system-i386
CC aarch64-softmmu/hw/intc/exynos4210_gic.o
CC aarch64-softmmu/hw/intc/armv7m_nvic.o
CC arm-softmmu/hw/display/virtio-gpu.o
CC aarch64-softmmu/hw/intc/exynos4210_combiner.o
CC aarch64-softmmu/hw/intc/omap_intc.o
CC arm-softmmu/hw/display/virtio-gpu-3d.o
CC aarch64-softmmu/hw/intc/bcm2835_ic.o
CC arm-softmmu/hw/display/virtio-gpu-pci.o
GEN lm32-softmmu/hmp-commands.h
GEN lm32-softmmu/hmp-commands-info.h
GEN lm32-softmmu/config-target.h
CC lm32-softmmu/exec.o
CC lm32-softmmu/tcg/tcg.o
CC lm32-softmmu/tcg/tcg-op.o
CC lm32-softmmu/tcg/tcg-op-vec.o
CC lm32-softmmu/tcg/tcg-op-gvec.o
CC lm32-softmmu/tcg/tcg-common.o
CC lm32-softmmu/tcg/optimize.o
CC lm32-softmmu/fpu/softfloat.o
CC lm32-softmmu/disas.o
CC lm32-softmmu/arch_init.o
CC lm32-softmmu/cpus.o
CC lm32-softmmu/monitor.o
CC lm32-softmmu/gdbstub.o
CC lm32-softmmu/balloon.o
CC lm32-softmmu/ioport.o
CC lm32-softmmu/numa.o
CC lm32-softmmu/qtest.o
CC lm32-softmmu/memory.o
CC lm32-softmmu/memory_mapping.o
CC lm32-softmmu/dump.o
CC lm32-softmmu/migration/ram.o
CC lm32-softmmu/accel/accel.o
CC lm32-softmmu/accel/stubs/hax-stub.o
CC lm32-softmmu/accel/stubs/hvf-stub.o
CC lm32-softmmu/accel/stubs/whpx-stub.o
CC lm32-softmmu/accel/stubs/kvm-stub.o
CC lm32-softmmu/accel/tcg/tcg-all.o
CC lm32-softmmu/accel/tcg/cputlb.o
CC lm32-softmmu/accel/tcg/tcg-runtime.o
CC lm32-softmmu/accel/tcg/tcg-runtime-gvec.o
CC lm32-softmmu/accel/tcg/cpu-exec.o
CC lm32-softmmu/accel/tcg/cpu-exec-common.o
CC lm32-softmmu/accel/tcg/translate-all.o
CC lm32-softmmu/accel/tcg/translator.o
CC lm32-softmmu/hw/core/generic-loader.o
CC lm32-softmmu/hw/core/null-machine.o
CC lm32-softmmu/hw/input/milkymist-softusb.o
CC lm32-softmmu/hw/misc/milkymist-hpdmc.o
CC lm32-softmmu/hw/misc/milkymist-pfpu.o
CC lm32-softmmu/hw/misc/mmio_interface.o
CC lm32-softmmu/hw/net/milkymist-minimac2.o
CC lm32-softmmu/hw/net/vhost_net.o
CC lm32-softmmu/hw/net/rocker/qmp-norocker.o
CC lm32-softmmu/hw/sd/milkymist-memcard.o
CC lm32-softmmu/hw/vfio/common.o
CC lm32-softmmu/hw/vfio/platform.o
CC lm32-softmmu/hw/vfio/spapr.o
CC lm32-softmmu/hw/lm32/lm32_boards.o
CC lm32-softmmu/hw/lm32/milkymist.o
CC lm32-softmmu/target/lm32/translate.o
CC lm32-softmmu/target/lm32/op_helper.o
CC lm32-softmmu/target/lm32/helper.o
CC lm32-softmmu/target/lm32/cpu.o
CC lm32-softmmu/target/lm32/gdbstub.o
CC lm32-softmmu/target/lm32/lm32-semi.o
CC lm32-softmmu/target/lm32/machine.o
GEN trace/generated-helpers.c
CC lm32-softmmu/trace/control-target.o
CC lm32-softmmu/trace/generated-helpers.o
LINK lm32-softmmu/qemu-system-lm32
CC arm-softmmu/hw/dma/omap_dma.o
GEN m68k-softmmu/hmp-commands.h
GEN m68k-softmmu/hmp-commands-info.h
GEN m68k-softmmu/config-target.h
CC m68k-softmmu/exec.o
CC arm-softmmu/hw/dma/soc_dma.o
CC arm-softmmu/hw/dma/pxa2xx_dma.o
CC arm-softmmu/hw/dma/bcm2835_dma.o
CC arm-softmmu/hw/gpio/omap_gpio.o
CC arm-softmmu/hw/gpio/imx_gpio.o
CC arm-softmmu/hw/gpio/bcm2835_gpio.o
CC arm-softmmu/hw/i2c/omap_i2c.o
CC m68k-softmmu/tcg/tcg.o
CC arm-softmmu/hw/input/pxa2xx_keypad.o
CC arm-softmmu/hw/input/tsc210x.o
CC arm-softmmu/hw/intc/armv7m_nvic.o
CC m68k-softmmu/tcg/tcg-op.o
CC arm-softmmu/hw/intc/exynos4210_gic.o
CC arm-softmmu/hw/intc/exynos4210_combiner.o
CC arm-softmmu/hw/intc/omap_intc.o
CC arm-softmmu/hw/intc/bcm2835_ic.o
CC arm-softmmu/hw/intc/bcm2836_control.o
CC arm-softmmu/hw/intc/allwinner-a10-pic.o
CC m68k-softmmu/tcg/tcg-op-vec.o
CC arm-softmmu/hw/intc/aspeed_vic.o
CC m68k-softmmu/tcg/tcg-op-gvec.o
CC arm-softmmu/hw/intc/arm_gicv3_cpuif.o
CC arm-softmmu/hw/misc/ivshmem.o
CC m68k-softmmu/tcg/tcg-common.o
CC arm-softmmu/hw/misc/arm_sysctl.o
CC m68k-softmmu/tcg/optimize.o
CC arm-softmmu/hw/misc/cbus.o
CC arm-softmmu/hw/misc/exynos4210_pmu.o
CC arm-softmmu/hw/misc/exynos4210_clk.o
CC m68k-softmmu/fpu/softfloat.o
CC arm-softmmu/hw/misc/exynos4210_rng.o
CC arm-softmmu/hw/misc/imx_ccm.o
CC arm-softmmu/hw/misc/imx31_ccm.o
CC arm-softmmu/hw/misc/imx25_ccm.o
CC arm-softmmu/hw/misc/imx6_ccm.o
CC arm-softmmu/hw/misc/imx6_src.o
CC arm-softmmu/hw/misc/imx7_ccm.o
CC arm-softmmu/hw/misc/imx2_wdt.o
CC arm-softmmu/hw/misc/imx7_snvs.o
CC arm-softmmu/hw/misc/imx7_gpr.o
CC arm-softmmu/hw/misc/mst_fpga.o
CC arm-softmmu/hw/misc/omap_clk.o
CC arm-softmmu/hw/misc/omap_gpmc.o
CC arm-softmmu/hw/misc/omap_l4.o
CC arm-softmmu/hw/misc/omap_sdrc.o
CC arm-softmmu/hw/misc/omap_tap.o
CC m68k-softmmu/disas.o
CC arm-softmmu/hw/misc/bcm2835_mbox.o
GEN m68k-softmmu/gdbstub-xml.c
CC arm-softmmu/hw/misc/bcm2835_property.o
CC m68k-softmmu/arch_init.o
CC m68k-softmmu/cpus.o
CC arm-softmmu/hw/misc/bcm2835_rng.o
CC arm-softmmu/hw/misc/zynq_slcr.o
CC m68k-softmmu/monitor.o
CC arm-softmmu/hw/misc/zynq-xadc.o
CC arm-softmmu/hw/misc/stm32f2xx_syscfg.o
CC arm-softmmu/hw/misc/mps2-scc.o
CC arm-softmmu/hw/misc/aspeed_scu.o
CC arm-softmmu/hw/misc/aspeed_sdmc.o
CC arm-softmmu/hw/misc/mmio_interface.o
CC m68k-softmmu/gdbstub.o
CC arm-softmmu/hw/misc/msf2-sysreg.o
CC arm-softmmu/hw/net/virtio-net.o
CC m68k-softmmu/balloon.o
CC m68k-softmmu/ioport.o
CC arm-softmmu/hw/net/vhost_net.o
CC arm-softmmu/hw/pcmcia/pxa2xx.o
CC m68k-softmmu/numa.o
CC arm-softmmu/hw/scsi/virtio-scsi.o
CC m68k-softmmu/qtest.o
CC arm-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC m68k-softmmu/memory.o
CC arm-softmmu/hw/scsi/vhost-scsi-common.o
CC arm-softmmu/hw/scsi/vhost-scsi.o
CC arm-softmmu/hw/scsi/vhost-user-scsi.o
CC arm-softmmu/hw/sd/omap_mmc.o
CC m68k-softmmu/memory_mapping.o
CC arm-softmmu/hw/sd/pxa2xx_mmci.o
CC m68k-softmmu/dump.o
CC arm-softmmu/hw/sd/bcm2835_sdhost.o
CC arm-softmmu/hw/ssi/omap_spi.o
CC arm-softmmu/hw/ssi/imx_spi.o
CC m68k-softmmu/migration/ram.o
CC arm-softmmu/hw/timer/exynos4210_mct.o
CC arm-softmmu/hw/timer/exynos4210_pwm.o
CC arm-softmmu/hw/timer/exynos4210_rtc.o
CC m68k-softmmu/accel/accel.o
CC arm-softmmu/hw/timer/omap_gptimer.o
CC m68k-softmmu/accel/stubs/hax-stub.o
CC m68k-softmmu/accel/stubs/hvf-stub.o
CC arm-softmmu/hw/timer/omap_synctimer.o
CC m68k-softmmu/accel/stubs/whpx-stub.o
CC arm-softmmu/hw/timer/pxa2xx_timer.o
CC m68k-softmmu/accel/stubs/kvm-stub.o
CC m68k-softmmu/accel/tcg/tcg-all.o
CC arm-softmmu/hw/timer/digic-timer.o
CC m68k-softmmu/accel/tcg/cputlb.o
CC arm-softmmu/hw/timer/allwinner-a10-pit.o
CC arm-softmmu/hw/usb/tusb6010.o
CC arm-softmmu/hw/usb/chipidea.o
CC arm-softmmu/hw/vfio/common.o
CC arm-softmmu/hw/vfio/pci.o
CC m68k-softmmu/accel/tcg/tcg-runtime.o
CC m68k-softmmu/accel/tcg/tcg-runtime-gvec.o
CC arm-softmmu/hw/vfio/pci-quirks.o
CC m68k-softmmu/accel/tcg/cpu-exec.o
CC arm-softmmu/hw/vfio/platform.o
CC m68k-softmmu/accel/tcg/cpu-exec-common.o
CC m68k-softmmu/accel/tcg/translate-all.o
CC arm-softmmu/hw/vfio/calxeda-xgmac.o
CC arm-softmmu/hw/vfio/amd-xgbe.o
CC arm-softmmu/hw/vfio/spapr.o
CC m68k-softmmu/accel/tcg/translator.o
CC arm-softmmu/hw/virtio/virtio.o
CC m68k-softmmu/hw/char/mcf_uart.o
CC m68k-softmmu/hw/core/generic-loader.o
CC m68k-softmmu/hw/core/null-machine.o
CC m68k-softmmu/hw/misc/mmio_interface.o
CC arm-softmmu/hw/virtio/virtio-balloon.o
CC m68k-softmmu/hw/net/mcf_fec.o
CC arm-softmmu/hw/virtio/vhost.o
CC m68k-softmmu/hw/net/vhost_net.o
CC m68k-softmmu/hw/net/rocker/qmp-norocker.o
CC m68k-softmmu/hw/vfio/common.o
CC arm-softmmu/hw/virtio/vhost-backend.o
CC arm-softmmu/hw/virtio/vhost-user.o
CC m68k-softmmu/hw/vfio/platform.o
CC arm-softmmu/hw/virtio/vhost-vsock.o
CC m68k-softmmu/hw/vfio/spapr.o
CC arm-softmmu/hw/virtio/virtio-crypto.o
CC m68k-softmmu/hw/m68k/an5206.o
CC m68k-softmmu/hw/m68k/mcf5208.o
CC arm-softmmu/hw/virtio/virtio-crypto-pci.o
CC m68k-softmmu/hw/m68k/mcf5206.o
CC arm-softmmu/hw/arm/boot.o
CC m68k-softmmu/hw/m68k/mcf_intc.o
CC m68k-softmmu/target/m68k/m68k-semi.o
CC arm-softmmu/hw/arm/collie.o
CC m68k-softmmu/target/m68k/translate.o
CC arm-softmmu/hw/arm/exynos4_boards.o
CC arm-softmmu/hw/arm/gumstix.o
CC arm-softmmu/hw/arm/highbank.o
CC arm-softmmu/hw/arm/digic_boards.o
CC arm-softmmu/hw/arm/integratorcp.o
CC arm-softmmu/hw/arm/mainstone.o
CC arm-softmmu/hw/arm/musicpal.o
CC arm-softmmu/hw/arm/nseries.o
CC arm-softmmu/hw/arm/omap_sx1.o
CC m68k-softmmu/target/m68k/op_helper.o
CC arm-softmmu/hw/arm/palm.o
CC arm-softmmu/hw/arm/realview.o
CC m68k-softmmu/target/m68k/helper.o
CC arm-softmmu/hw/arm/spitz.o
CC m68k-softmmu/target/m68k/cpu.o
CC arm-softmmu/hw/arm/stellaris.o
CC m68k-softmmu/target/m68k/fpu_helper.o
CC arm-softmmu/hw/arm/tosa.o
CC m68k-softmmu/target/m68k/gdbstub.o
CC arm-softmmu/hw/arm/versatilepb.o
CC m68k-softmmu/target/m68k/monitor.o
GEN trace/generated-helpers.c
CC arm-softmmu/hw/arm/vexpress.o
CC m68k-softmmu/trace/control-target.o
CC m68k-softmmu/gdbstub-xml.o
CC arm-softmmu/hw/arm/virt.o
CC m68k-softmmu/trace/generated-helpers.o
LINK m68k-softmmu/qemu-system-m68k
CC arm-softmmu/hw/arm/xilinx_zynq.o
CC arm-softmmu/hw/arm/z2.o
CC arm-softmmu/hw/arm/virt-acpi-build.o
GEN microblazeel-softmmu/hmp-commands.h
GEN microblazeel-softmmu/hmp-commands-info.h
GEN microblazeel-softmmu/config-target.h
CC microblazeel-softmmu/exec.o
CC microblazeel-softmmu/tcg/tcg.o
CC microblazeel-softmmu/tcg/tcg-op.o
CC microblazeel-softmmu/tcg/tcg-op-vec.o
CC microblazeel-softmmu/tcg/tcg-op-gvec.o
CC microblazeel-softmmu/tcg/tcg-common.o
CC microblazeel-softmmu/tcg/optimize.o
CC microblazeel-softmmu/fpu/softfloat.o
CC microblazeel-softmmu/disas.o
CC microblazeel-softmmu/arch_init.o
CC microblazeel-softmmu/cpus.o
CC microblazeel-softmmu/monitor.o
CC microblazeel-softmmu/gdbstub.o
CC microblazeel-softmmu/balloon.o
CC microblazeel-softmmu/ioport.o
CC microblazeel-softmmu/numa.o
CC microblazeel-softmmu/qtest.o
CC microblazeel-softmmu/memory.o
CC microblazeel-softmmu/memory_mapping.o
CC microblazeel-softmmu/dump.o
CC microblazeel-softmmu/migration/ram.o
CC microblazeel-softmmu/accel/accel.o
CC microblazeel-softmmu/accel/stubs/hax-stub.o
CC microblazeel-softmmu/accel/stubs/hvf-stub.o
CC microblazeel-softmmu/accel/stubs/whpx-stub.o
CC microblazeel-softmmu/accel/stubs/kvm-stub.o
CC microblazeel-softmmu/accel/tcg/tcg-all.o
CC microblazeel-softmmu/accel/tcg/cputlb.o
CC microblazeel-softmmu/accel/tcg/tcg-runtime.o
CC microblazeel-softmmu/accel/tcg/tcg-runtime-gvec.o
CC microblazeel-softmmu/accel/tcg/cpu-exec.o
CC microblazeel-softmmu/accel/tcg/cpu-exec-common.o
CC microblazeel-softmmu/accel/tcg/translate-all.o
CC microblazeel-softmmu/accel/tcg/translator.o
CC microblazeel-softmmu/hw/core/generic-loader.o
CC microblazeel-softmmu/hw/core/null-machine.o
CC microblazeel-softmmu/hw/dma/xlnx_dpdma.o
CC microblazeel-softmmu/hw/misc/mmio_interface.o
CC microblazeel-softmmu/hw/net/xilinx_ethlite.o
CC microblazeel-softmmu/hw/net/vhost_net.o
CC microblazeel-softmmu/hw/net/rocker/qmp-norocker.o
CC microblazeel-softmmu/hw/vfio/common.o
CC microblazeel-softmmu/hw/vfio/platform.o
CC microblazeel-softmmu/hw/vfio/spapr.o
CC microblazeel-softmmu/hw/microblaze/petalogix_s3adsp1800_mmu.o
CC microblazeel-softmmu/hw/microblaze/petalogix_ml605_mmu.o
CC microblazeel-softmmu/hw/microblaze/xlnx-zynqmp-pmu.o
CC microblazeel-softmmu/hw/microblaze/boot.o
CC microblazeel-softmmu/target/microblaze/translate.o
CC microblazeel-softmmu/target/microblaze/op_helper.o
CC microblazeel-softmmu/target/microblaze/helper.o
CC microblazeel-softmmu/target/microblaze/cpu.o
CC microblazeel-softmmu/target/microblaze/gdbstub.o
CC microblazeel-softmmu/target/microblaze/mmu.o
GEN trace/generated-helpers.c
CC microblazeel-softmmu/trace/control-target.o
CC microblazeel-softmmu/trace/generated-helpers.o
LINK microblazeel-softmmu/qemu-system-microblazeel
CC alpha-softmmu/hw/vfio/platform.o
GEN microblaze-softmmu/hmp-commands.h
GEN microblaze-softmmu/hmp-commands-info.h
GEN microblaze-softmmu/config-target.h
CC microblaze-softmmu/exec.o
CC alpha-softmmu/hw/vfio/spapr.o
CC alpha-softmmu/hw/virtio/virtio.o
CC alpha-softmmu/hw/virtio/virtio-balloon.o
CC alpha-softmmu/hw/virtio/vhost.o
CC microblaze-softmmu/tcg/tcg.o
CC alpha-softmmu/hw/virtio/vhost-backend.o
CC alpha-softmmu/hw/virtio/vhost-user.o
CC alpha-softmmu/hw/virtio/vhost-vsock.o
CC alpha-softmmu/hw/virtio/virtio-crypto.o
CC alpha-softmmu/hw/virtio/virtio-crypto-pci.o
CC microblaze-softmmu/tcg/tcg-op.o
CC alpha-softmmu/hw/alpha/dp264.o
CC alpha-softmmu/hw/alpha/pci.o
CC alpha-softmmu/hw/alpha/typhoon.o
CC alpha-softmmu/target/alpha/machine.o
CC alpha-softmmu/target/alpha/translate.o
CC microblaze-softmmu/tcg/tcg-op-vec.o
CC microblaze-softmmu/tcg/tcg-op-gvec.o
CC alpha-softmmu/target/alpha/helper.o
CC alpha-softmmu/target/alpha/cpu.o
CC microblaze-softmmu/tcg/tcg-common.o
CC microblaze-softmmu/tcg/optimize.o
CC alpha-softmmu/target/alpha/int_helper.o
CC alpha-softmmu/target/alpha/fpu_helper.o
CC alpha-softmmu/target/alpha/vax_helper.o
CC microblaze-softmmu/fpu/softfloat.o
CC alpha-softmmu/target/alpha/sys_helper.o
CC alpha-softmmu/target/alpha/mem_helper.o
CC alpha-softmmu/target/alpha/gdbstub.o
GEN trace/generated-helpers.c
CC alpha-softmmu/trace/control-target.o
CC alpha-softmmu/trace/generated-helpers.o
LINK alpha-softmmu/qemu-system-alpha
GEN mips64el-softmmu/hmp-commands.h
GEN mips64el-softmmu/hmp-commands-info.h
GEN mips64el-softmmu/config-target.h
CC mips64el-softmmu/exec.o
CC microblaze-softmmu/disas.o
CC microblaze-softmmu/arch_init.o
CC microblaze-softmmu/cpus.o
CC microblaze-softmmu/monitor.o
CC mips64el-softmmu/tcg/tcg.o
CC microblaze-softmmu/gdbstub.o
CC microblaze-softmmu/balloon.o
CC microblaze-softmmu/ioport.o
CC mips64el-softmmu/tcg/tcg-op.o
CC microblaze-softmmu/numa.o
CC microblaze-softmmu/qtest.o
CC microblaze-softmmu/memory.o
CC mips64el-softmmu/tcg/tcg-op-vec.o
CC microblaze-softmmu/memory_mapping.o
CC microblaze-softmmu/dump.o
CC mips64el-softmmu/tcg/tcg-op-gvec.o
CC microblaze-softmmu/migration/ram.o
CC microblaze-softmmu/accel/accel.o
CC microblaze-softmmu/accel/stubs/hax-stub.o
CC mips64el-softmmu/tcg/tcg-common.o
CC microblaze-softmmu/accel/stubs/hvf-stub.o
CC microblaze-softmmu/accel/stubs/whpx-stub.o
CC mips64el-softmmu/tcg/optimize.o
CC microblaze-softmmu/accel/stubs/kvm-stub.o
CC microblaze-softmmu/accel/tcg/tcg-all.o
CC microblaze-softmmu/accel/tcg/cputlb.o
CC mips64el-softmmu/fpu/softfloat.o
CC microblaze-softmmu/accel/tcg/tcg-runtime.o
CC microblaze-softmmu/accel/tcg/tcg-runtime-gvec.o
CC microblaze-softmmu/accel/tcg/cpu-exec.o
CC microblaze-softmmu/accel/tcg/cpu-exec-common.o
CC microblaze-softmmu/accel/tcg/translate-all.o
CC microblaze-softmmu/accel/tcg/translator.o
CC mips64el-softmmu/disas.o
CC microblaze-softmmu/hw/core/generic-loader.o
CC mips64el-softmmu/arch_init.o
CC microblaze-softmmu/hw/core/null-machine.o
CC mips64el-softmmu/cpus.o
CC microblaze-softmmu/hw/dma/xlnx_dpdma.o
CC microblaze-softmmu/hw/misc/mmio_interface.o
CC mips64el-softmmu/monitor.o
CC microblaze-softmmu/hw/net/xilinx_ethlite.o
CC microblaze-softmmu/hw/net/vhost_net.o
CC microblaze-softmmu/hw/net/rocker/qmp-norocker.o
CC microblaze-softmmu/hw/vfio/common.o
CC microblaze-softmmu/hw/vfio/platform.o
CC mips64el-softmmu/gdbstub.o
CC microblaze-softmmu/hw/vfio/spapr.o
CC microblaze-softmmu/hw/microblaze/petalogix_s3adsp1800_mmu.o
CC mips64el-softmmu/balloon.o
CC microblaze-softmmu/hw/microblaze/petalogix_ml605_mmu.o
CC mips64el-softmmu/ioport.o
CC microblaze-softmmu/hw/microblaze/xlnx-zynqmp-pmu.o
CC mips64el-softmmu/numa.o
CC microblaze-softmmu/hw/microblaze/boot.o
CC microblaze-softmmu/target/microblaze/translate.o
CC mips64el-softmmu/qtest.o
CC mips64el-softmmu/memory.o
CC microblaze-softmmu/target/microblaze/op_helper.o
CC mips64el-softmmu/memory_mapping.o
CC microblaze-softmmu/target/microblaze/helper.o
CC mips64el-softmmu/dump.o
CC microblaze-softmmu/target/microblaze/cpu.o
CC microblaze-softmmu/target/microblaze/gdbstub.o
CC microblaze-softmmu/target/microblaze/mmu.o
CC mips64el-softmmu/migration/ram.o
GEN trace/generated-helpers.c
CC microblaze-softmmu/trace/control-target.o
CC microblaze-softmmu/trace/generated-helpers.o
LINK microblaze-softmmu/qemu-system-microblaze
CC mips64el-softmmu/accel/accel.o
CC mips64el-softmmu/accel/stubs/hax-stub.o
CC mips64el-softmmu/accel/stubs/hvf-stub.o
CC mips64el-softmmu/accel/stubs/whpx-stub.o
CC mips64el-softmmu/accel/stubs/kvm-stub.o
CC mips64el-softmmu/accel/tcg/tcg-all.o
GEN mips64-softmmu/hmp-commands.h
GEN mips64-softmmu/hmp-commands-info.h
GEN mips64-softmmu/config-target.h
CC mips64-softmmu/exec.o
CC mips64el-softmmu/accel/tcg/cputlb.o
CC mips64el-softmmu/accel/tcg/tcg-runtime.o
CC mips64-softmmu/tcg/tcg.o
CC mips64el-softmmu/accel/tcg/tcg-runtime-gvec.o
CC mips64el-softmmu/accel/tcg/cpu-exec.o
CC mips64el-softmmu/accel/tcg/cpu-exec-common.o
CC mips64el-softmmu/accel/tcg/translate-all.o
CC mips64el-softmmu/accel/tcg/translator.o
CC mips64-softmmu/tcg/tcg-op.o
CC mips64el-softmmu/hw/9pfs/virtio-9p-device.o
CC mips64el-softmmu/hw/block/virtio-blk.o
CC mips64el-softmmu/hw/block/vhost-user-blk.o
CC mips64el-softmmu/hw/block/dataplane/virtio-blk.o
CC mips64-softmmu/tcg/tcg-op-vec.o
CC mips64el-softmmu/hw/char/virtio-serial-bus.o
CC mips64el-softmmu/hw/core/generic-loader.o
CC mips64-softmmu/tcg/tcg-op-gvec.o
CC mips64el-softmmu/hw/core/null-machine.o
CC mips64el-softmmu/hw/display/vga.o
CC mips64el-softmmu/hw/display/virtio-gpu.o
CC mips64-softmmu/tcg/tcg-common.o
CC mips64-softmmu/tcg/optimize.o
CC mips64el-softmmu/hw/display/virtio-gpu-3d.o
CC mips64el-softmmu/hw/display/virtio-gpu-pci.o
CC mips64-softmmu/fpu/softfloat.o
CC mips64el-softmmu/hw/intc/mips_gic.o
CC mips64el-softmmu/hw/misc/ivshmem.o
CC mips64el-softmmu/hw/misc/mips_cmgcr.o
CC mips64el-softmmu/hw/misc/mips_cpc.o
CC mips64el-softmmu/hw/misc/mips_itu.o
CC mips64el-softmmu/hw/misc/mmio_interface.o
CC mips64el-softmmu/hw/net/virtio-net.o
CC mips64el-softmmu/hw/net/vhost_net.o
CC mips64el-softmmu/hw/scsi/virtio-scsi.o
CC mips64el-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC mips64-softmmu/disas.o
CC mips64el-softmmu/hw/scsi/vhost-scsi-common.o
CC mips64el-softmmu/hw/scsi/vhost-scsi.o
CC mips64-softmmu/arch_init.o
CC mips64el-softmmu/hw/scsi/vhost-user-scsi.o
CC mips64-softmmu/cpus.o
CC mips64el-softmmu/hw/timer/mips_gictimer.o
CC mips64el-softmmu/hw/timer/mc146818rtc.o
CC mips64-softmmu/monitor.o
CC mips64el-softmmu/hw/vfio/common.o
CC mips64el-softmmu/hw/vfio/pci.o
CC mips64-softmmu/gdbstub.o
CC mips64el-softmmu/hw/vfio/pci-quirks.o
CC mips64-softmmu/balloon.o
CC mips64-softmmu/ioport.o
CC mips64el-softmmu/hw/vfio/platform.o
CC mips64-softmmu/numa.o
CC mips64el-softmmu/hw/vfio/spapr.o
CC mips64-softmmu/qtest.o
CC mips64el-softmmu/hw/virtio/virtio.o
CC mips64-softmmu/memory.o
CC mips64el-softmmu/hw/virtio/virtio-balloon.o
CC mips64el-softmmu/hw/virtio/vhost.o
CC mips64-softmmu/memory_mapping.o
CC mips64-softmmu/dump.o
CC mips64el-softmmu/hw/virtio/vhost-backend.o
CC mips64el-softmmu/hw/virtio/vhost-user.o
CC mips64-softmmu/migration/ram.o
CC mips64el-softmmu/hw/virtio/vhost-vsock.o
CC mips64el-softmmu/hw/virtio/virtio-crypto.o
CC mips64el-softmmu/hw/virtio/virtio-crypto-pci.o
CC mips64-softmmu/accel/accel.o
CC mips64-softmmu/accel/stubs/hax-stub.o
CC mips64el-softmmu/hw/mips/mips_r4k.o
CC mips64-softmmu/accel/stubs/hvf-stub.o
CC mips64-softmmu/accel/stubs/whpx-stub.o
CC mips64el-softmmu/hw/mips/mips_malta.o
CC mips64-softmmu/accel/stubs/kvm-stub.o
CC mips64-softmmu/accel/tcg/tcg-all.o
CC mips64el-softmmu/hw/mips/mips_mipssim.o
CC mips64-softmmu/accel/tcg/cputlb.o
CC mips64el-softmmu/hw/mips/addr.o
CC mips64el-softmmu/hw/mips/mips_int.o
CC mips64el-softmmu/hw/mips/mips_jazz.o
CC mips64el-softmmu/hw/mips/mips_fulong2e.o
CC mips64el-softmmu/hw/mips/gt64xxx_pci.o
CC mips64el-softmmu/hw/mips/cps.o
CC mips64-softmmu/accel/tcg/tcg-runtime.o
CC mips64el-softmmu/hw/mips/boston.o
CC mips64-softmmu/accel/tcg/tcg-runtime-gvec.o
CC mips64el-softmmu/target/mips/translate.o
CC mips64-softmmu/accel/tcg/cpu-exec.o
CC mips64-softmmu/accel/tcg/cpu-exec-common.o
CC mips64-softmmu/accel/tcg/translate-all.o
CC mips64-softmmu/accel/tcg/translator.o
CC mips64-softmmu/hw/9pfs/virtio-9p-device.o
CC mips64-softmmu/hw/block/virtio-blk.o
CC mips64-softmmu/hw/block/vhost-user-blk.o
CC mips64-softmmu/hw/block/dataplane/virtio-blk.o
CC mips64-softmmu/hw/char/virtio-serial-bus.o
CC mips64-softmmu/hw/core/generic-loader.o
CC mips64-softmmu/hw/core/null-machine.o
CC mips64-softmmu/hw/display/vga.o
CC mips64-softmmu/hw/display/virtio-gpu.o
CC mips64-softmmu/hw/display/virtio-gpu-3d.o
CC mips64-softmmu/hw/display/virtio-gpu-pci.o
CC mips64-softmmu/hw/intc/mips_gic.o
CC mips64-softmmu/hw/misc/ivshmem.o
CC mips64-softmmu/hw/misc/mips_cmgcr.o
CC mips64-softmmu/hw/misc/mips_cpc.o
CC mips64-softmmu/hw/misc/mips_itu.o
CC mips64-softmmu/hw/misc/mmio_interface.o
CC mips64-softmmu/hw/net/virtio-net.o
CC mips64-softmmu/hw/net/vhost_net.o
CC mips64-softmmu/hw/scsi/virtio-scsi.o
CC mips64el-softmmu/target/mips/dsp_helper.o
CC mips64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC mips64-softmmu/hw/scsi/vhost-scsi-common.o
CC mips64-softmmu/hw/scsi/vhost-scsi.o
CC mips64-softmmu/hw/scsi/vhost-user-scsi.o
CC mips64-softmmu/hw/timer/mips_gictimer.o
CC mips64-softmmu/hw/timer/mc146818rtc.o
CC mips64el-softmmu/target/mips/op_helper.o
CC mips64-softmmu/hw/vfio/common.o
CC mips64-softmmu/hw/vfio/pci.o
CC mips64-softmmu/hw/vfio/pci-quirks.o
CC mips64el-softmmu/target/mips/lmi_helper.o
CC mips64-softmmu/hw/vfio/platform.o
CC mips64el-softmmu/target/mips/helper.o
CC mips64-softmmu/hw/vfio/spapr.o
CC mips64-softmmu/hw/virtio/virtio.o
CC mips64el-softmmu/target/mips/cpu.o
CC mips64el-softmmu/target/mips/gdbstub.o
CC mips64el-softmmu/target/mips/msa_helper.o
CC mips64-softmmu/hw/virtio/virtio-balloon.o
CC mips64-softmmu/hw/virtio/vhost.o
CC mips64-softmmu/hw/virtio/vhost-backend.o
CC mips64-softmmu/hw/virtio/vhost-user.o
CC mips64-softmmu/hw/virtio/vhost-vsock.o
CC mips64-softmmu/hw/virtio/virtio-crypto.o
CC mips64-softmmu/hw/virtio/virtio-crypto-pci.o
CC mips64-softmmu/hw/mips/mips_r4k.o
CC mips64-softmmu/hw/mips/mips_malta.o
CC mips64el-softmmu/target/mips/mips-semi.o
CC mips64-softmmu/hw/mips/mips_mipssim.o
CC mips64-softmmu/hw/mips/addr.o
CC mips64el-softmmu/target/mips/machine.o
CC mips64-softmmu/hw/mips/mips_int.o
CC mips64el-softmmu/target/mips/cp0_timer.o
CC mips64-softmmu/hw/mips/mips_jazz.o
GEN trace/generated-helpers.c
CC mips64el-softmmu/trace/control-target.o
CC mips64-softmmu/hw/mips/gt64xxx_pci.o
CC mips64el-softmmu/trace/generated-helpers.o
CC mips64-softmmu/hw/mips/cps.o
LINK mips64el-softmmu/qemu-system-mips64el
CC mips64-softmmu/target/mips/translate.o
GEN mipsel-softmmu/hmp-commands.h
GEN mipsel-softmmu/hmp-commands-info.h
GEN mipsel-softmmu/config-target.h
CC mipsel-softmmu/exec.o
CC mipsel-softmmu/tcg/tcg.o
CC mipsel-softmmu/tcg/tcg-op.o
CC mipsel-softmmu/tcg/tcg-op-vec.o
CC mipsel-softmmu/tcg/tcg-op-gvec.o
CC mipsel-softmmu/tcg/tcg-common.o
CC mipsel-softmmu/tcg/optimize.o
CC mips64-softmmu/target/mips/dsp_helper.o
CC mipsel-softmmu/fpu/softfloat.o
CC mips64-softmmu/target/mips/op_helper.o
CC mips64-softmmu/target/mips/lmi_helper.o
CC mips64-softmmu/target/mips/helper.o
CC mipsel-softmmu/disas.o
CC mipsel-softmmu/arch_init.o
CC mips64-softmmu/target/mips/cpu.o
CC mipsel-softmmu/cpus.o
CC mips64-softmmu/target/mips/gdbstub.o
CC mips64-softmmu/target/mips/msa_helper.o
CC mipsel-softmmu/monitor.o
CC mipsel-softmmu/gdbstub.o
CC mipsel-softmmu/balloon.o
CC mipsel-softmmu/ioport.o
CC mipsel-softmmu/numa.o
CC mipsel-softmmu/qtest.o
CC mipsel-softmmu/memory.o
CC mips64-softmmu/target/mips/mips-semi.o
CC mips64-softmmu/target/mips/machine.o
CC mips64-softmmu/target/mips/cp0_timer.o
GEN trace/generated-helpers.c
CC mips64-softmmu/trace/control-target.o
CC mips64-softmmu/trace/generated-helpers.o
CC mipsel-softmmu/memory_mapping.o
LINK mips64-softmmu/qemu-system-mips64
CC mipsel-softmmu/dump.o
CC mipsel-softmmu/migration/ram.o
CC arm-softmmu/hw/arm/netduino2.o
CC aarch64-softmmu/hw/intc/bcm2836_control.o
CC arm-softmmu/hw/arm/sysbus-fdt.o
CC mipsel-softmmu/accel/accel.o
CC aarch64-softmmu/hw/intc/allwinner-a10-pic.o
CC arm-softmmu/hw/arm/armv7m.o
CC mipsel-softmmu/accel/stubs/hax-stub.o
CC aarch64-softmmu/hw/intc/aspeed_vic.o
CC mipsel-softmmu/accel/stubs/hvf-stub.o
CC arm-softmmu/hw/arm/exynos4210.o
GEN mips-softmmu/hmp-commands.h
GEN mips-softmmu/hmp-commands-info.h
CC mipsel-softmmu/accel/stubs/whpx-stub.o
GEN mips-softmmu/config-target.h
CC aarch64-softmmu/hw/intc/arm_gicv3_cpuif.o
CC mips-softmmu/exec.o
CC mipsel-softmmu/accel/stubs/kvm-stub.o
CC arm-softmmu/hw/arm/pxa2xx.o
CC mipsel-softmmu/accel/tcg/tcg-all.o
CC mipsel-softmmu/accel/tcg/cputlb.o
CC aarch64-softmmu/hw/misc/ivshmem.o
CC arm-softmmu/hw/arm/pxa2xx_gpio.o
CC arm-softmmu/hw/arm/pxa2xx_pic.o
CC mips-softmmu/tcg/tcg.o
CC aarch64-softmmu/hw/misc/arm_sysctl.o
CC arm-softmmu/hw/arm/digic.o
CC arm-softmmu/hw/arm/omap1.o
CC aarch64-softmmu/hw/misc/cbus.o
CC mipsel-softmmu/accel/tcg/tcg-runtime.o
CC aarch64-softmmu/hw/misc/exynos4210_pmu.o
CC aarch64-softmmu/hw/misc/exynos4210_clk.o
CC aarch64-softmmu/hw/misc/exynos4210_rng.o
CC mipsel-softmmu/accel/tcg/tcg-runtime-gvec.o
CC arm-softmmu/hw/arm/omap2.o
CC aarch64-softmmu/hw/misc/imx_ccm.o
CC mips-softmmu/tcg/tcg-op.o
CC aarch64-softmmu/hw/misc/imx31_ccm.o
CC mipsel-softmmu/accel/tcg/cpu-exec.o
CC arm-softmmu/hw/arm/strongarm.o
CC aarch64-softmmu/hw/misc/imx25_ccm.o
CC mipsel-softmmu/accel/tcg/cpu-exec-common.o
CC aarch64-softmmu/hw/misc/imx6_ccm.o
CC arm-softmmu/hw/arm/allwinner-a10.o
CC mipsel-softmmu/accel/tcg/translate-all.o
CC aarch64-softmmu/hw/misc/imx6_src.o
CC arm-softmmu/hw/arm/cubieboard.o
CC aarch64-softmmu/hw/misc/imx7_ccm.o
CC mips-softmmu/tcg/tcg-op-vec.o
CC aarch64-softmmu/hw/misc/imx2_wdt.o
CC arm-softmmu/hw/arm/bcm2835_peripherals.o
CC mipsel-softmmu/accel/tcg/translator.o
CC aarch64-softmmu/hw/misc/imx7_snvs.o
CC aarch64-softmmu/hw/misc/imx7_gpr.o
CC arm-softmmu/hw/arm/bcm2836.o
CC mips-softmmu/tcg/tcg-op-gvec.o
CC aarch64-softmmu/hw/misc/mst_fpga.o
CC mipsel-softmmu/hw/9pfs/virtio-9p-device.o
CC arm-softmmu/hw/arm/raspi.o
CC mipsel-softmmu/hw/block/virtio-blk.o
CC aarch64-softmmu/hw/misc/omap_clk.o
CC arm-softmmu/hw/arm/stm32f205_soc.o
CC aarch64-softmmu/hw/misc/omap_gpmc.o
CC mipsel-softmmu/hw/block/vhost-user-blk.o
CC mipsel-softmmu/hw/block/dataplane/virtio-blk.o
CC arm-softmmu/hw/arm/fsl-imx25.o
CC aarch64-softmmu/hw/misc/omap_l4.o
CC mipsel-softmmu/hw/char/virtio-serial-bus.o
CC arm-softmmu/hw/arm/imx25_pdk.o
CC aarch64-softmmu/hw/misc/omap_sdrc.o
CC arm-softmmu/hw/arm/fsl-imx31.o
CC mipsel-softmmu/hw/core/generic-loader.o
CC mips-softmmu/tcg/tcg-common.o
CC aarch64-softmmu/hw/misc/omap_tap.o
CC arm-softmmu/hw/arm/kzm.o
CC mipsel-softmmu/hw/core/null-machine.o
CC aarch64-softmmu/hw/misc/bcm2835_mbox.o
CC mips-softmmu/tcg/optimize.o
CC aarch64-softmmu/hw/misc/bcm2835_property.o
CC arm-softmmu/hw/arm/fsl-imx6.o
CC mipsel-softmmu/hw/display/vga.o
CC arm-softmmu/hw/arm/sabrelite.o
CC aarch64-softmmu/hw/misc/bcm2835_rng.o
CC aarch64-softmmu/hw/misc/zynq_slcr.o
CC mips-softmmu/fpu/softfloat.o
CC arm-softmmu/hw/arm/aspeed_soc.o
CC aarch64-softmmu/hw/misc/zynq-xadc.o
CC mipsel-softmmu/hw/display/virtio-gpu.o
CC arm-softmmu/hw/arm/aspeed.o
CC aarch64-softmmu/hw/misc/stm32f2xx_syscfg.o
CC arm-softmmu/hw/arm/mps2.o
CC aarch64-softmmu/hw/misc/mps2-scc.o
CC arm-softmmu/hw/arm/msf2-soc.o
CC mipsel-softmmu/hw/display/virtio-gpu-3d.o
CC arm-softmmu/hw/arm/msf2-som.o
CC arm-softmmu/target/arm/arm-semi.o
CC aarch64-softmmu/hw/misc/auxbus.o
CC mipsel-softmmu/hw/display/virtio-gpu-pci.o
CC aarch64-softmmu/hw/misc/aspeed_scu.o
CC arm-softmmu/target/arm/machine.o
CC mipsel-softmmu/hw/intc/mips_gic.o
CC aarch64-softmmu/hw/misc/aspeed_sdmc.o
CC aarch64-softmmu/hw/misc/mmio_interface.o
CC arm-softmmu/target/arm/psci.o
CC mipsel-softmmu/hw/misc/ivshmem.o
CC arm-softmmu/target/arm/arch_dump.o
CC aarch64-softmmu/hw/misc/msf2-sysreg.o
CC aarch64-softmmu/hw/net/virtio-net.o
CC arm-softmmu/target/arm/monitor.o
CC mipsel-softmmu/hw/misc/mips_cmgcr.o
CC arm-softmmu/target/arm/kvm-stub.o
CC mips-softmmu/disas.o
CC mipsel-softmmu/hw/misc/mips_cpc.o
CC arm-softmmu/target/arm/translate.o
CC aarch64-softmmu/hw/net/vhost_net.o
CC mipsel-softmmu/hw/misc/mips_itu.o
CC mips-softmmu/arch_init.o
CC aarch64-softmmu/hw/pcmcia/pxa2xx.o
CC mipsel-softmmu/hw/misc/mmio_interface.o
CC aarch64-softmmu/hw/scsi/virtio-scsi.o
CC mipsel-softmmu/hw/net/virtio-net.o
CC mips-softmmu/cpus.o
CC aarch64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC mipsel-softmmu/hw/net/vhost_net.o
CC mipsel-softmmu/hw/scsi/virtio-scsi.o
CC aarch64-softmmu/hw/scsi/vhost-scsi-common.o
CC mips-softmmu/monitor.o
CC aarch64-softmmu/hw/scsi/vhost-scsi.o
CC aarch64-softmmu/hw/scsi/vhost-user-scsi.o
CC mipsel-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC aarch64-softmmu/hw/sd/omap_mmc.o
CC mipsel-softmmu/hw/scsi/vhost-scsi-common.o
CC aarch64-softmmu/hw/sd/pxa2xx_mmci.o
CC mipsel-softmmu/hw/scsi/vhost-scsi.o
CC mips-softmmu/gdbstub.o
CC mipsel-softmmu/hw/scsi/vhost-user-scsi.o
CC aarch64-softmmu/hw/sd/bcm2835_sdhost.o
CC mipsel-softmmu/hw/timer/mips_gictimer.o
CC mips-softmmu/balloon.o
CC aarch64-softmmu/hw/ssi/omap_spi.o
CC mipsel-softmmu/hw/timer/mc146818rtc.o
CC mips-softmmu/ioport.o
CC aarch64-softmmu/hw/ssi/imx_spi.o
CC mips-softmmu/numa.o
CC mipsel-softmmu/hw/vfio/common.o
CC aarch64-softmmu/hw/timer/exynos4210_mct.o
CC mips-softmmu/qtest.o
CC mipsel-softmmu/hw/vfio/pci.o
CC aarch64-softmmu/hw/timer/exynos4210_pwm.o
CC mips-softmmu/memory.o
CC aarch64-softmmu/hw/timer/exynos4210_rtc.o
CC arm-softmmu/target/arm/op_helper.o
CC aarch64-softmmu/hw/timer/omap_gptimer.o
CC mipsel-softmmu/hw/vfio/pci-quirks.o
CC aarch64-softmmu/hw/timer/omap_synctimer.o
CC mips-softmmu/memory_mapping.o
CC mipsel-softmmu/hw/vfio/platform.o
CC aarch64-softmmu/hw/timer/pxa2xx_timer.o
CC arm-softmmu/target/arm/helper.o
CC mips-softmmu/dump.o
CC aarch64-softmmu/hw/timer/digic-timer.o
CC mipsel-softmmu/hw/vfio/spapr.o
CC aarch64-softmmu/hw/timer/allwinner-a10-pit.o
CC mipsel-softmmu/hw/virtio/virtio.o
CC mips-softmmu/migration/ram.o
CC aarch64-softmmu/hw/usb/tusb6010.o
CC mipsel-softmmu/hw/virtio/virtio-balloon.o
CC aarch64-softmmu/hw/usb/chipidea.o
CC mips-softmmu/accel/accel.o
CC mipsel-softmmu/hw/virtio/vhost.o
CC aarch64-softmmu/hw/vfio/common.o
CC mips-softmmu/accel/stubs/hax-stub.o
CC mips-softmmu/accel/stubs/hvf-stub.o
CC aarch64-softmmu/hw/vfio/pci.o
CC mips-softmmu/accel/stubs/whpx-stub.o
CC mipsel-softmmu/hw/virtio/vhost-backend.o
CC mips-softmmu/accel/stubs/kvm-stub.o
CC mipsel-softmmu/hw/virtio/vhost-user.o
CC mips-softmmu/accel/tcg/tcg-all.o
CC mipsel-softmmu/hw/virtio/vhost-vsock.o
CC arm-softmmu/target/arm/cpu.o
CC mips-softmmu/accel/tcg/cputlb.o
CC aarch64-softmmu/hw/vfio/pci-quirks.o
CC mipsel-softmmu/hw/virtio/virtio-crypto.o
CC arm-softmmu/target/arm/neon_helper.o
CC aarch64-softmmu/hw/vfio/platform.o
CC mipsel-softmmu/hw/virtio/virtio-crypto-pci.o
CC aarch64-softmmu/hw/vfio/calxeda-xgmac.o
CC aarch64-softmmu/hw/vfio/amd-xgbe.o
CC mips-softmmu/accel/tcg/tcg-runtime.o
CC mipsel-softmmu/hw/mips/mips_r4k.o
CC aarch64-softmmu/hw/vfio/spapr.o
CC mips-softmmu/accel/tcg/tcg-runtime-gvec.o
CC arm-softmmu/target/arm/iwmmxt_helper.o
CC mipsel-softmmu/hw/mips/mips_malta.o
CC aarch64-softmmu/hw/virtio/virtio.o
CC mipsel-softmmu/hw/mips/mips_mipssim.o
CC aarch64-softmmu/hw/virtio/virtio-balloon.o
CC arm-softmmu/target/arm/gdbstub.o
CC mipsel-softmmu/hw/mips/addr.o
CC mips-softmmu/accel/tcg/cpu-exec.o
CC arm-softmmu/target/arm/crypto_helper.o
CC aarch64-softmmu/hw/virtio/vhost.o
CC mipsel-softmmu/hw/mips/mips_int.o
CC mips-softmmu/accel/tcg/cpu-exec-common.o
CC arm-softmmu/target/arm/arm-powerctl.o
CC mipsel-softmmu/hw/mips/gt64xxx_pci.o
CC mips-softmmu/accel/tcg/translate-all.o
CC aarch64-softmmu/hw/virtio/vhost-backend.o
GEN trace/generated-helpers.c
CC mipsel-softmmu/hw/mips/cps.o
CC arm-softmmu/trace/control-target.o
CC aarch64-softmmu/hw/virtio/vhost-user.o
CC mips-softmmu/accel/tcg/translator.o
CC mipsel-softmmu/target/mips/translate.o
CC arm-softmmu/gdbstub-xml.o
CC aarch64-softmmu/hw/virtio/vhost-vsock.o
CC aarch64-softmmu/hw/virtio/virtio-crypto.o
CC arm-softmmu/trace/generated-helpers.o
CC mips-softmmu/hw/9pfs/virtio-9p-device.o
CC aarch64-softmmu/hw/virtio/virtio-crypto-pci.o
LINK arm-softmmu/qemu-system-arm
CC mips-softmmu/hw/block/virtio-blk.o
CC aarch64-softmmu/hw/arm/boot.o
CC mips-softmmu/hw/block/vhost-user-blk.o
CC aarch64-softmmu/hw/arm/collie.o
CC mips-softmmu/hw/block/dataplane/virtio-blk.o
CC aarch64-softmmu/hw/arm/exynos4_boards.o
CC mips-softmmu/hw/char/virtio-serial-bus.o
CC aarch64-softmmu/hw/arm/gumstix.o
CC aarch64-softmmu/hw/arm/highbank.o
CC mips-softmmu/hw/core/generic-loader.o
CC aarch64-softmmu/hw/arm/digic_boards.o
CC aarch64-softmmu/hw/arm/integratorcp.o
CC aarch64-softmmu/hw/arm/mainstone.o
CC aarch64-softmmu/hw/arm/musicpal.o
CC mipsel-softmmu/target/mips/dsp_helper.o
CC mipsel-softmmu/target/mips/op_helper.o
CC mipsel-softmmu/target/mips/lmi_helper.o
CC mipsel-softmmu/target/mips/helper.o
CC mipsel-softmmu/target/mips/cpu.o
CC mipsel-softmmu/target/mips/gdbstub.o
CC mipsel-softmmu/target/mips/msa_helper.o
GEN moxie-softmmu/hmp-commands.h
GEN moxie-softmmu/hmp-commands-info.h
GEN moxie-softmmu/config-target.h
CC moxie-softmmu/exec.o
CC moxie-softmmu/tcg/tcg.o
CC mipsel-softmmu/target/mips/mips-semi.o
CC moxie-softmmu/tcg/tcg-op.o
CC mipsel-softmmu/target/mips/machine.o
CC mipsel-softmmu/target/mips/cp0_timer.o
GEN trace/generated-helpers.c
CC mipsel-softmmu/trace/control-target.o
CC mipsel-softmmu/trace/generated-helpers.o
LINK mipsel-softmmu/qemu-system-mipsel
CC moxie-softmmu/tcg/tcg-op-vec.o
CC moxie-softmmu/tcg/tcg-op-gvec.o
GEN nios2-softmmu/hmp-commands.h
GEN nios2-softmmu/hmp-commands-info.h
GEN nios2-softmmu/config-target.h
CC nios2-softmmu/exec.o
CC nios2-softmmu/tcg/tcg.o
CC nios2-softmmu/tcg/tcg-op.o
CC nios2-softmmu/tcg/tcg-op-vec.o
CC nios2-softmmu/tcg/tcg-op-gvec.o
CC nios2-softmmu/tcg/tcg-common.o
CC nios2-softmmu/tcg/optimize.o
CC nios2-softmmu/fpu/softfloat.o
CC nios2-softmmu/disas.o
CC nios2-softmmu/arch_init.o
CC nios2-softmmu/cpus.o
CC nios2-softmmu/monitor.o
CC nios2-softmmu/gdbstub.o
CC nios2-softmmu/balloon.o
CC nios2-softmmu/ioport.o
CC nios2-softmmu/numa.o
CC nios2-softmmu/qtest.o
CC nios2-softmmu/memory.o
CC nios2-softmmu/memory_mapping.o
CC nios2-softmmu/dump.o
CC nios2-softmmu/migration/ram.o
CC nios2-softmmu/accel/accel.o
CC nios2-softmmu/accel/stubs/hax-stub.o
CC nios2-softmmu/accel/stubs/hvf-stub.o
CC nios2-softmmu/accel/stubs/whpx-stub.o
CC nios2-softmmu/accel/stubs/kvm-stub.o
CC nios2-softmmu/accel/tcg/tcg-all.o
CC nios2-softmmu/accel/tcg/cputlb.o
CC nios2-softmmu/accel/tcg/tcg-runtime.o
CC nios2-softmmu/accel/tcg/tcg-runtime-gvec.o
CC nios2-softmmu/accel/tcg/cpu-exec.o
CC nios2-softmmu/accel/tcg/cpu-exec-common.o
CC nios2-softmmu/accel/tcg/translate-all.o
CC nios2-softmmu/accel/tcg/translator.o
CC nios2-softmmu/hw/core/generic-loader.o
CC nios2-softmmu/hw/core/null-machine.o
CC nios2-softmmu/hw/intc/nios2_iic.o
CC nios2-softmmu/hw/misc/mmio_interface.o
CC nios2-softmmu/hw/net/vhost_net.o
CC nios2-softmmu/hw/net/rocker/qmp-norocker.o
CC nios2-softmmu/hw/timer/altera_timer.o
CC nios2-softmmu/hw/vfio/common.o
CC nios2-softmmu/hw/vfio/platform.o
CC nios2-softmmu/hw/vfio/spapr.o
CC nios2-softmmu/hw/nios2/boot.o
CC nios2-softmmu/hw/nios2/cpu_pic.o
CC nios2-softmmu/hw/nios2/10m50_devboard.o
CC nios2-softmmu/target/nios2/translate.o
CC nios2-softmmu/target/nios2/op_helper.o
CC nios2-softmmu/target/nios2/helper.o
CC nios2-softmmu/target/nios2/cpu.o
CC nios2-softmmu/target/nios2/mmu.o
CC nios2-softmmu/target/nios2/monitor.o
GEN trace/generated-helpers.c
CC nios2-softmmu/trace/control-target.o
CC nios2-softmmu/trace/generated-helpers.o
LINK nios2-softmmu/qemu-system-nios2
CC moxie-softmmu/tcg/tcg-common.o
CC aarch64-softmmu/hw/arm/nseries.o
CC moxie-softmmu/tcg/optimize.o
GEN or1k-softmmu/hmp-commands.h
GEN or1k-softmmu/hmp-commands-info.h
GEN or1k-softmmu/config-target.h
CC or1k-softmmu/exec.o
CC aarch64-softmmu/hw/arm/omap_sx1.o
CC moxie-softmmu/fpu/softfloat.o
CC aarch64-softmmu/hw/arm/palm.o
CC aarch64-softmmu/hw/arm/realview.o
CC aarch64-softmmu/hw/arm/spitz.o
CC aarch64-softmmu/hw/arm/stellaris.o
CC or1k-softmmu/tcg/tcg.o
CC aarch64-softmmu/hw/arm/tosa.o
CC aarch64-softmmu/hw/arm/versatilepb.o
CC aarch64-softmmu/hw/arm/vexpress.o
CC aarch64-softmmu/hw/arm/virt.o
CC or1k-softmmu/tcg/tcg-op.o
CC aarch64-softmmu/hw/arm/xilinx_zynq.o
CC moxie-softmmu/disas.o
CC aarch64-softmmu/hw/arm/z2.o
CC moxie-softmmu/arch_init.o
CC aarch64-softmmu/hw/arm/virt-acpi-build.o
CC moxie-softmmu/cpus.o
CC aarch64-softmmu/hw/arm/netduino2.o
CC or1k-softmmu/tcg/tcg-op-vec.o
CC aarch64-softmmu/hw/arm/sysbus-fdt.o
CC moxie-softmmu/monitor.o
CC or1k-softmmu/tcg/tcg-op-gvec.o
CC aarch64-softmmu/hw/arm/armv7m.o
CC aarch64-softmmu/hw/arm/exynos4210.o
CC aarch64-softmmu/hw/arm/pxa2xx.o
CC moxie-softmmu/gdbstub.o
CC or1k-softmmu/tcg/tcg-common.o
CC aarch64-softmmu/hw/arm/pxa2xx_gpio.o
CC or1k-softmmu/tcg/optimize.o
CC moxie-softmmu/balloon.o
CC aarch64-softmmu/hw/arm/pxa2xx_pic.o
CC moxie-softmmu/ioport.o
CC aarch64-softmmu/hw/arm/digic.o
CC or1k-softmmu/fpu/softfloat.o
CC aarch64-softmmu/hw/arm/omap1.o
CC moxie-softmmu/numa.o
CC moxie-softmmu/qtest.o
CC moxie-softmmu/memory.o
CC aarch64-softmmu/hw/arm/omap2.o
CC aarch64-softmmu/hw/arm/strongarm.o
CC moxie-softmmu/memory_mapping.o
CC aarch64-softmmu/hw/arm/allwinner-a10.o
CC moxie-softmmu/dump.o
CC aarch64-softmmu/hw/arm/cubieboard.o
CC aarch64-softmmu/hw/arm/bcm2835_peripherals.o
CC moxie-softmmu/migration/ram.o
CC aarch64-softmmu/hw/arm/bcm2836.o
CC or1k-softmmu/disas.o
CC aarch64-softmmu/hw/arm/raspi.o
CC or1k-softmmu/arch_init.o
CC moxie-softmmu/accel/accel.o
CC aarch64-softmmu/hw/arm/stm32f205_soc.o
CC moxie-softmmu/accel/stubs/hax-stub.o
CC or1k-softmmu/cpus.o
CC aarch64-softmmu/hw/arm/xlnx-zynqmp.o
CC moxie-softmmu/accel/stubs/hvf-stub.o
CC moxie-softmmu/accel/stubs/whpx-stub.o
CC aarch64-softmmu/hw/arm/xlnx-zcu102.o
CC moxie-softmmu/accel/stubs/kvm-stub.o
CC or1k-softmmu/monitor.o
CC moxie-softmmu/accel/tcg/tcg-all.o
CC aarch64-softmmu/hw/arm/fsl-imx25.o
CC moxie-softmmu/accel/tcg/cputlb.o
CC aarch64-softmmu/hw/arm/imx25_pdk.o
CC aarch64-softmmu/hw/arm/fsl-imx31.o
CC aarch64-softmmu/hw/arm/kzm.o
CC or1k-softmmu/gdbstub.o
CC aarch64-softmmu/hw/arm/fsl-imx6.o
CC aarch64-softmmu/hw/arm/sabrelite.o
CC moxie-softmmu/accel/tcg/tcg-runtime.o
CC aarch64-softmmu/hw/arm/aspeed_soc.o
CC or1k-softmmu/balloon.o
CC moxie-softmmu/accel/tcg/tcg-runtime-gvec.o
CC or1k-softmmu/ioport.o
CC aarch64-softmmu/hw/arm/aspeed.o
CC aarch64-softmmu/hw/arm/mps2.o
CC or1k-softmmu/numa.o
CC aarch64-softmmu/hw/arm/msf2-soc.o
CC or1k-softmmu/qtest.o
CC aarch64-softmmu/hw/arm/msf2-som.o
CC moxie-softmmu/accel/tcg/cpu-exec.o
CC or1k-softmmu/memory.o
CC aarch64-softmmu/target/arm/arm-semi.o
CC moxie-softmmu/accel/tcg/cpu-exec-common.o
CC moxie-softmmu/accel/tcg/translate-all.o
CC aarch64-softmmu/target/arm/machine.o
CC aarch64-softmmu/target/arm/psci.o
CC moxie-softmmu/accel/tcg/translator.o
CC aarch64-softmmu/target/arm/arch_dump.o
CC moxie-softmmu/hw/core/generic-loader.o
CC or1k-softmmu/memory_mapping.o
CC aarch64-softmmu/target/arm/monitor.o
CC moxie-softmmu/hw/core/null-machine.o
CC or1k-softmmu/dump.o
CC aarch64-softmmu/target/arm/kvm-stub.o
CC moxie-softmmu/hw/display/vga.o
CC aarch64-softmmu/target/arm/translate.o
CC or1k-softmmu/migration/ram.o
CC moxie-softmmu/hw/misc/mmio_interface.o
CC moxie-softmmu/hw/net/vhost_net.o
CC or1k-softmmu/accel/accel.o
CC moxie-softmmu/hw/net/rocker/qmp-norocker.o
CC or1k-softmmu/accel/stubs/hax-stub.o
CC moxie-softmmu/hw/timer/mc146818rtc.o
CC or1k-softmmu/accel/stubs/hvf-stub.o
CC or1k-softmmu/accel/stubs/whpx-stub.o
CC moxie-softmmu/hw/vfio/common.o
CC or1k-softmmu/accel/stubs/kvm-stub.o
CC or1k-softmmu/accel/tcg/tcg-all.o
CC or1k-softmmu/accel/tcg/cputlb.o
CC moxie-softmmu/hw/vfio/platform.o
CC moxie-softmmu/hw/vfio/spapr.o
CC moxie-softmmu/hw/moxie/moxiesim.o
CC moxie-softmmu/target/moxie/translate.o
CC or1k-softmmu/accel/tcg/tcg-runtime.o
CC moxie-softmmu/target/moxie/helper.o
CC or1k-softmmu/accel/tcg/tcg-runtime-gvec.o
CC moxie-softmmu/target/moxie/machine.o
CC moxie-softmmu/target/moxie/cpu.o
CC moxie-softmmu/target/moxie/mmu.o
GEN trace/generated-helpers.c
CC moxie-softmmu/trace/control-target.o
CC moxie-softmmu/trace/generated-helpers.o
CC or1k-softmmu/accel/tcg/cpu-exec.o
LINK moxie-softmmu/qemu-system-moxie
CC or1k-softmmu/accel/tcg/cpu-exec-common.o
CC or1k-softmmu/accel/tcg/translate-all.o
CC or1k-softmmu/accel/tcg/translator.o
CC aarch64-softmmu/target/arm/op_helper.o
CC or1k-softmmu/hw/core/generic-loader.o
CC aarch64-softmmu/target/arm/helper.o
CC or1k-softmmu/hw/core/null-machine.o
CC or1k-softmmu/hw/intc/ompic.o
CC or1k-softmmu/hw/misc/mmio_interface.o
CC or1k-softmmu/hw/net/vhost_net.o
CC mips-softmmu/hw/core/null-machine.o
CC aarch64-softmmu/target/arm/cpu.o
CC mips-softmmu/hw/display/vga.o
CC aarch64-softmmu/target/arm/neon_helper.o
CC mips-softmmu/hw/display/virtio-gpu.o
CC aarch64-softmmu/target/arm/iwmmxt_helper.o
CC mips-softmmu/hw/display/virtio-gpu-3d.o
CC or1k-softmmu/hw/net/rocker/qmp-norocker.o
CC mips-softmmu/hw/display/virtio-gpu-pci.o
CC or1k-softmmu/hw/vfio/common.o
CC mips-softmmu/hw/intc/mips_gic.o
GEN ppc64-softmmu/hmp-commands.h
GEN ppc64-softmmu/hmp-commands-info.h
GEN ppc64-softmmu/config-target.h
CC ppc64-softmmu/exec.o
CC ppc64-softmmu/tcg/tcg.o
CC ppc64-softmmu/tcg/tcg-op.o
CC ppc64-softmmu/tcg/tcg-op-vec.o
CC ppc64-softmmu/tcg/tcg-op-gvec.o
CC ppc64-softmmu/tcg/tcg-common.o
CC ppc64-softmmu/tcg/optimize.o
CC ppc64-softmmu/fpu/softfloat.o
CC ppc64-softmmu/disas.o
GEN ppc64-softmmu/gdbstub-xml.c
CC ppc64-softmmu/arch_init.o
CC ppc64-softmmu/cpus.o
CC ppc64-softmmu/monitor.o
CC ppc64-softmmu/gdbstub.o
CC ppc64-softmmu/balloon.o
CC ppc64-softmmu/ioport.o
CC ppc64-softmmu/numa.o
CC ppc64-softmmu/qtest.o
CC ppc64-softmmu/memory.o
CC ppc64-softmmu/memory_mapping.o
CC ppc64-softmmu/dump.o
CC ppc64-softmmu/migration/ram.o
CC ppc64-softmmu/accel/accel.o
CC ppc64-softmmu/accel/stubs/hax-stub.o
CC ppc64-softmmu/accel/stubs/hvf-stub.o
CC ppc64-softmmu/accel/stubs/whpx-stub.o
CC ppc64-softmmu/accel/stubs/kvm-stub.o
CC ppc64-softmmu/accel/tcg/tcg-all.o
CC ppc64-softmmu/accel/tcg/cputlb.o
CC ppc64-softmmu/accel/tcg/tcg-runtime.o
CC ppc64-softmmu/accel/tcg/tcg-runtime-gvec.o
CC ppc64-softmmu/accel/tcg/cpu-exec.o
CC ppc64-softmmu/accel/tcg/cpu-exec-common.o
CC ppc64-softmmu/accel/tcg/translate-all.o
CC ppc64-softmmu/accel/tcg/translator.o
CC ppc64-softmmu/hw/9pfs/virtio-9p-device.o
CC ppc64-softmmu/hw/block/virtio-blk.o
CC ppc64-softmmu/hw/block/vhost-user-blk.o
CC ppc64-softmmu/hw/block/dataplane/virtio-blk.o
CC ppc64-softmmu/hw/char/spapr_vty.o
CC ppc64-softmmu/hw/char/virtio-serial-bus.o
CC ppc64-softmmu/hw/core/generic-loader.o
CC ppc64-softmmu/hw/core/null-machine.o
CC ppc64-softmmu/hw/display/sm501.o
CC ppc64-softmmu/hw/display/vga.o
CC ppc64-softmmu/hw/display/virtio-gpu.o
CC ppc64-softmmu/hw/display/virtio-gpu-3d.o
CC ppc64-softmmu/hw/display/virtio-gpu-pci.o
CC ppc64-softmmu/hw/display/virtio-vga.o
CC ppc64-softmmu/hw/i2c/ppc4xx_i2c.o
CC ppc64-softmmu/hw/intc/xics.o
CC ppc64-softmmu/hw/intc/xics_spapr.o
CC ppc64-softmmu/hw/intc/xics_pnv.o
CC ppc64-softmmu/hw/misc/ivshmem.o
CC ppc64-softmmu/hw/misc/mmio_interface.o
CC ppc64-softmmu/hw/net/spapr_llan.o
CC ppc64-softmmu/hw/net/xilinx_ethlite.o
CC ppc64-softmmu/hw/net/virtio-net.o
CC ppc64-softmmu/hw/net/vhost_net.o
CC ppc64-softmmu/hw/net/fsl_etsec/etsec.o
CC ppc64-softmmu/hw/net/fsl_etsec/registers.o
CC ppc64-softmmu/hw/net/fsl_etsec/rings.o
CC ppc64-softmmu/hw/net/fsl_etsec/miim.o
CC ppc64-softmmu/hw/nvram/spapr_nvram.o
CC ppc64-softmmu/hw/scsi/spapr_vscsi.o
CC ppc64-softmmu/hw/scsi/virtio-scsi.o
CC ppc64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC ppc64-softmmu/hw/scsi/vhost-scsi-common.o
CC ppc64-softmmu/hw/scsi/vhost-scsi.o
CC ppc64-softmmu/hw/scsi/vhost-user-scsi.o
CC ppc64-softmmu/hw/timer/mc146818rtc.o
CC ppc64-softmmu/hw/vfio/common.o
CC ppc64-softmmu/hw/vfio/pci.o
CC ppc64-softmmu/hw/vfio/pci-quirks.o
CC ppc64-softmmu/hw/vfio/platform.o
CC ppc64-softmmu/hw/vfio/spapr.o
CC ppc64-softmmu/hw/virtio/virtio.o
CC ppc64-softmmu/hw/virtio/virtio-balloon.o
CC ppc64-softmmu/hw/virtio/vhost.o
CC ppc64-softmmu/hw/virtio/vhost-backend.o
CC ppc64-softmmu/hw/virtio/vhost-user.o
CC ppc64-softmmu/hw/virtio/vhost-vsock.o
CC ppc64-softmmu/hw/virtio/virtio-crypto.o
CC ppc64-softmmu/hw/virtio/virtio-crypto-pci.o
CC ppc64-softmmu/hw/ppc/ppc.o
CC ppc64-softmmu/hw/ppc/ppc_booke.o
CC ppc64-softmmu/hw/ppc/fdt.o
CC ppc64-softmmu/hw/ppc/spapr.o
CC ppc64-softmmu/hw/ppc/spapr_caps.o
CC ppc64-softmmu/hw/ppc/spapr_vio.o
CC ppc64-softmmu/hw/ppc/spapr_events.o
CC ppc64-softmmu/hw/ppc/spapr_hcall.o
CC ppc64-softmmu/hw/ppc/spapr_iommu.o
CC ppc64-softmmu/hw/ppc/spapr_rtas.o
CC ppc64-softmmu/hw/ppc/spapr_pci.o
CC ppc64-softmmu/hw/ppc/spapr_rtc.o
CC ppc64-softmmu/hw/ppc/spapr_drc.o
CC ppc64-softmmu/hw/ppc/spapr_rng.o
CC ppc64-softmmu/hw/ppc/spapr_cpu_core.o
CC ppc64-softmmu/hw/ppc/spapr_ovec.o
CC ppc64-softmmu/hw/ppc/pnv.o
CC ppc64-softmmu/hw/ppc/pnv_xscom.o
CC ppc64-softmmu/hw/ppc/pnv_core.o
CC ppc64-softmmu/hw/ppc/pnv_lpc.o
CC ppc64-softmmu/hw/ppc/pnv_psi.o
CC ppc64-softmmu/hw/ppc/pnv_occ.o
CC ppc64-softmmu/hw/ppc/pnv_bmc.o
CC ppc64-softmmu/hw/ppc/spapr_pci_vfio.o
CC ppc64-softmmu/hw/ppc/spapr_rtas_ddw.o
CC ppc64-softmmu/hw/ppc/ppc4xx_devs.o
CC ppc64-softmmu/hw/ppc/ppc405_uc.o
CC ppc64-softmmu/hw/ppc/ppc4xx_pci.o
CC ppc64-softmmu/hw/ppc/ppc405_boards.o
CC ppc64-softmmu/hw/ppc/ppc440_bamboo.o
CC ppc64-softmmu/hw/ppc/prep.o
CC ppc64-softmmu/hw/ppc/prep_systemio.o
CC ppc64-softmmu/hw/ppc/rs6000_mc.o
CC ppc64-softmmu/hw/ppc/mac_oldworld.o
CC ppc64-softmmu/hw/ppc/mac_newworld.o
CC ppc64-softmmu/hw/ppc/e500.o
CC ppc64-softmmu/hw/ppc/mpc8544ds.o
CC ppc64-softmmu/hw/ppc/e500plat.o
CC ppc64-softmmu/hw/ppc/mpc8544_guts.o
CC ppc64-softmmu/hw/ppc/ppce500_spin.o
CC ppc64-softmmu/hw/ppc/virtex_ml507.o
CC ppc64-softmmu/target/ppc/cpu-models.o
CC ppc64-softmmu/target/ppc/cpu.o
CC ppc64-softmmu/target/ppc/translate.o
CC ppc64-softmmu/target/ppc/machine.o
CC ppc64-softmmu/target/ppc/mmu_helper.o
CC ppc64-softmmu/target/ppc/mmu-hash32.o
CC ppc64-softmmu/target/ppc/monitor.o
CC ppc64-softmmu/target/ppc/arch_dump.o
CC ppc64-softmmu/target/ppc/mmu-hash64.o
CC ppc64-softmmu/target/ppc/mmu-book3s-v3.o
CC ppc64-softmmu/target/ppc/compat.o
CC ppc64-softmmu/target/ppc/mmu-radix64.o
CC ppc64-softmmu/target/ppc/kvm-stub.o
CC ppc64-softmmu/target/ppc/dfp_helper.o
CC ppc64-softmmu/target/ppc/excp_helper.o
CC ppc64-softmmu/target/ppc/fpu_helper.o
CC ppc64-softmmu/target/ppc/int_helper.o
CC ppc64-softmmu/target/ppc/timebase_helper.o
CC ppc64-softmmu/target/ppc/misc_helper.o
CC ppc64-softmmu/target/ppc/mem_helper.o
CC ppc64-softmmu/target/ppc/gdbstub.o
CC ppc64-softmmu/target/ppc/../../libdecnumber/decContext.o
CC ppc64-softmmu/target/ppc/../../libdecnumber/decNumber.o
CC ppc64-softmmu/target/ppc/../../libdecnumber/dpd/decimal32.o
CC ppc64-softmmu/target/ppc/../../libdecnumber/dpd/decimal64.o
CC ppc64-softmmu/target/ppc/../../libdecnumber/dpd/decimal128.o
GEN trace/generated-helpers.c
CC ppc64-softmmu/trace/control-target.o
CC ppc64-softmmu/gdbstub-xml.o
CC ppc64-softmmu/trace/generated-helpers.o
LINK ppc64-softmmu/qemu-system-ppc64
CC or1k-softmmu/hw/vfio/platform.o
GEN ppcemb-softmmu/hmp-commands.h
CC or1k-softmmu/hw/vfio/spapr.o
GEN ppcemb-softmmu/hmp-commands-info.h
GEN ppcemb-softmmu/config-target.h
CC ppcemb-softmmu/exec.o
CC or1k-softmmu/hw/openrisc/pic_cpu.o
CC or1k-softmmu/hw/openrisc/cputimer.o
CC or1k-softmmu/hw/openrisc/openrisc_sim.o
CC or1k-softmmu/target/openrisc/machine.o
CC or1k-softmmu/target/openrisc/cpu.o
CC or1k-softmmu/target/openrisc/exception.o
CC or1k-softmmu/target/openrisc/interrupt.o
CC or1k-softmmu/target/openrisc/mmu.o
CC ppcemb-softmmu/tcg/tcg.o
CC or1k-softmmu/target/openrisc/translate.o
CC or1k-softmmu/target/openrisc/exception_helper.o
CC or1k-softmmu/target/openrisc/fpu_helper.o
CC or1k-softmmu/target/openrisc/interrupt_helper.o
CC or1k-softmmu/target/openrisc/mmu_helper.o
CC or1k-softmmu/target/openrisc/sys_helper.o
CC ppcemb-softmmu/tcg/tcg-op.o
CC or1k-softmmu/target/openrisc/gdbstub.o
GEN trace/generated-helpers.c
CC or1k-softmmu/trace/control-target.o
CC or1k-softmmu/trace/generated-helpers.o
LINK or1k-softmmu/qemu-system-or1k
CC ppcemb-softmmu/tcg/tcg-op-vec.o
CC ppcemb-softmmu/tcg/tcg-op-gvec.o
GEN ppc-softmmu/hmp-commands.h
GEN ppc-softmmu/hmp-commands-info.h
GEN ppc-softmmu/config-target.h
CC ppc-softmmu/exec.o
CC ppcemb-softmmu/tcg/tcg-common.o
CC ppcemb-softmmu/tcg/optimize.o
CC ppc-softmmu/tcg/tcg.o
CC ppcemb-softmmu/fpu/softfloat.o
CC ppc-softmmu/tcg/tcg-op.o
CC ppc-softmmu/tcg/tcg-op-vec.o
CC ppcemb-softmmu/disas.o
CC ppc-softmmu/tcg/tcg-op-gvec.o
GEN ppcemb-softmmu/gdbstub-xml.c
CC ppcemb-softmmu/arch_init.o
CC ppcemb-softmmu/cpus.o
CC ppcemb-softmmu/monitor.o
CC ppc-softmmu/tcg/tcg-common.o
CC ppc-softmmu/tcg/optimize.o
CC ppcemb-softmmu/gdbstub.o
CC ppc-softmmu/fpu/softfloat.o
CC ppcemb-softmmu/balloon.o
CC ppcemb-softmmu/ioport.o
CC ppcemb-softmmu/numa.o
CC ppcemb-softmmu/qtest.o
CC ppcemb-softmmu/memory.o
CC ppcemb-softmmu/memory_mapping.o
CC ppcemb-softmmu/dump.o
CC ppc-softmmu/disas.o
CC ppcemb-softmmu/migration/ram.o
GEN ppc-softmmu/gdbstub-xml.c
CC ppc-softmmu/arch_init.o
CC ppc-softmmu/cpus.o
CC ppcemb-softmmu/accel/accel.o
CC ppc-softmmu/monitor.o
CC ppcemb-softmmu/accel/stubs/hax-stub.o
CC ppcemb-softmmu/accel/stubs/hvf-stub.o
CC ppcemb-softmmu/accel/stubs/whpx-stub.o
CC ppcemb-softmmu/accel/stubs/kvm-stub.o
CC ppcemb-softmmu/accel/tcg/tcg-all.o
CC ppcemb-softmmu/accel/tcg/cputlb.o
CC ppc-softmmu/gdbstub.o
CC ppc-softmmu/balloon.o
CC ppc-softmmu/ioport.o
CC ppc-softmmu/numa.o
CC ppcemb-softmmu/accel/tcg/tcg-runtime.o
CC ppc-softmmu/qtest.o
CC ppcemb-softmmu/accel/tcg/tcg-runtime-gvec.o
CC ppc-softmmu/memory.o
CC ppcemb-softmmu/accel/tcg/cpu-exec.o
CC ppcemb-softmmu/accel/tcg/cpu-exec-common.o
CC ppc-softmmu/memory_mapping.o
CC ppcemb-softmmu/accel/tcg/translate-all.o
CC ppc-softmmu/dump.o
CC ppcemb-softmmu/accel/tcg/translator.o
CC ppc-softmmu/migration/ram.o
CC ppcemb-softmmu/hw/9pfs/virtio-9p-device.o
CC ppcemb-softmmu/hw/block/virtio-blk.o
CC ppc-softmmu/accel/accel.o
CC ppcemb-softmmu/hw/block/vhost-user-blk.o
CC ppc-softmmu/accel/stubs/hax-stub.o
CC ppc-softmmu/accel/stubs/hvf-stub.o
CC ppcemb-softmmu/hw/block/dataplane/virtio-blk.o
CC ppc-softmmu/accel/stubs/whpx-stub.o
CC ppcemb-softmmu/hw/char/virtio-serial-bus.o
CC ppc-softmmu/accel/stubs/kvm-stub.o
CC ppc-softmmu/accel/tcg/tcg-all.o
CC ppc-softmmu/accel/tcg/cputlb.o
CC ppcemb-softmmu/hw/core/generic-loader.o
CC ppcemb-softmmu/hw/core/null-machine.o
CC ppcemb-softmmu/hw/display/sm501.o
CC ppcemb-softmmu/hw/display/vga.o
CC ppc-softmmu/accel/tcg/tcg-runtime.o
CC ppc-softmmu/accel/tcg/tcg-runtime-gvec.o
CC ppcemb-softmmu/hw/display/virtio-gpu.o
CC ppcemb-softmmu/hw/display/virtio-gpu-3d.o
CC ppc-softmmu/accel/tcg/cpu-exec.o
CC ppc-softmmu/accel/tcg/cpu-exec-common.o
CC ppcemb-softmmu/hw/display/virtio-gpu-pci.o
CC ppc-softmmu/accel/tcg/translate-all.o
CC ppcemb-softmmu/hw/i2c/ppc4xx_i2c.o
CC ppc-softmmu/accel/tcg/translator.o
CC ppcemb-softmmu/hw/misc/ivshmem.o
CC ppcemb-softmmu/hw/misc/mmio_interface.o
CC ppc-softmmu/hw/9pfs/virtio-9p-device.o
CC ppcemb-softmmu/hw/net/xilinx_ethlite.o
CC ppc-softmmu/hw/block/virtio-blk.o
CC ppcemb-softmmu/hw/net/virtio-net.o
CC ppc-softmmu/hw/block/vhost-user-blk.o
CC ppc-softmmu/hw/block/dataplane/virtio-blk.o
CC ppcemb-softmmu/hw/net/vhost_net.o
CC ppcemb-softmmu/hw/scsi/virtio-scsi.o
CC ppc-softmmu/hw/char/virtio-serial-bus.o
CC ppcemb-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC ppc-softmmu/hw/core/generic-loader.o
CC ppcemb-softmmu/hw/scsi/vhost-scsi-common.o
CC ppc-softmmu/hw/core/null-machine.o
CC ppcemb-softmmu/hw/scsi/vhost-scsi.o
CC ppc-softmmu/hw/display/sm501.o
CC ppcemb-softmmu/hw/scsi/vhost-user-scsi.o
CC ppcemb-softmmu/hw/vfio/common.o
CC ppc-softmmu/hw/display/vga.o
CC ppcemb-softmmu/hw/vfio/pci.o
CC ppc-softmmu/hw/display/virtio-gpu.o
CC ppcemb-softmmu/hw/vfio/pci-quirks.o
CC ppc-softmmu/hw/display/virtio-gpu-3d.o
CC ppcemb-softmmu/hw/vfio/platform.o
CC ppc-softmmu/hw/display/virtio-gpu-pci.o
CC ppcemb-softmmu/hw/vfio/spapr.o
CC ppcemb-softmmu/hw/virtio/virtio.o
CC ppc-softmmu/hw/i2c/ppc4xx_i2c.o
CC ppc-softmmu/hw/misc/ivshmem.o
CC ppc-softmmu/hw/misc/mmio_interface.o
CC ppc-softmmu/hw/net/xilinx_ethlite.o
CC ppcemb-softmmu/hw/virtio/virtio-balloon.o
CC ppc-softmmu/hw/net/virtio-net.o
CC ppcemb-softmmu/hw/virtio/vhost.o
CC ppc-softmmu/hw/net/vhost_net.o
CC ppcemb-softmmu/hw/virtio/vhost-backend.o
CC ppc-softmmu/hw/net/fsl_etsec/etsec.o
CC ppcemb-softmmu/hw/virtio/vhost-user.o
CC ppc-softmmu/hw/net/fsl_etsec/registers.o
CC ppc-softmmu/hw/net/fsl_etsec/rings.o
CC ppcemb-softmmu/hw/virtio/vhost-vsock.o
CC ppc-softmmu/hw/net/fsl_etsec/miim.o
CC ppcemb-softmmu/hw/virtio/virtio-crypto.o
CC ppc-softmmu/hw/scsi/virtio-scsi.o
CC ppcemb-softmmu/hw/virtio/virtio-crypto-pci.o
CC ppc-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC ppcemb-softmmu/hw/ppc/ppc.o
CC ppc-softmmu/hw/scsi/vhost-scsi-common.o
CC ppc-softmmu/hw/scsi/vhost-scsi.o
CC ppcemb-softmmu/hw/ppc/ppc_booke.o
CC ppc-softmmu/hw/scsi/vhost-user-scsi.o
CC ppcemb-softmmu/hw/ppc/fdt.o
CC ppc-softmmu/hw/timer/mc146818rtc.o
CC ppcemb-softmmu/hw/ppc/ppc4xx_devs.o
CC ppc-softmmu/hw/vfio/common.o
CC ppcemb-softmmu/hw/ppc/ppc405_uc.o
CC ppcemb-softmmu/hw/ppc/ppc4xx_pci.o
CC ppc-softmmu/hw/vfio/pci.o
CC ppcemb-softmmu/hw/ppc/ppc405_boards.o
CC ppcemb-softmmu/hw/ppc/ppc440_bamboo.o
CC ppcemb-softmmu/hw/ppc/virtex_ml507.o
CC ppcemb-softmmu/target/ppc/cpu-models.o
CC ppc-softmmu/hw/vfio/pci-quirks.o
CC ppc-softmmu/hw/vfio/platform.o
CC ppc-softmmu/hw/vfio/spapr.o
CC ppcemb-softmmu/target/ppc/cpu.o
CC ppc-softmmu/hw/virtio/virtio.o
CC ppcemb-softmmu/target/ppc/translate.o
CC ppc-softmmu/hw/virtio/virtio-balloon.o
CC ppc-softmmu/hw/virtio/vhost.o
CC ppc-softmmu/hw/virtio/vhost-backend.o
CC ppc-softmmu/hw/virtio/vhost-user.o
CC ppc-softmmu/hw/virtio/vhost-vsock.o
CC ppc-softmmu/hw/virtio/virtio-crypto.o
CC ppc-softmmu/hw/virtio/virtio-crypto-pci.o
CC ppc-softmmu/hw/ppc/ppc.o
CC ppc-softmmu/hw/ppc/ppc_booke.o
CC ppc-softmmu/hw/ppc/fdt.o
CC ppc-softmmu/hw/ppc/ppc4xx_devs.o
CC ppc-softmmu/hw/ppc/ppc405_uc.o
CC ppc-softmmu/hw/ppc/ppc4xx_pci.o
CC ppc-softmmu/hw/ppc/ppc405_boards.o
CC ppc-softmmu/hw/ppc/ppc440_bamboo.o
CC ppc-softmmu/hw/ppc/prep.o
CC ppc-softmmu/hw/ppc/prep_systemio.o
CC ppc-softmmu/hw/ppc/rs6000_mc.o
CC ppc-softmmu/hw/ppc/mac_oldworld.o
CC ppc-softmmu/hw/ppc/mac_newworld.o
CC ppc-softmmu/hw/ppc/e500.o
CC ppc-softmmu/hw/ppc/mpc8544ds.o
CC ppc-softmmu/hw/ppc/e500plat.o
CC ppc-softmmu/hw/ppc/mpc8544_guts.o
CC ppc-softmmu/hw/ppc/ppce500_spin.o
CC ppc-softmmu/hw/ppc/virtex_ml507.o
CC ppc-softmmu/target/ppc/cpu-models.o
CC ppc-softmmu/target/ppc/cpu.o
CC ppc-softmmu/target/ppc/translate.o
CC ppcemb-softmmu/target/ppc/machine.o
CC ppcemb-softmmu/target/ppc/mmu_helper.o
CC ppcemb-softmmu/target/ppc/mmu-hash32.o
CC ppcemb-softmmu/target/ppc/monitor.o
CC ppcemb-softmmu/target/ppc/arch_dump.o
CC ppcemb-softmmu/target/ppc/kvm-stub.o
CC ppcemb-softmmu/target/ppc/dfp_helper.o
CC ppcemb-softmmu/target/ppc/excp_helper.o
CC ppcemb-softmmu/target/ppc/fpu_helper.o
CC ppcemb-softmmu/target/ppc/int_helper.o
CC ppcemb-softmmu/target/ppc/timebase_helper.o
CC ppcemb-softmmu/target/ppc/misc_helper.o
CC ppcemb-softmmu/target/ppc/mem_helper.o
CC ppcemb-softmmu/target/ppc/gdbstub.o
CC ppcemb-softmmu/target/ppc/../../libdecnumber/decContext.o
CC ppcemb-softmmu/target/ppc/../../libdecnumber/decNumber.o
CC ppc-softmmu/target/ppc/machine.o
CC ppc-softmmu/target/ppc/mmu_helper.o
CC ppc-softmmu/target/ppc/mmu-hash32.o
CC ppc-softmmu/target/ppc/monitor.o
CC ppcemb-softmmu/target/ppc/../../libdecnumber/dpd/decimal32.o
CC ppcemb-softmmu/target/ppc/../../libdecnumber/dpd/decimal64.o
CC ppc-softmmu/target/ppc/arch_dump.o
CC ppc-softmmu/target/ppc/kvm-stub.o
CC ppcemb-softmmu/target/ppc/../../libdecnumber/dpd/decimal128.o
CC ppc-softmmu/target/ppc/dfp_helper.o
GEN trace/generated-helpers.c
CC ppcemb-softmmu/trace/control-target.o
CC ppcemb-softmmu/gdbstub-xml.o
CC ppcemb-softmmu/trace/generated-helpers.o
CC ppc-softmmu/target/ppc/excp_helper.o
LINK ppcemb-softmmu/qemu-system-ppcemb
CC ppc-softmmu/target/ppc/fpu_helper.o
CC ppc-softmmu/target/ppc/int_helper.o
CC ppc-softmmu/target/ppc/timebase_helper.o
CC ppc-softmmu/target/ppc/misc_helper.o
CC ppc-softmmu/target/ppc/mem_helper.o
CC aarch64-softmmu/target/arm/gdbstub.o
CC mips-softmmu/hw/misc/ivshmem.o
CC ppc-softmmu/target/ppc/gdbstub.o
CC mips-softmmu/hw/misc/mips_cmgcr.o
GEN s390x-softmmu/hmp-commands.h
GEN s390x-softmmu/hmp-commands-info.h
CC s390x-softmmu/gen-features
GEN s390x-softmmu/config-target.h
GEN s390x-softmmu/gen-features.h
CC s390x-softmmu/exec.o
CC mips-softmmu/hw/misc/mips_cpc.o
CC mips-softmmu/hw/misc/mips_itu.o
CC mips-softmmu/hw/misc/mmio_interface.o
CC mips-softmmu/hw/net/virtio-net.o
CC mips-softmmu/hw/net/vhost_net.o
CC mips-softmmu/hw/scsi/virtio-scsi.o
CC s390x-softmmu/tcg/tcg.o
CC mips-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC mips-softmmu/hw/scsi/vhost-scsi-common.o
CC mips-softmmu/hw/scsi/vhost-scsi.o
CC mips-softmmu/hw/scsi/vhost-user-scsi.o
CC mips-softmmu/hw/timer/mips_gictimer.o
CC mips-softmmu/hw/timer/mc146818rtc.o
CC s390x-softmmu/tcg/tcg-op.o
CC mips-softmmu/hw/vfio/common.o
CC mips-softmmu/hw/vfio/pci.o
CC s390x-softmmu/tcg/tcg-op-vec.o
CC mips-softmmu/hw/vfio/pci-quirks.o
CC s390x-softmmu/tcg/tcg-op-gvec.o
CC mips-softmmu/hw/vfio/platform.o
CC mips-softmmu/hw/vfio/spapr.o
CC mips-softmmu/hw/virtio/virtio.o
CC s390x-softmmu/tcg/tcg-common.o
CC s390x-softmmu/tcg/optimize.o
CC mips-softmmu/hw/virtio/virtio-balloon.o
CC mips-softmmu/hw/virtio/vhost.o
CC s390x-softmmu/fpu/softfloat.o
CC mips-softmmu/hw/virtio/vhost-backend.o
CC mips-softmmu/hw/virtio/vhost-user.o
CC mips-softmmu/hw/virtio/vhost-vsock.o
CC mips-softmmu/hw/virtio/virtio-crypto.o
CC mips-softmmu/hw/virtio/virtio-crypto-pci.o
CC mips-softmmu/hw/mips/mips_r4k.o
CC mips-softmmu/hw/mips/mips_malta.o
CC mips-softmmu/hw/mips/mips_mipssim.o
CC mips-softmmu/hw/mips/addr.o
CC mips-softmmu/hw/mips/mips_int.o
CC s390x-softmmu/disas.o
CC mips-softmmu/hw/mips/gt64xxx_pci.o
GEN s390x-softmmu/gdbstub-xml.c
CC s390x-softmmu/arch_init.o
CC mips-softmmu/hw/mips/cps.o
CC s390x-softmmu/cpus.o
CC mips-softmmu/target/mips/translate.o
CC s390x-softmmu/monitor.o
CC s390x-softmmu/gdbstub.o
CC s390x-softmmu/balloon.o
CC s390x-softmmu/ioport.o
CC s390x-softmmu/numa.o
CC s390x-softmmu/qtest.o
CC s390x-softmmu/memory.o
CC s390x-softmmu/memory_mapping.o
CC s390x-softmmu/dump.o
CC s390x-softmmu/migration/ram.o
CC s390x-softmmu/accel/accel.o
CC s390x-softmmu/accel/kvm/kvm-all.o
CC s390x-softmmu/accel/stubs/hax-stub.o
CC s390x-softmmu/accel/stubs/hvf-stub.o
CC s390x-softmmu/accel/stubs/whpx-stub.o
CC mips-softmmu/target/mips/dsp_helper.o
CC s390x-softmmu/accel/tcg/tcg-all.o
CC s390x-softmmu/accel/tcg/cputlb.o
CC mips-softmmu/target/mips/op_helper.o
CC s390x-softmmu/accel/tcg/tcg-runtime.o
CC s390x-softmmu/accel/tcg/tcg-runtime-gvec.o
CC s390x-softmmu/accel/tcg/cpu-exec.o
CC mips-softmmu/target/mips/lmi_helper.o
CC s390x-softmmu/accel/tcg/cpu-exec-common.o
CC mips-softmmu/target/mips/helper.o
CC s390x-softmmu/accel/tcg/translate-all.o
CC mips-softmmu/target/mips/cpu.o
CC s390x-softmmu/accel/tcg/translator.o
CC mips-softmmu/target/mips/gdbstub.o
CC mips-softmmu/target/mips/msa_helper.o
CC s390x-softmmu/hw/9pfs/virtio-9p-device.o
CC s390x-softmmu/hw/block/virtio-blk.o
CC s390x-softmmu/hw/block/vhost-user-blk.o
CC s390x-softmmu/hw/block/dataplane/virtio-blk.o
CC s390x-softmmu/hw/char/virtio-serial-bus.o
CC s390x-softmmu/hw/char/terminal3270.o
CC s390x-softmmu/hw/core/generic-loader.o
CC s390x-softmmu/hw/core/null-machine.o
CC s390x-softmmu/hw/display/virtio-gpu.o
CC s390x-softmmu/hw/display/virtio-gpu-3d.o
CC mips-softmmu/target/mips/mips-semi.o
CC s390x-softmmu/hw/display/virtio-gpu-pci.o
CC mips-softmmu/target/mips/machine.o
CC mips-softmmu/target/mips/cp0_timer.o
CC s390x-softmmu/hw/intc/s390_flic.o
GEN trace/generated-helpers.c
CC mips-softmmu/trace/control-target.o
CC s390x-softmmu/hw/intc/s390_flic_kvm.o
CC mips-softmmu/trace/generated-helpers.o
CC s390x-softmmu/hw/misc/mmio_interface.o
LINK mips-softmmu/qemu-system-mips
CC s390x-softmmu/hw/net/virtio-net.o
CC s390x-softmmu/hw/net/vhost_net.o
CC s390x-softmmu/hw/net/rocker/qmp-norocker.o
CC s390x-softmmu/hw/scsi/virtio-scsi.o
CC ppc-softmmu/target/ppc/../../libdecnumber/decContext.o
CC aarch64-softmmu/target/arm/cpu64.o
CC s390x-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC ppc-softmmu/target/ppc/../../libdecnumber/decNumber.o
CC aarch64-softmmu/target/arm/translate-a64.o
CC aarch64-softmmu/target/arm/helper-a64.o
CC aarch64-softmmu/target/arm/gdbstub64.o
CC aarch64-softmmu/target/arm/crypto_helper.o
CC aarch64-softmmu/target/arm/arm-powerctl.o
GEN trace/generated-helpers.c
CC aarch64-softmmu/trace/control-target.o
CC ppc-softmmu/target/ppc/../../libdecnumber/dpd/decimal32.o
CC ppc-softmmu/target/ppc/../../libdecnumber/dpd/decimal64.o
CC aarch64-softmmu/gdbstub-xml.o
GEN sh4eb-softmmu/hmp-commands.h
GEN sh4eb-softmmu/hmp-commands-info.h
GEN sh4eb-softmmu/config-target.h
CC sh4eb-softmmu/exec.o
CC sh4eb-softmmu/tcg/tcg.o
CC sh4eb-softmmu/tcg/tcg-op.o
CC sh4eb-softmmu/tcg/tcg-op-vec.o
CC sh4eb-softmmu/tcg/tcg-op-gvec.o
CC sh4eb-softmmu/tcg/tcg-common.o
CC sh4eb-softmmu/tcg/optimize.o
CC sh4eb-softmmu/fpu/softfloat.o
CC sh4eb-softmmu/disas.o
CC sh4eb-softmmu/arch_init.o
CC sh4eb-softmmu/cpus.o
CC sh4eb-softmmu/monitor.o
CC sh4eb-softmmu/gdbstub.o
CC sh4eb-softmmu/balloon.o
CC sh4eb-softmmu/ioport.o
CC sh4eb-softmmu/numa.o
CC sh4eb-softmmu/qtest.o
CC sh4eb-softmmu/memory.o
CC sh4eb-softmmu/memory_mapping.o
CC sh4eb-softmmu/dump.o
CC sh4eb-softmmu/migration/ram.o
CC sh4eb-softmmu/accel/accel.o
CC sh4eb-softmmu/accel/stubs/hax-stub.o
CC sh4eb-softmmu/accel/stubs/hvf-stub.o
CC sh4eb-softmmu/accel/stubs/whpx-stub.o
CC sh4eb-softmmu/accel/stubs/kvm-stub.o
CC sh4eb-softmmu/accel/tcg/tcg-all.o
CC sh4eb-softmmu/accel/tcg/cputlb.o
CC sh4eb-softmmu/accel/tcg/tcg-runtime.o
CC sh4eb-softmmu/accel/tcg/tcg-runtime-gvec.o
CC sh4eb-softmmu/accel/tcg/cpu-exec.o
CC sh4eb-softmmu/accel/tcg/cpu-exec-common.o
CC sh4eb-softmmu/accel/tcg/translate-all.o
CC sh4eb-softmmu/accel/tcg/translator.o
CC sh4eb-softmmu/hw/9pfs/virtio-9p-device.o
CC sh4eb-softmmu/hw/block/tc58128.o
CC sh4eb-softmmu/hw/block/virtio-blk.o
CC sh4eb-softmmu/hw/block/vhost-user-blk.o
CC sh4eb-softmmu/hw/block/dataplane/virtio-blk.o
CC sh4eb-softmmu/hw/char/sh_serial.o
CC sh4eb-softmmu/hw/char/virtio-serial-bus.o
CC sh4eb-softmmu/hw/core/generic-loader.o
CC sh4eb-softmmu/hw/core/null-machine.o
CC sh4eb-softmmu/hw/display/sm501.o
CC sh4eb-softmmu/hw/display/vga.o
CC sh4eb-softmmu/hw/display/virtio-gpu.o
CC sh4eb-softmmu/hw/display/virtio-gpu-3d.o
CC sh4eb-softmmu/hw/display/virtio-gpu-pci.o
CC sh4eb-softmmu/hw/intc/sh_intc.o
CC sh4eb-softmmu/hw/misc/ivshmem.o
CC sh4eb-softmmu/hw/misc/mmio_interface.o
CC sh4eb-softmmu/hw/net/virtio-net.o
CC sh4eb-softmmu/hw/net/vhost_net.o
CC sh4eb-softmmu/hw/scsi/virtio-scsi.o
CC sh4eb-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC sh4eb-softmmu/hw/scsi/vhost-scsi-common.o
CC sh4eb-softmmu/hw/scsi/vhost-scsi.o
CC sh4eb-softmmu/hw/scsi/vhost-user-scsi.o
CC sh4eb-softmmu/hw/timer/sh_timer.o
CC sh4eb-softmmu/hw/timer/mc146818rtc.o
CC sh4eb-softmmu/hw/vfio/common.o
CC sh4eb-softmmu/hw/vfio/pci.o
CC sh4eb-softmmu/hw/vfio/pci-quirks.o
CC sh4eb-softmmu/hw/vfio/platform.o
CC sh4eb-softmmu/hw/vfio/spapr.o
CC sh4eb-softmmu/hw/virtio/virtio.o
CC sh4eb-softmmu/hw/virtio/virtio-balloon.o
CC sh4eb-softmmu/hw/virtio/vhost.o
CC sh4eb-softmmu/hw/virtio/vhost-backend.o
CC sh4eb-softmmu/hw/virtio/vhost-user.o
CC sh4eb-softmmu/hw/virtio/vhost-vsock.o
CC sh4eb-softmmu/hw/virtio/virtio-crypto.o
CC sh4eb-softmmu/hw/virtio/virtio-crypto-pci.o
CC sh4eb-softmmu/hw/sh4/shix.o
CC sh4eb-softmmu/hw/sh4/r2d.o
CC sh4eb-softmmu/hw/sh4/sh7750.o
CC sh4eb-softmmu/hw/sh4/sh7750_regnames.o
CC sh4eb-softmmu/hw/sh4/sh_pci.o
CC sh4eb-softmmu/target/sh4/translate.o
CC sh4eb-softmmu/target/sh4/op_helper.o
CC sh4eb-softmmu/target/sh4/helper.o
CC sh4eb-softmmu/target/sh4/cpu.o
CC sh4eb-softmmu/target/sh4/monitor.o
CC sh4eb-softmmu/target/sh4/gdbstub.o
GEN trace/generated-helpers.c
CC sh4eb-softmmu/trace/control-target.o
CC sh4eb-softmmu/trace/generated-helpers.o
LINK sh4eb-softmmu/qemu-system-sh4eb
CC s390x-softmmu/hw/scsi/vhost-scsi-common.o
CC s390x-softmmu/hw/scsi/vhost-scsi.o
CC aarch64-softmmu/trace/generated-helpers.o
CC s390x-softmmu/hw/scsi/vhost-user-scsi.o
CC s390x-softmmu/hw/vfio/common.o
LINK aarch64-softmmu/qemu-system-aarch64
CC s390x-softmmu/hw/vfio/pci.o
CC s390x-softmmu/hw/vfio/pci-quirks.o
CC s390x-softmmu/hw/vfio/ccw.o
CC s390x-softmmu/hw/vfio/platform.o
CC s390x-softmmu/hw/vfio/spapr.o
CC s390x-softmmu/hw/virtio/virtio.o
CC s390x-softmmu/hw/virtio/virtio-balloon.o
CC s390x-softmmu/hw/virtio/vhost.o
CC s390x-softmmu/hw/virtio/vhost-backend.o
CC s390x-softmmu/hw/virtio/vhost-user.o
CC s390x-softmmu/hw/virtio/vhost-vsock.o
CC s390x-softmmu/hw/virtio/virtio-crypto.o
CC s390x-softmmu/hw/virtio/virtio-crypto-pci.o
CC s390x-softmmu/hw/s390x/s390-virtio-hcall.o
CC s390x-softmmu/hw/s390x/sclp.o
CC s390x-softmmu/hw/s390x/event-facility.o
GEN sh4-softmmu/hmp-commands.h
GEN sh4-softmmu/hmp-commands-info.h
GEN sh4-softmmu/config-target.h
CC sh4-softmmu/exec.o
GEN sparc64-softmmu/hmp-commands.h
GEN sparc64-softmmu/hmp-commands-info.h
GEN sparc64-softmmu/config-target.h
CC sparc64-softmmu/exec.o
CC sh4-softmmu/tcg/tcg.o
CC sparc64-softmmu/tcg/tcg.o
CC sh4-softmmu/tcg/tcg-op.o
CC sparc64-softmmu/tcg/tcg-op.o
CC sh4-softmmu/tcg/tcg-op-vec.o
CC sh4-softmmu/tcg/tcg-op-gvec.o
CC sparc64-softmmu/tcg/tcg-op-vec.o
CC sparc64-softmmu/tcg/tcg-op-gvec.o
CC sh4-softmmu/tcg/tcg-common.o
CC sh4-softmmu/tcg/optimize.o
CC sparc64-softmmu/tcg/tcg-common.o
CC sparc64-softmmu/tcg/optimize.o
CC sh4-softmmu/fpu/softfloat.o
CC sparc64-softmmu/fpu/softfloat.o
CC sh4-softmmu/disas.o
CC sh4-softmmu/arch_init.o
CC sparc64-softmmu/disas.o
CC sh4-softmmu/cpus.o
CC sparc64-softmmu/arch_init.o
CC sparc64-softmmu/cpus.o
CC sh4-softmmu/monitor.o
CC sparc64-softmmu/monitor.o
CC sh4-softmmu/gdbstub.o
CC sparc64-softmmu/gdbstub.o
CC sh4-softmmu/balloon.o
CC sh4-softmmu/ioport.o
CC sh4-softmmu/numa.o
CC sparc64-softmmu/balloon.o
CC sparc64-softmmu/ioport.o
CC sh4-softmmu/qtest.o
CC sparc64-softmmu/numa.o
CC sh4-softmmu/memory.o
CC sparc64-softmmu/qtest.o
CC sparc64-softmmu/memory.o
CC sh4-softmmu/memory_mapping.o
CC sh4-softmmu/dump.o
CC sparc64-softmmu/memory_mapping.o
CC sparc64-softmmu/dump.o
CC sh4-softmmu/migration/ram.o
CC sparc64-softmmu/migration/ram.o
CC sh4-softmmu/accel/accel.o
CC sh4-softmmu/accel/stubs/hax-stub.o
CC sh4-softmmu/accel/stubs/hvf-stub.o
CC sparc64-softmmu/accel/accel.o
CC sh4-softmmu/accel/stubs/whpx-stub.o
CC sparc64-softmmu/accel/stubs/hax-stub.o
CC sh4-softmmu/accel/stubs/kvm-stub.o
CC sparc64-softmmu/accel/stubs/hvf-stub.o
CC sh4-softmmu/accel/tcg/tcg-all.o
CC sparc64-softmmu/accel/stubs/whpx-stub.o
CC sh4-softmmu/accel/tcg/cputlb.o
CC sparc64-softmmu/accel/stubs/kvm-stub.o
CC sparc64-softmmu/accel/tcg/tcg-all.o
CC sparc64-softmmu/accel/tcg/cputlb.o
CC sh4-softmmu/accel/tcg/tcg-runtime.o
CC sh4-softmmu/accel/tcg/tcg-runtime-gvec.o
CC sparc64-softmmu/accel/tcg/tcg-runtime.o
CC sparc64-softmmu/accel/tcg/tcg-runtime-gvec.o
CC sh4-softmmu/accel/tcg/cpu-exec.o
CC sh4-softmmu/accel/tcg/cpu-exec-common.o
CC sparc64-softmmu/accel/tcg/cpu-exec.o
CC sh4-softmmu/accel/tcg/translate-all.o
CC sparc64-softmmu/accel/tcg/cpu-exec-common.o
CC sh4-softmmu/accel/tcg/translator.o
CC sparc64-softmmu/accel/tcg/translate-all.o
CC sh4-softmmu/hw/9pfs/virtio-9p-device.o
CC sh4-softmmu/hw/block/tc58128.o
CC sparc64-softmmu/accel/tcg/translator.o
CC sh4-softmmu/hw/block/virtio-blk.o
CC sparc64-softmmu/hw/9pfs/virtio-9p-device.o
CC sparc64-softmmu/hw/block/virtio-blk.o
CC sh4-softmmu/hw/block/vhost-user-blk.o
CC sh4-softmmu/hw/block/dataplane/virtio-blk.o
CC sparc64-softmmu/hw/block/vhost-user-blk.o
CC sh4-softmmu/hw/char/sh_serial.o
CC sparc64-softmmu/hw/block/dataplane/virtio-blk.o
CC sh4-softmmu/hw/char/virtio-serial-bus.o
CC sparc64-softmmu/hw/char/virtio-serial-bus.o
CC sh4-softmmu/hw/core/generic-loader.o
CC sparc64-softmmu/hw/core/generic-loader.o
CC sh4-softmmu/hw/core/null-machine.o
CC sparc64-softmmu/hw/core/null-machine.o
CC sh4-softmmu/hw/display/sm501.o
CC sparc64-softmmu/hw/display/vga.o
CC sh4-softmmu/hw/display/vga.o
CC sparc64-softmmu/hw/display/virtio-gpu.o
CC sh4-softmmu/hw/display/virtio-gpu.o
CC sparc64-softmmu/hw/display/virtio-gpu-3d.o
CC sh4-softmmu/hw/display/virtio-gpu-3d.o
CC sparc64-softmmu/hw/display/virtio-gpu-pci.o
CC sparc64-softmmu/hw/misc/ivshmem.o
CC sh4-softmmu/hw/display/virtio-gpu-pci.o
CC sparc64-softmmu/hw/misc/mmio_interface.o
CC sh4-softmmu/hw/intc/sh_intc.o
CC sparc64-softmmu/hw/net/virtio-net.o
CC sh4-softmmu/hw/misc/ivshmem.o
CC sh4-softmmu/hw/misc/mmio_interface.o
CC sparc64-softmmu/hw/net/vhost_net.o
CC sh4-softmmu/hw/net/virtio-net.o
CC sparc64-softmmu/hw/scsi/virtio-scsi.o
CC sparc64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC sh4-softmmu/hw/net/vhost_net.o
CC sparc64-softmmu/hw/scsi/vhost-scsi-common.o
CC sh4-softmmu/hw/scsi/virtio-scsi.o
CC sparc64-softmmu/hw/scsi/vhost-scsi.o
CC sparc64-softmmu/hw/scsi/vhost-user-scsi.o
CC sh4-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC sparc64-softmmu/hw/timer/mc146818rtc.o
CC sh4-softmmu/hw/scsi/vhost-scsi-common.o
CC sh4-softmmu/hw/scsi/vhost-scsi.o
CC sparc64-softmmu/hw/vfio/common.o
CC sh4-softmmu/hw/scsi/vhost-user-scsi.o
CC sh4-softmmu/hw/timer/sh_timer.o
CC sparc64-softmmu/hw/vfio/pci.o
CC sh4-softmmu/hw/timer/mc146818rtc.o
CC sh4-softmmu/hw/vfio/common.o
CC sparc64-softmmu/hw/vfio/pci-quirks.o
CC sh4-softmmu/hw/vfio/pci.o
CC sparc64-softmmu/hw/vfio/platform.o
CC sparc64-softmmu/hw/vfio/spapr.o
CC sh4-softmmu/hw/vfio/pci-quirks.o
CC sparc64-softmmu/hw/virtio/virtio.o
CC sh4-softmmu/hw/vfio/platform.o
CC sh4-softmmu/hw/vfio/spapr.o
CC sparc64-softmmu/hw/virtio/virtio-balloon.o
CC sh4-softmmu/hw/virtio/virtio.o
CC sparc64-softmmu/hw/virtio/vhost.o
CC sparc64-softmmu/hw/virtio/vhost-backend.o
CC sh4-softmmu/hw/virtio/virtio-balloon.o
CC sparc64-softmmu/hw/virtio/vhost-user.o
CC sh4-softmmu/hw/virtio/vhost.o
CC sparc64-softmmu/hw/virtio/vhost-vsock.o
CC sparc64-softmmu/hw/virtio/virtio-crypto.o
CC sh4-softmmu/hw/virtio/vhost-backend.o
CC sh4-softmmu/hw/virtio/vhost-user.o
CC sparc64-softmmu/hw/virtio/virtio-crypto-pci.o
CC sh4-softmmu/hw/virtio/vhost-vsock.o
CC sparc64-softmmu/hw/sparc64/sparc64.o
CC sh4-softmmu/hw/virtio/virtio-crypto.o
CC sparc64-softmmu/hw/sparc64/sun4u_iommu.o
CC sparc64-softmmu/hw/sparc64/sun4u.o
CC sh4-softmmu/hw/virtio/virtio-crypto-pci.o
CC sparc64-softmmu/hw/sparc64/niagara.o
CC sh4-softmmu/hw/sh4/shix.o
CC sparc64-softmmu/target/sparc/machine.o
CC sh4-softmmu/hw/sh4/r2d.o
CC sparc64-softmmu/target/sparc/monitor.o
CC sh4-softmmu/hw/sh4/sh7750.o
CC sparc64-softmmu/target/sparc/translate.o
CC sh4-softmmu/hw/sh4/sh7750_regnames.o
CC sh4-softmmu/hw/sh4/sh_pci.o
CC sh4-softmmu/target/sh4/translate.o
CC sh4-softmmu/target/sh4/op_helper.o
CC sparc64-softmmu/target/sparc/helper.o
CC sh4-softmmu/target/sh4/helper.o
CC sparc64-softmmu/target/sparc/cpu.o
CC sh4-softmmu/target/sh4/cpu.o
CC sparc64-softmmu/target/sparc/fop_helper.o
CC sh4-softmmu/target/sh4/monitor.o
CC sh4-softmmu/target/sh4/gdbstub.o
CC sparc64-softmmu/target/sparc/cc_helper.o
GEN trace/generated-helpers.c
CC sh4-softmmu/trace/control-target.o
CC sparc64-softmmu/target/sparc/win_helper.o
CC sh4-softmmu/trace/generated-helpers.o
CC sparc64-softmmu/target/sparc/mmu_helper.o
LINK sh4-softmmu/qemu-system-sh4
CC sparc64-softmmu/target/sparc/ldst_helper.o
CC sparc64-softmmu/target/sparc/int64_helper.o
CC sparc64-softmmu/target/sparc/vis_helper.o
CC sparc64-softmmu/target/sparc/gdbstub.o
GEN trace/generated-helpers.c
CC sparc64-softmmu/trace/control-target.o
CC s390x-softmmu/hw/s390x/sclpquiesce.o
CC s390x-softmmu/hw/s390x/sclpcpu.o
CC sparc64-softmmu/trace/generated-helpers.o
GEN sparc-softmmu/hmp-commands.h
GEN sparc-softmmu/hmp-commands-info.h
GEN sparc-softmmu/config-target.h
CC sparc-softmmu/exec.o
CC s390x-softmmu/hw/s390x/ipl.o
LINK sparc64-softmmu/qemu-system-sparc64
CC s390x-softmmu/hw/s390x/css.o
CC s390x-softmmu/hw/s390x/s390-virtio-ccw.o
GEN tricore-softmmu/hmp-commands.h
GEN tricore-softmmu/hmp-commands-info.h
GEN tricore-softmmu/config-target.h
CC tricore-softmmu/exec.o
CC tricore-softmmu/tcg/tcg.o
CC tricore-softmmu/tcg/tcg-op.o
CC tricore-softmmu/tcg/tcg-op-vec.o
CC tricore-softmmu/tcg/tcg-op-gvec.o
CC tricore-softmmu/tcg/tcg-common.o
CC tricore-softmmu/tcg/optimize.o
CC tricore-softmmu/fpu/softfloat.o
CC tricore-softmmu/disas.o
CC tricore-softmmu/arch_init.o
CC tricore-softmmu/cpus.o
CC tricore-softmmu/monitor.o
CC tricore-softmmu/gdbstub.o
CC tricore-softmmu/balloon.o
CC tricore-softmmu/ioport.o
CC tricore-softmmu/numa.o
CC tricore-softmmu/qtest.o
CC tricore-softmmu/memory.o
CC tricore-softmmu/memory_mapping.o
CC tricore-softmmu/dump.o
CC tricore-softmmu/migration/ram.o
CC tricore-softmmu/accel/accel.o
CC tricore-softmmu/accel/stubs/hax-stub.o
CC tricore-softmmu/accel/stubs/hvf-stub.o
CC tricore-softmmu/accel/stubs/whpx-stub.o
CC tricore-softmmu/accel/stubs/kvm-stub.o
CC tricore-softmmu/accel/tcg/tcg-all.o
CC tricore-softmmu/accel/tcg/cputlb.o
CC tricore-softmmu/accel/tcg/tcg-runtime.o
CC tricore-softmmu/accel/tcg/tcg-runtime-gvec.o
CC tricore-softmmu/accel/tcg/cpu-exec.o
CC tricore-softmmu/accel/tcg/cpu-exec-common.o
CC tricore-softmmu/accel/tcg/translate-all.o
CC tricore-softmmu/accel/tcg/translator.o
CC tricore-softmmu/hw/core/generic-loader.o
CC tricore-softmmu/hw/core/null-machine.o
CC tricore-softmmu/hw/misc/mmio_interface.o
CC tricore-softmmu/hw/net/vhost_net.o
CC tricore-softmmu/hw/net/rocker/qmp-norocker.o
CC tricore-softmmu/hw/vfio/common.o
CC tricore-softmmu/hw/vfio/platform.o
CC tricore-softmmu/hw/vfio/spapr.o
CC tricore-softmmu/hw/tricore/tricore_testboard.o
CC tricore-softmmu/target/tricore/translate.o
CC tricore-softmmu/target/tricore/helper.o
CC tricore-softmmu/target/tricore/cpu.o
CC tricore-softmmu/target/tricore/op_helper.o
CC tricore-softmmu/target/tricore/fpu_helper.o
GEN trace/generated-helpers.c
CC tricore-softmmu/trace/control-target.o
CC tricore-softmmu/trace/generated-helpers.o
LINK tricore-softmmu/qemu-system-tricore
CC sparc-softmmu/tcg/tcg.o
CC s390x-softmmu/hw/s390x/3270-ccw.o
CC s390x-softmmu/hw/s390x/virtio-ccw.o
GEN unicore32-softmmu/hmp-commands.h
GEN unicore32-softmmu/hmp-commands-info.h
GEN unicore32-softmmu/config-target.h
CC unicore32-softmmu/exec.o
CC s390x-softmmu/hw/s390x/css-bridge.o
CC s390x-softmmu/hw/s390x/ccw-device.o
CC s390x-softmmu/hw/s390x/s390-pci-bus.o
CC sparc-softmmu/tcg/tcg-op.o
CC s390x-softmmu/hw/s390x/s390-pci-inst.o
CC unicore32-softmmu/tcg/tcg.o
CC s390x-softmmu/hw/s390x/s390-skeys.o
CC s390x-softmmu/hw/s390x/s390-stattrib.o
CC s390x-softmmu/hw/s390x/s390-skeys-kvm.o
CC s390x-softmmu/hw/s390x/s390-stattrib-kvm.o
CC sparc-softmmu/tcg/tcg-op-vec.o
CC s390x-softmmu/hw/s390x/s390-ccw.o
CC s390x-softmmu/target/s390x/cpu.o
CC sparc-softmmu/tcg/tcg-op-gvec.o
CC unicore32-softmmu/tcg/tcg-op.o
CC s390x-softmmu/target/s390x/cpu_models.o
CC s390x-softmmu/target/s390x/cpu_features.o
CC s390x-softmmu/target/s390x/gdbstub.o
CC s390x-softmmu/target/s390x/interrupt.o
CC sparc-softmmu/tcg/tcg-common.o
CC s390x-softmmu/target/s390x/helper.o
CC sparc-softmmu/tcg/optimize.o
CC unicore32-softmmu/tcg/tcg-op-vec.o
CC s390x-softmmu/target/s390x/translate.o
CC unicore32-softmmu/tcg/tcg-op-gvec.o
CC sparc-softmmu/fpu/softfloat.o
CC unicore32-softmmu/tcg/tcg-common.o
CC unicore32-softmmu/tcg/optimize.o
CC unicore32-softmmu/fpu/softfloat.o
CC s390x-softmmu/target/s390x/cc_helper.o
CC s390x-softmmu/target/s390x/excp_helper.o
CC sparc-softmmu/disas.o
CC s390x-softmmu/target/s390x/fpu_helper.o
CC sparc-softmmu/arch_init.o
CC sparc-softmmu/cpus.o
CC s390x-softmmu/target/s390x/int_helper.o
CC s390x-softmmu/target/s390x/mem_helper.o
CC sparc-softmmu/monitor.o
CC unicore32-softmmu/disas.o
CC unicore32-softmmu/arch_init.o
CC sparc-softmmu/gdbstub.o
CC unicore32-softmmu/cpus.o
CC unicore32-softmmu/monitor.o
CC sparc-softmmu/balloon.o
CC s390x-softmmu/target/s390x/misc_helper.o
CC sparc-softmmu/ioport.o
CC sparc-softmmu/numa.o
CC s390x-softmmu/target/s390x/crypto_helper.o
CC sparc-softmmu/qtest.o
CC s390x-softmmu/target/s390x/machine.o
CC s390x-softmmu/target/s390x/ioinst.o
CC sparc-softmmu/memory.o
CC unicore32-softmmu/gdbstub.o
CC s390x-softmmu/target/s390x/arch_dump.o
CC s390x-softmmu/target/s390x/mmu_helper.o
CC unicore32-softmmu/balloon.o
CC s390x-softmmu/target/s390x/diag.o
CC unicore32-softmmu/ioport.o
CC s390x-softmmu/target/s390x/sigp.o
CC unicore32-softmmu/numa.o
CC sparc-softmmu/memory_mapping.o
CC s390x-softmmu/target/s390x/kvm.o
CC sparc-softmmu/dump.o
CC unicore32-softmmu/qtest.o
GEN trace/generated-helpers.c
CC unicore32-softmmu/memory.o
CC s390x-softmmu/trace/control-target.o
CC sparc-softmmu/migration/ram.o
CC s390x-softmmu/gdbstub-xml.o
CC s390x-softmmu/trace/generated-helpers.o
LINK s390x-softmmu/qemu-system-s390x
CC sparc-softmmu/accel/accel.o
CC unicore32-softmmu/memory_mapping.o
CC sparc-softmmu/accel/stubs/hax-stub.o
CC sparc-softmmu/accel/stubs/hvf-stub.o
CC unicore32-softmmu/dump.o
CC sparc-softmmu/accel/stubs/whpx-stub.o
CC sparc-softmmu/accel/stubs/kvm-stub.o
CC sparc-softmmu/accel/tcg/tcg-all.o
CC sparc-softmmu/accel/tcg/cputlb.o
CC sparc-softmmu/accel/tcg/tcg-runtime.o
CC unicore32-softmmu/migration/ram.o
CC sparc-softmmu/accel/tcg/tcg-runtime-gvec.o
CC unicore32-softmmu/accel/accel.o
CC unicore32-softmmu/accel/stubs/hax-stub.o
CC sparc-softmmu/accel/tcg/cpu-exec.o
CC unicore32-softmmu/accel/stubs/hvf-stub.o
CC sparc-softmmu/accel/tcg/cpu-exec-common.o
CC sparc-softmmu/accel/tcg/translate-all.o
CC sparc-softmmu/accel/tcg/translator.o
CC sparc-softmmu/hw/core/generic-loader.o
CC sparc-softmmu/hw/core/null-machine.o
CC sparc-softmmu/hw/display/tcx.o
CC sparc-softmmu/hw/display/cg3.o
CC sparc-softmmu/hw/intc/grlib_irqmp.o
CC sparc-softmmu/hw/misc/eccmemctl.o
GEN x86_64-softmmu/hmp-commands.h
GEN x86_64-softmmu/hmp-commands-info.h
GEN x86_64-softmmu/config-target.h
CC x86_64-softmmu/exec.o
CC x86_64-softmmu/tcg/tcg.o
CC x86_64-softmmu/tcg/tcg-op.o
CC x86_64-softmmu/tcg/tcg-op-vec.o
CC x86_64-softmmu/tcg/tcg-op-gvec.o
CC x86_64-softmmu/tcg/tcg-common.o
CC x86_64-softmmu/tcg/optimize.o
CC x86_64-softmmu/fpu/softfloat.o
CC x86_64-softmmu/disas.o
GEN x86_64-softmmu/gdbstub-xml.c
CC x86_64-softmmu/arch_init.o
CC x86_64-softmmu/cpus.o
CC x86_64-softmmu/monitor.o
CC x86_64-softmmu/gdbstub.o
CC x86_64-softmmu/balloon.o
CC x86_64-softmmu/ioport.o
CC x86_64-softmmu/numa.o
CC x86_64-softmmu/qtest.o
CC x86_64-softmmu/memory.o
CC x86_64-softmmu/memory_mapping.o
CC x86_64-softmmu/dump.o
CC x86_64-softmmu/migration/ram.o
CC x86_64-softmmu/accel/accel.o
CC x86_64-softmmu/accel/stubs/hax-stub.o
CC x86_64-softmmu/accel/stubs/hvf-stub.o
CC x86_64-softmmu/accel/stubs/whpx-stub.o
CC x86_64-softmmu/accel/stubs/kvm-stub.o
CC x86_64-softmmu/accel/tcg/tcg-all.o
CC x86_64-softmmu/accel/tcg/cputlb.o
CC x86_64-softmmu/accel/tcg/tcg-runtime.o
CC x86_64-softmmu/accel/tcg/tcg-runtime-gvec.o
CC x86_64-softmmu/accel/tcg/cpu-exec.o
CC x86_64-softmmu/accel/tcg/cpu-exec-common.o
CC x86_64-softmmu/accel/tcg/translate-all.o
CC x86_64-softmmu/accel/tcg/translator.o
CC x86_64-softmmu/hw/9pfs/virtio-9p-device.o
CC x86_64-softmmu/hw/block/virtio-blk.o
CC x86_64-softmmu/hw/block/vhost-user-blk.o
CC x86_64-softmmu/hw/block/dataplane/virtio-blk.o
CC x86_64-softmmu/hw/char/virtio-serial-bus.o
CC x86_64-softmmu/hw/core/generic-loader.o
CC x86_64-softmmu/hw/core/null-machine.o
CC x86_64-softmmu/hw/display/vga.o
CC x86_64-softmmu/hw/display/virtio-gpu.o
CC x86_64-softmmu/hw/display/virtio-gpu-3d.o
CC x86_64-softmmu/hw/display/virtio-gpu-pci.o
CC x86_64-softmmu/hw/display/virtio-vga.o
CC x86_64-softmmu/hw/intc/apic.o
CC x86_64-softmmu/hw/intc/apic_common.o
CC x86_64-softmmu/hw/intc/ioapic.o
CC x86_64-softmmu/hw/isa/lpc_ich9.o
CC x86_64-softmmu/hw/misc/ivshmem.o
CC x86_64-softmmu/hw/misc/pvpanic.o
CC x86_64-softmmu/hw/misc/mmio_interface.o
CC x86_64-softmmu/hw/net/virtio-net.o
CC x86_64-softmmu/hw/net/vhost_net.o
CC x86_64-softmmu/hw/scsi/virtio-scsi.o
CC x86_64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC x86_64-softmmu/hw/scsi/vhost-scsi-common.o
CC x86_64-softmmu/hw/scsi/vhost-scsi.o
CC x86_64-softmmu/hw/scsi/vhost-user-scsi.o
CC x86_64-softmmu/hw/timer/mc146818rtc.o
CC x86_64-softmmu/hw/vfio/common.o
CC x86_64-softmmu/hw/vfio/pci.o
CC x86_64-softmmu/hw/vfio/pci-quirks.o
CC x86_64-softmmu/hw/vfio/platform.o
CC x86_64-softmmu/hw/vfio/spapr.o
CC x86_64-softmmu/hw/virtio/virtio.o
CC x86_64-softmmu/hw/virtio/virtio-balloon.o
CC x86_64-softmmu/hw/virtio/vhost.o
CC x86_64-softmmu/hw/virtio/vhost-backend.o
CC x86_64-softmmu/hw/virtio/vhost-user.o
CC x86_64-softmmu/hw/virtio/vhost-vsock.o
CC x86_64-softmmu/hw/virtio/virtio-crypto.o
CC x86_64-softmmu/hw/virtio/virtio-crypto-pci.o
CC x86_64-softmmu/hw/i386/multiboot.o
CC x86_64-softmmu/hw/i386/pc.o
CC x86_64-softmmu/hw/i386/pc_piix.o
CC x86_64-softmmu/hw/i386/pc_q35.o
CC x86_64-softmmu/hw/i386/pc_sysfw.o
CC x86_64-softmmu/hw/i386/x86-iommu.o
CC x86_64-softmmu/hw/i386/intel_iommu.o
CC x86_64-softmmu/hw/i386/amd_iommu.o
CC x86_64-softmmu/hw/i386/vmport.o
CC x86_64-softmmu/hw/i386/vmmouse.o
CC x86_64-softmmu/hw/i386/kvmvapic.o
CC x86_64-softmmu/hw/i386/acpi-build.o
CC x86_64-softmmu/target/i386/helper.o
CC x86_64-softmmu/target/i386/cpu.o
CC x86_64-softmmu/target/i386/gdbstub.o
CC x86_64-softmmu/target/i386/xsave_helper.o
CC x86_64-softmmu/target/i386/translate.o
CC x86_64-softmmu/target/i386/bpt_helper.o
CC x86_64-softmmu/target/i386/cc_helper.o
CC x86_64-softmmu/target/i386/excp_helper.o
CC x86_64-softmmu/target/i386/fpu_helper.o
CC x86_64-softmmu/target/i386/int_helper.o
CC x86_64-softmmu/target/i386/mem_helper.o
CC x86_64-softmmu/target/i386/misc_helper.o
CC x86_64-softmmu/target/i386/mpx_helper.o
CC x86_64-softmmu/target/i386/seg_helper.o
CC x86_64-softmmu/target/i386/smm_helper.o
CC x86_64-softmmu/target/i386/svm_helper.o
CC x86_64-softmmu/target/i386/machine.o
CC x86_64-softmmu/target/i386/arch_memory_mapping.o
CC x86_64-softmmu/target/i386/arch_dump.o
CC x86_64-softmmu/target/i386/monitor.o
CC x86_64-softmmu/target/i386/kvm-stub.o
GEN trace/generated-helpers.c
CC x86_64-softmmu/trace/control-target.o
CC x86_64-softmmu/gdbstub-xml.o
CC x86_64-softmmu/trace/generated-helpers.o
LINK x86_64-softmmu/qemu-system-x86_64
CC ppc-softmmu/target/ppc/../../libdecnumber/dpd/decimal128.o
GEN xtensaeb-softmmu/hmp-commands.h
GEN trace/generated-helpers.c
GEN xtensaeb-softmmu/hmp-commands-info.h
GEN xtensaeb-softmmu/config-target.h
CC ppc-softmmu/trace/control-target.o
CC xtensaeb-softmmu/exec.o
CC ppc-softmmu/gdbstub-xml.o
CC ppc-softmmu/trace/generated-helpers.o
LINK ppc-softmmu/qemu-system-ppc
CC xtensaeb-softmmu/tcg/tcg.o
CC xtensaeb-softmmu/tcg/tcg-op.o
CC xtensaeb-softmmu/tcg/tcg-op-vec.o
CC xtensaeb-softmmu/tcg/tcg-op-gvec.o
GEN xtensa-softmmu/hmp-commands.h
GEN xtensa-softmmu/hmp-commands-info.h
GEN xtensa-softmmu/config-target.h
CC xtensa-softmmu/exec.o
CC xtensa-softmmu/tcg/tcg.o
CC xtensa-softmmu/tcg/tcg-op.o
CC xtensa-softmmu/tcg/tcg-op-vec.o
CC xtensa-softmmu/tcg/tcg-op-gvec.o
CC xtensa-softmmu/tcg/tcg-common.o
CC xtensa-softmmu/tcg/optimize.o
CC xtensa-softmmu/fpu/softfloat.o
CC xtensa-softmmu/disas.o
CC xtensa-softmmu/arch_init.o
CC xtensa-softmmu/cpus.o
CC xtensa-softmmu/monitor.o
CC xtensa-softmmu/gdbstub.o
CC xtensa-softmmu/balloon.o
CC xtensa-softmmu/ioport.o
CC xtensa-softmmu/numa.o
CC xtensa-softmmu/qtest.o
CC xtensa-softmmu/memory.o
CC xtensa-softmmu/memory_mapping.o
CC xtensa-softmmu/dump.o
CC xtensa-softmmu/migration/ram.o
CC xtensa-softmmu/accel/accel.o
CC xtensa-softmmu/accel/stubs/hax-stub.o
CC xtensa-softmmu/accel/stubs/hvf-stub.o
CC xtensa-softmmu/accel/stubs/whpx-stub.o
CC xtensa-softmmu/accel/stubs/kvm-stub.o
CC xtensa-softmmu/accel/tcg/tcg-all.o
CC xtensa-softmmu/accel/tcg/cputlb.o
CC xtensa-softmmu/accel/tcg/tcg-runtime.o
CC xtensa-softmmu/accel/tcg/tcg-runtime-gvec.o
CC xtensa-softmmu/accel/tcg/cpu-exec.o
CC xtensa-softmmu/accel/tcg/cpu-exec-common.o
CC xtensa-softmmu/accel/tcg/translate-all.o
CC xtensa-softmmu/accel/tcg/translator.o
CC xtensa-softmmu/hw/core/generic-loader.o
CC xtensa-softmmu/hw/core/null-machine.o
CC xtensa-softmmu/hw/misc/mmio_interface.o
CC xtensa-softmmu/hw/net/vhost_net.o
CC xtensa-softmmu/hw/net/rocker/qmp-norocker.o
CC xtensa-softmmu/hw/vfio/common.o
CC xtensa-softmmu/hw/vfio/platform.o
CC xtensa-softmmu/hw/vfio/spapr.o
CC xtensa-softmmu/hw/xtensa/pic_cpu.o
CC xtensa-softmmu/hw/xtensa/sim.o
CC xtensa-softmmu/hw/xtensa/xtensa_memory.o
CC xtensa-softmmu/hw/xtensa/xtfpga.o
CC xtensa-softmmu/target/xtensa/xtensa-semi.o
CC xtensa-softmmu/target/xtensa/core-dc232b.o
CC xtensa-softmmu/target/xtensa/core-dc233c.o
CC xtensa-softmmu/target/xtensa/core-de212.o
CC xtensa-softmmu/target/xtensa/core-fsf.o
CC xtensa-softmmu/target/xtensa/core-sample_controller.o
CC xtensa-softmmu/target/xtensa/monitor.o
CC xtensa-softmmu/target/xtensa/xtensa-isa.o
CC xtensa-softmmu/target/xtensa/translate.o
CC xtensa-softmmu/target/xtensa/op_helper.o
CC xtensa-softmmu/target/xtensa/helper.o
CC xtensa-softmmu/target/xtensa/cpu.o
CC xtensa-softmmu/target/xtensa/gdbstub.o
GEN trace/generated-helpers.c
CC xtensa-softmmu/trace/control-target.o
CC xtensa-softmmu/trace/generated-helpers.o
LINK xtensa-softmmu/qemu-system-xtensa
CC sparc-softmmu/hw/misc/mmio_interface.o
CC sparc-softmmu/hw/misc/slavio_misc.o
CC unicore32-softmmu/accel/stubs/whpx-stub.o
GEN aarch64_be-linux-user/config-target.h
CC sparc-softmmu/hw/net/vhost_net.o
CC aarch64_be-linux-user/exec.o
CC unicore32-softmmu/accel/stubs/kvm-stub.o
CC sparc-softmmu/hw/net/rocker/qmp-norocker.o
CC unicore32-softmmu/accel/tcg/tcg-all.o
CC aarch64_be-linux-user/tcg/tcg.o
CC sparc-softmmu/hw/vfio/common.o
CC unicore32-softmmu/accel/tcg/cputlb.o
CC sparc-softmmu/hw/vfio/platform.o
CC sparc-softmmu/hw/vfio/spapr.o
CC sparc-softmmu/hw/sparc/sun4m_iommu.o
CC sparc-softmmu/hw/sparc/sun4m.o
CC unicore32-softmmu/accel/tcg/tcg-runtime.o
CC sparc-softmmu/hw/sparc/leon3.o
CC aarch64_be-linux-user/tcg/tcg-op.o
CC unicore32-softmmu/accel/tcg/tcg-runtime-gvec.o
CC sparc-softmmu/target/sparc/machine.o
CC sparc-softmmu/target/sparc/monitor.o
CC sparc-softmmu/target/sparc/translate.o
CC unicore32-softmmu/accel/tcg/cpu-exec.o
CC unicore32-softmmu/accel/tcg/cpu-exec-common.o
CC unicore32-softmmu/accel/tcg/translate-all.o
CC aarch64_be-linux-user/tcg/tcg-op-vec.o
CC sparc-softmmu/target/sparc/helper.o
CC unicore32-softmmu/accel/tcg/translator.o
CC aarch64_be-linux-user/tcg/tcg-op-gvec.o
CC sparc-softmmu/target/sparc/cpu.o
CC unicore32-softmmu/hw/core/generic-loader.o
CC sparc-softmmu/target/sparc/fop_helper.o
CC unicore32-softmmu/hw/core/null-machine.o
CC unicore32-softmmu/hw/misc/mmio_interface.o
CC sparc-softmmu/target/sparc/cc_helper.o
CC unicore32-softmmu/hw/net/vhost_net.o
CC sparc-softmmu/target/sparc/win_helper.o
CC unicore32-softmmu/hw/net/rocker/qmp-norocker.o
CC sparc-softmmu/target/sparc/mmu_helper.o
CC unicore32-softmmu/hw/vfio/common.o
CC sparc-softmmu/target/sparc/ldst_helper.o
CC aarch64_be-linux-user/tcg/tcg-common.o
CC aarch64_be-linux-user/tcg/optimize.o
CC unicore32-softmmu/hw/vfio/platform.o
CC sparc-softmmu/target/sparc/int32_helper.o
CC sparc-softmmu/target/sparc/gdbstub.o
CC unicore32-softmmu/hw/vfio/spapr.o
GEN trace/generated-helpers.c
CC sparc-softmmu/trace/control-target.o
CC unicore32-softmmu/hw/unicore32/puv3.o
CC sparc-softmmu/trace/generated-helpers.o
CC aarch64_be-linux-user/fpu/softfloat.o
LINK sparc-softmmu/qemu-system-sparc
CC unicore32-softmmu/target/unicore32/translate.o
GEN aarch64-linux-user/config-target.h
CC aarch64-linux-user/exec.o
CC aarch64-linux-user/tcg/tcg.o
CC unicore32-softmmu/target/unicore32/op_helper.o
CC unicore32-softmmu/target/unicore32/helper.o
CC unicore32-softmmu/target/unicore32/cpu.o
CC unicore32-softmmu/target/unicore32/ucf64_helper.o
CC unicore32-softmmu/target/unicore32/softmmu.o
GEN trace/generated-helpers.c
CC unicore32-softmmu/trace/control-target.o
CC unicore32-softmmu/trace/generated-helpers.o
LINK unicore32-softmmu/qemu-system-unicore32
CC aarch64-linux-user/tcg/tcg-op.o
GEN alpha-linux-user/config-target.h
CC alpha-linux-user/exec.o
CC alpha-linux-user/tcg/tcg.o
CC alpha-linux-user/tcg/tcg-op.o
CC alpha-linux-user/tcg/tcg-op-vec.o
CC alpha-linux-user/tcg/tcg-op-gvec.o
CC alpha-linux-user/tcg/tcg-common.o
CC alpha-linux-user/tcg/optimize.o
CC alpha-linux-user/fpu/softfloat.o
CC alpha-linux-user/disas.o
CC alpha-linux-user/gdbstub.o
CC alpha-linux-user/thunk.o
CC alpha-linux-user/accel/stubs/hax-stub.o
CC alpha-linux-user/accel/stubs/hvf-stub.o
CC alpha-linux-user/accel/stubs/whpx-stub.o
CC alpha-linux-user/accel/stubs/kvm-stub.o
CC alpha-linux-user/accel/tcg/tcg-runtime.o
CC alpha-linux-user/accel/tcg/tcg-runtime-gvec.o
CC alpha-linux-user/accel/tcg/cpu-exec.o
CC alpha-linux-user/accel/tcg/cpu-exec-common.o
CC alpha-linux-user/accel/tcg/translate-all.o
CC alpha-linux-user/accel/tcg/translator.o
CC alpha-linux-user/accel/tcg/user-exec.o
CC alpha-linux-user/accel/tcg/user-exec-stub.o
CC alpha-linux-user/linux-user/main.o
CC alpha-linux-user/linux-user/syscall.o
CC alpha-linux-user/linux-user/strace.o
CC alpha-linux-user/linux-user/mmap.o
CC alpha-linux-user/linux-user/signal.o
CC alpha-linux-user/linux-user/elfload.o
CC alpha-linux-user/linux-user/linuxload.o
CC alpha-linux-user/linux-user/uaccess.o
CC alpha-linux-user/linux-user/uname.o
CCAS alpha-linux-user/linux-user/safe-syscall.o
CC alpha-linux-user/target/alpha/translate.o
CC alpha-linux-user/target/alpha/helper.o
CC alpha-linux-user/target/alpha/cpu.o
CC alpha-linux-user/target/alpha/int_helper.o
CC alpha-linux-user/target/alpha/fpu_helper.o
CC alpha-linux-user/target/alpha/vax_helper.o
CC alpha-linux-user/target/alpha/sys_helper.o
CC alpha-linux-user/target/alpha/mem_helper.o
CC alpha-linux-user/target/alpha/gdbstub.o
GEN trace/generated-helpers.c
CC alpha-linux-user/trace/control-target.o
CC alpha-linux-user/trace/generated-helpers.o
LINK alpha-linux-user/qemu-alpha
GEN armeb-linux-user/config-target.h
CC armeb-linux-user/exec.o
CC armeb-linux-user/tcg/tcg.o
CC armeb-linux-user/tcg/tcg-op.o
CC armeb-linux-user/tcg/tcg-op-vec.o
CC armeb-linux-user/tcg/tcg-op-gvec.o
CC armeb-linux-user/tcg/tcg-common.o
CC armeb-linux-user/tcg/optimize.o
CC armeb-linux-user/fpu/softfloat.o
CC armeb-linux-user/disas.o
GEN armeb-linux-user/gdbstub-xml.c
CC armeb-linux-user/gdbstub.o
CC armeb-linux-user/thunk.o
CC armeb-linux-user/accel/stubs/hax-stub.o
CC armeb-linux-user/accel/stubs/hvf-stub.o
CC armeb-linux-user/accel/stubs/whpx-stub.o
CC armeb-linux-user/accel/stubs/kvm-stub.o
CC armeb-linux-user/accel/tcg/tcg-runtime.o
CC armeb-linux-user/accel/tcg/tcg-runtime-gvec.o
CC armeb-linux-user/accel/tcg/cpu-exec.o
CC armeb-linux-user/accel/tcg/cpu-exec-common.o
CC armeb-linux-user/accel/tcg/translate-all.o
CC armeb-linux-user/accel/tcg/translator.o
CC armeb-linux-user/accel/tcg/user-exec.o
CC armeb-linux-user/accel/tcg/user-exec-stub.o
CC armeb-linux-user/linux-user/main.o
CC armeb-linux-user/linux-user/syscall.o
CC armeb-linux-user/linux-user/strace.o
CC armeb-linux-user/linux-user/mmap.o
CC armeb-linux-user/linux-user/signal.o
CC armeb-linux-user/linux-user/elfload.o
CC armeb-linux-user/linux-user/linuxload.o
CC armeb-linux-user/linux-user/uaccess.o
CC armeb-linux-user/linux-user/uname.o
CCAS armeb-linux-user/linux-user/safe-syscall.o
CC armeb-linux-user/linux-user/flatload.o
CC armeb-linux-user/linux-user/arm/nwfpe/fpa11.o
CC armeb-linux-user/linux-user/arm/nwfpe/fpa11_cpdo.o
CC armeb-linux-user/linux-user/arm/nwfpe/fpa11_cpdt.o
CC armeb-linux-user/linux-user/arm/nwfpe/fpa11_cprt.o
CC armeb-linux-user/linux-user/arm/nwfpe/fpopcode.o
CC armeb-linux-user/linux-user/arm/nwfpe/single_cpdo.o
CC armeb-linux-user/linux-user/arm/nwfpe/double_cpdo.o
CC armeb-linux-user/linux-user/arm/nwfpe/extended_cpdo.o
CC armeb-linux-user/target/arm/arm-semi.o
CC armeb-linux-user/target/arm/kvm-stub.o
CC armeb-linux-user/target/arm/translate.o
CC armeb-linux-user/target/arm/op_helper.o
CC armeb-linux-user/target/arm/helper.o
CC armeb-linux-user/target/arm/cpu.o
CC armeb-linux-user/target/arm/neon_helper.o
CC armeb-linux-user/target/arm/iwmmxt_helper.o
CC armeb-linux-user/target/arm/gdbstub.o
CC armeb-linux-user/target/arm/crypto_helper.o
GEN trace/generated-helpers.c
CC armeb-linux-user/trace/control-target.o
CC armeb-linux-user/gdbstub-xml.o
CC armeb-linux-user/trace/generated-helpers.o
LINK armeb-linux-user/qemu-armeb
CC xtensaeb-softmmu/tcg/tcg-common.o
GEN arm-linux-user/config-target.h
CC arm-linux-user/exec.o
CC xtensaeb-softmmu/tcg/optimize.o
CC arm-linux-user/tcg/tcg.o
CC xtensaeb-softmmu/fpu/softfloat.o
CC arm-linux-user/tcg/tcg-op.o
CC arm-linux-user/tcg/tcg-op-vec.o
CC xtensaeb-softmmu/disas.o
CC xtensaeb-softmmu/arch_init.o
CC arm-linux-user/tcg/tcg-op-gvec.o
CC xtensaeb-softmmu/cpus.o
CC xtensaeb-softmmu/monitor.o
CC arm-linux-user/tcg/tcg-common.o
CC arm-linux-user/tcg/optimize.o
CC xtensaeb-softmmu/gdbstub.o
CC arm-linux-user/fpu/softfloat.o
CC xtensaeb-softmmu/balloon.o
CC xtensaeb-softmmu/ioport.o
CC xtensaeb-softmmu/numa.o
CC xtensaeb-softmmu/qtest.o
CC xtensaeb-softmmu/memory.o
CC xtensaeb-softmmu/memory_mapping.o
CC xtensaeb-softmmu/dump.o
CC arm-linux-user/disas.o
CC xtensaeb-softmmu/migration/ram.o
GEN arm-linux-user/gdbstub-xml.c
CC arm-linux-user/gdbstub.o
CC xtensaeb-softmmu/accel/accel.o
CC arm-linux-user/thunk.o
CC xtensaeb-softmmu/accel/stubs/hax-stub.o
CC arm-linux-user/accel/stubs/hax-stub.o
CC xtensaeb-softmmu/accel/stubs/hvf-stub.o
CC arm-linux-user/accel/stubs/hvf-stub.o
CC xtensaeb-softmmu/accel/stubs/whpx-stub.o
CC xtensaeb-softmmu/accel/stubs/kvm-stub.o
CC arm-linux-user/accel/stubs/whpx-stub.o
CC arm-linux-user/accel/stubs/kvm-stub.o
CC xtensaeb-softmmu/accel/tcg/tcg-all.o
CC xtensaeb-softmmu/accel/tcg/cputlb.o
CC arm-linux-user/accel/tcg/tcg-runtime.o
CC arm-linux-user/accel/tcg/tcg-runtime-gvec.o
CC arm-linux-user/accel/tcg/cpu-exec.o
CC xtensaeb-softmmu/accel/tcg/tcg-runtime.o
CC arm-linux-user/accel/tcg/cpu-exec-common.o
CC arm-linux-user/accel/tcg/translate-all.o
CC xtensaeb-softmmu/accel/tcg/tcg-runtime-gvec.o
CC arm-linux-user/accel/tcg/translator.o
CC arm-linux-user/accel/tcg/user-exec.o
CC xtensaeb-softmmu/accel/tcg/cpu-exec.o
CC xtensaeb-softmmu/accel/tcg/cpu-exec-common.o
CC arm-linux-user/accel/tcg/user-exec-stub.o
CC xtensaeb-softmmu/accel/tcg/translate-all.o
CC arm-linux-user/linux-user/main.o
CC xtensaeb-softmmu/accel/tcg/translator.o
CC arm-linux-user/linux-user/syscall.o
CC xtensaeb-softmmu/hw/core/generic-loader.o
CC xtensaeb-softmmu/hw/core/null-machine.o
CC xtensaeb-softmmu/hw/misc/mmio_interface.o
CC xtensaeb-softmmu/hw/net/vhost_net.o
CC xtensaeb-softmmu/hw/net/rocker/qmp-norocker.o
CC xtensaeb-softmmu/hw/vfio/common.o
CC xtensaeb-softmmu/hw/vfio/platform.o
CC xtensaeb-softmmu/hw/vfio/spapr.o
CC xtensaeb-softmmu/hw/xtensa/pic_cpu.o
CC xtensaeb-softmmu/hw/xtensa/sim.o
CC xtensaeb-softmmu/hw/xtensa/xtensa_memory.o
CC xtensaeb-softmmu/hw/xtensa/xtfpga.o
CC xtensaeb-softmmu/target/xtensa/xtensa-semi.o
CC xtensaeb-softmmu/target/xtensa/core-dc232b.o
CC arm-linux-user/linux-user/strace.o
CC arm-linux-user/linux-user/mmap.o
CC xtensaeb-softmmu/target/xtensa/core-dc233c.o
CC arm-linux-user/linux-user/signal.o
CC arm-linux-user/linux-user/elfload.o
CC xtensaeb-softmmu/target/xtensa/core-de212.o
CC arm-linux-user/linux-user/linuxload.o
CC arm-linux-user/linux-user/uaccess.o
CC xtensaeb-softmmu/target/xtensa/core-fsf.o
CC arm-linux-user/linux-user/uname.o
CCAS arm-linux-user/linux-user/safe-syscall.o
CC arm-linux-user/linux-user/flatload.o
CC xtensaeb-softmmu/target/xtensa/core-sample_controller.o
CC arm-linux-user/linux-user/arm/nwfpe/fpa11.o
CC arm-linux-user/linux-user/arm/nwfpe/fpa11_cpdo.o
CC arm-linux-user/linux-user/arm/nwfpe/fpa11_cpdt.o
CC xtensaeb-softmmu/target/xtensa/monitor.o
CC arm-linux-user/linux-user/arm/nwfpe/fpa11_cprt.o
CC xtensaeb-softmmu/target/xtensa/xtensa-isa.o
CC arm-linux-user/linux-user/arm/nwfpe/fpopcode.o
CC arm-linux-user/linux-user/arm/nwfpe/single_cpdo.o
CC xtensaeb-softmmu/target/xtensa/translate.o
CC arm-linux-user/linux-user/arm/nwfpe/double_cpdo.o
CC arm-linux-user/linux-user/arm/nwfpe/extended_cpdo.o
CC arm-linux-user/target/arm/arm-semi.o
CC arm-linux-user/target/arm/kvm-stub.o
CC arm-linux-user/target/arm/translate.o
CC xtensaeb-softmmu/target/xtensa/op_helper.o
CC xtensaeb-softmmu/target/xtensa/helper.o
CC xtensaeb-softmmu/target/xtensa/cpu.o
CC xtensaeb-softmmu/target/xtensa/gdbstub.o
GEN trace/generated-helpers.c
CC xtensaeb-softmmu/trace/control-target.o
CC xtensaeb-softmmu/trace/generated-helpers.o
LINK xtensaeb-softmmu/qemu-system-xtensaeb
GEN cris-linux-user/config-target.h
CC cris-linux-user/exec.o
CC cris-linux-user/tcg/tcg.o
CC cris-linux-user/tcg/tcg-op.o
CC arm-linux-user/target/arm/op_helper.o
CC cris-linux-user/tcg/tcg-op-vec.o
CC arm-linux-user/target/arm/helper.o
CC cris-linux-user/tcg/tcg-op-gvec.o
CC cris-linux-user/tcg/tcg-common.o
CC cris-linux-user/tcg/optimize.o
CC arm-linux-user/target/arm/cpu.o
CC cris-linux-user/fpu/softfloat.o
CC arm-linux-user/target/arm/neon_helper.o
CC arm-linux-user/target/arm/iwmmxt_helper.o
CC arm-linux-user/target/arm/gdbstub.o
CC arm-linux-user/target/arm/crypto_helper.o
GEN trace/generated-helpers.c
CC arm-linux-user/trace/control-target.o
CC arm-linux-user/gdbstub-xml.o
CC arm-linux-user/trace/generated-helpers.o
LINK arm-linux-user/qemu-arm
CC cris-linux-user/disas.o
GEN hppa-linux-user/config-target.h
CC hppa-linux-user/exec.o
CC hppa-linux-user/tcg/tcg.o
CC hppa-linux-user/tcg/tcg-op.o
CC hppa-linux-user/tcg/tcg-op-vec.o
CC hppa-linux-user/tcg/tcg-op-gvec.o
CC hppa-linux-user/tcg/tcg-common.o
CC hppa-linux-user/tcg/optimize.o
CC hppa-linux-user/fpu/softfloat.o
CC hppa-linux-user/disas.o
CC hppa-linux-user/gdbstub.o
CC hppa-linux-user/thunk.o
CC hppa-linux-user/accel/stubs/hax-stub.o
CC hppa-linux-user/accel/stubs/hvf-stub.o
CC hppa-linux-user/accel/stubs/whpx-stub.o
CC hppa-linux-user/accel/stubs/kvm-stub.o
CC hppa-linux-user/accel/tcg/tcg-runtime.o
CC hppa-linux-user/accel/tcg/tcg-runtime-gvec.o
CC hppa-linux-user/accel/tcg/cpu-exec.o
CC hppa-linux-user/accel/tcg/cpu-exec-common.o
CC hppa-linux-user/accel/tcg/translate-all.o
CC hppa-linux-user/accel/tcg/translator.o
CC hppa-linux-user/accel/tcg/user-exec.o
CC hppa-linux-user/accel/tcg/user-exec-stub.o
CC hppa-linux-user/linux-user/main.o
CC hppa-linux-user/linux-user/syscall.o
CC hppa-linux-user/linux-user/strace.o
CC hppa-linux-user/linux-user/mmap.o
CC hppa-linux-user/linux-user/signal.o
CC hppa-linux-user/linux-user/elfload.o
CC hppa-linux-user/linux-user/linuxload.o
CC hppa-linux-user/linux-user/uaccess.o
CC hppa-linux-user/linux-user/uname.o
CCAS hppa-linux-user/linux-user/safe-syscall.o
CC hppa-linux-user/target/hppa/translate.o
CC hppa-linux-user/target/hppa/helper.o
CC hppa-linux-user/target/hppa/cpu.o
CC hppa-linux-user/target/hppa/op_helper.o
CC hppa-linux-user/target/hppa/gdbstub.o
CC hppa-linux-user/target/hppa/mem_helper.o
CC hppa-linux-user/target/hppa/int_helper.o
GEN trace/generated-helpers.c
CC hppa-linux-user/trace/control-target.o
CC hppa-linux-user/trace/generated-helpers.o
LINK hppa-linux-user/qemu-hppa
GEN i386-linux-user/config-target.h
CC i386-linux-user/exec.o
CC i386-linux-user/tcg/tcg.o
CC i386-linux-user/tcg/tcg-op.o
CC i386-linux-user/tcg/tcg-op-vec.o
CC i386-linux-user/tcg/tcg-op-gvec.o
CC i386-linux-user/tcg/tcg-common.o
CC i386-linux-user/tcg/optimize.o
CC i386-linux-user/fpu/softfloat.o
CC i386-linux-user/disas.o
GEN i386-linux-user/gdbstub-xml.c
CC i386-linux-user/gdbstub.o
CC i386-linux-user/thunk.o
CC i386-linux-user/accel/stubs/hax-stub.o
CC i386-linux-user/accel/stubs/hvf-stub.o
CC i386-linux-user/accel/stubs/whpx-stub.o
CC i386-linux-user/accel/stubs/kvm-stub.o
CC i386-linux-user/accel/tcg/tcg-runtime.o
CC i386-linux-user/accel/tcg/tcg-runtime-gvec.o
CC i386-linux-user/accel/tcg/cpu-exec.o
CC i386-linux-user/accel/tcg/cpu-exec-common.o
CC i386-linux-user/accel/tcg/translate-all.o
CC i386-linux-user/accel/tcg/translator.o
CC i386-linux-user/accel/tcg/user-exec.o
CC i386-linux-user/accel/tcg/user-exec-stub.o
CC i386-linux-user/linux-user/main.o
CC i386-linux-user/linux-user/syscall.o
CC i386-linux-user/linux-user/strace.o
CC i386-linux-user/linux-user/mmap.o
CC i386-linux-user/linux-user/signal.o
CC i386-linux-user/linux-user/elfload.o
CC i386-linux-user/linux-user/linuxload.o
CC i386-linux-user/linux-user/uaccess.o
CC i386-linux-user/linux-user/uname.o
CCAS i386-linux-user/linux-user/safe-syscall.o
CC i386-linux-user/linux-user/vm86.o
CC i386-linux-user/target/i386/helper.o
CC i386-linux-user/target/i386/cpu.o
CC i386-linux-user/target/i386/gdbstub.o
CC i386-linux-user/target/i386/xsave_helper.o
CC i386-linux-user/target/i386/translate.o
CC i386-linux-user/target/i386/bpt_helper.o
CC i386-linux-user/target/i386/cc_helper.o
CC i386-linux-user/target/i386/excp_helper.o
CC i386-linux-user/target/i386/fpu_helper.o
CC i386-linux-user/target/i386/int_helper.o
CC i386-linux-user/target/i386/mem_helper.o
CC i386-linux-user/target/i386/misc_helper.o
CC i386-linux-user/target/i386/mpx_helper.o
CC i386-linux-user/target/i386/seg_helper.o
CC i386-linux-user/target/i386/smm_helper.o
CC i386-linux-user/target/i386/svm_helper.o
CC i386-linux-user/target/i386/kvm-stub.o
GEN trace/generated-helpers.c
CC i386-linux-user/trace/control-target.o
CC i386-linux-user/gdbstub-xml.o
CC i386-linux-user/trace/generated-helpers.o
LINK i386-linux-user/qemu-i386
CC aarch64-linux-user/tcg/tcg-op-vec.o
GEN m68k-linux-user/config-target.h
CC m68k-linux-user/exec.o
CC m68k-linux-user/tcg/tcg.o
CC aarch64-linux-user/tcg/tcg-op-gvec.o
CC aarch64-linux-user/tcg/tcg-common.o
CC m68k-linux-user/tcg/tcg-op.o
CC aarch64-linux-user/tcg/optimize.o
CC aarch64-linux-user/fpu/softfloat.o
CC m68k-linux-user/tcg/tcg-op-vec.o
CC m68k-linux-user/tcg/tcg-op-gvec.o
CC m68k-linux-user/tcg/tcg-common.o
CC m68k-linux-user/tcg/optimize.o
CC m68k-linux-user/fpu/softfloat.o
CC aarch64-linux-user/disas.o
GEN aarch64-linux-user/gdbstub-xml.c
CC aarch64-linux-user/gdbstub.o
CC aarch64-linux-user/thunk.o
CC aarch64-linux-user/accel/stubs/hax-stub.o
CC aarch64-linux-user/accel/stubs/hvf-stub.o
CC aarch64-linux-user/accel/stubs/whpx-stub.o
CC aarch64-linux-user/accel/stubs/kvm-stub.o
CC aarch64-linux-user/accel/tcg/tcg-runtime.o
CC aarch64-linux-user/accel/tcg/tcg-runtime-gvec.o
CC m68k-linux-user/disas.o
CC aarch64-linux-user/accel/tcg/cpu-exec.o
GEN m68k-linux-user/gdbstub-xml.c
CC m68k-linux-user/gdbstub.o
CC aarch64-linux-user/accel/tcg/cpu-exec-common.o
CC aarch64-linux-user/accel/tcg/translate-all.o
CC m68k-linux-user/thunk.o
CC m68k-linux-user/accel/stubs/hax-stub.o
CC aarch64-linux-user/accel/tcg/translator.o
CC m68k-linux-user/accel/stubs/hvf-stub.o
CC m68k-linux-user/accel/stubs/whpx-stub.o
CC m68k-linux-user/accel/stubs/kvm-stub.o
CC aarch64-linux-user/accel/tcg/user-exec.o
CC m68k-linux-user/accel/tcg/tcg-runtime.o
CC m68k-linux-user/accel/tcg/tcg-runtime-gvec.o
CC aarch64-linux-user/accel/tcg/user-exec-stub.o
CC aarch64-linux-user/linux-user/main.o
CC aarch64-linux-user/linux-user/syscall.o
CC m68k-linux-user/accel/tcg/cpu-exec.o
CC m68k-linux-user/accel/tcg/cpu-exec-common.o
CC m68k-linux-user/accel/tcg/translate-all.o
CC m68k-linux-user/accel/tcg/translator.o
CC m68k-linux-user/accel/tcg/user-exec.o
CC m68k-linux-user/accel/tcg/user-exec-stub.o
CC m68k-linux-user/linux-user/main.o
CC m68k-linux-user/linux-user/syscall.o
CC aarch64-linux-user/linux-user/strace.o
CC aarch64-linux-user/linux-user/mmap.o
CC aarch64-linux-user/linux-user/signal.o
CC aarch64-linux-user/linux-user/elfload.o
CC aarch64-linux-user/linux-user/linuxload.o
CC aarch64-linux-user/linux-user/uaccess.o
CC aarch64-linux-user/linux-user/uname.o
CCAS aarch64-linux-user/linux-user/safe-syscall.o
CC aarch64-linux-user/linux-user/flatload.o
CC aarch64-linux-user/target/arm/arm-semi.o
CC m68k-linux-user/linux-user/strace.o
CC aarch64-linux-user/target/arm/kvm-stub.o
CC aarch64-linux-user/target/arm/translate.o
CC m68k-linux-user/linux-user/mmap.o
CC m68k-linux-user/linux-user/signal.o
CC m68k-linux-user/linux-user/elfload.o
CC m68k-linux-user/linux-user/linuxload.o
CC m68k-linux-user/linux-user/uaccess.o
CC m68k-linux-user/linux-user/uname.o
CCAS m68k-linux-user/linux-user/safe-syscall.o
CC m68k-linux-user/linux-user/flatload.o
CC m68k-linux-user/linux-user/m68k-sim.o
CC m68k-linux-user/target/m68k/m68k-semi.o
CC m68k-linux-user/target/m68k/translate.o
CC m68k-linux-user/target/m68k/op_helper.o
CC aarch64-linux-user/target/arm/op_helper.o
CC m68k-linux-user/target/m68k/helper.o
CC m68k-linux-user/target/m68k/cpu.o
CC m68k-linux-user/target/m68k/fpu_helper.o
CC aarch64-linux-user/target/arm/helper.o
CC m68k-linux-user/target/m68k/gdbstub.o
GEN trace/generated-helpers.c
CC m68k-linux-user/trace/control-target.o
CC m68k-linux-user/gdbstub-xml.o
CC m68k-linux-user/trace/generated-helpers.o
LINK m68k-linux-user/qemu-m68k
GEN microblazeel-linux-user/config-target.h
CC microblazeel-linux-user/exec.o
CC microblazeel-linux-user/tcg/tcg.o
CC aarch64-linux-user/target/arm/cpu.o
CC aarch64-linux-user/target/arm/neon_helper.o
CC aarch64-linux-user/target/arm/iwmmxt_helper.o
CC microblazeel-linux-user/tcg/tcg-op.o
CC aarch64-linux-user/target/arm/gdbstub.o
CC aarch64-linux-user/target/arm/cpu64.o
CC aarch64-linux-user/target/arm/translate-a64.o
CC microblazeel-linux-user/tcg/tcg-op-vec.o
CC microblazeel-linux-user/tcg/tcg-op-gvec.o
CC microblazeel-linux-user/tcg/tcg-common.o
CC microblazeel-linux-user/tcg/optimize.o
CC microblazeel-linux-user/fpu/softfloat.o
CC aarch64-linux-user/target/arm/helper-a64.o
CC aarch64-linux-user/target/arm/gdbstub64.o
CC aarch64-linux-user/target/arm/crypto_helper.o
GEN trace/generated-helpers.c
CC aarch64-linux-user/trace/control-target.o
CC aarch64-linux-user/gdbstub-xml.o
CC aarch64-linux-user/trace/generated-helpers.o
CC microblazeel-linux-user/disas.o
LINK aarch64-linux-user/qemu-aarch64
CC microblazeel-linux-user/gdbstub.o
CC microblazeel-linux-user/thunk.o
CC cris-linux-user/gdbstub.o
CC aarch64_be-linux-user/disas.o
CC microblazeel-linux-user/accel/stubs/hax-stub.o
CC microblazeel-linux-user/accel/stubs/hvf-stub.o
CC cris-linux-user/thunk.o
GEN microblaze-linux-user/config-target.h
GEN aarch64_be-linux-user/gdbstub-xml.c
CC microblaze-linux-user/exec.o
CC microblazeel-linux-user/accel/stubs/whpx-stub.o
CC aarch64_be-linux-user/gdbstub.o
CC microblazeel-linux-user/accel/stubs/kvm-stub.o
CC cris-linux-user/accel/stubs/hax-stub.o
CC microblaze-linux-user/tcg/tcg.o
CC cris-linux-user/accel/stubs/hvf-stub.o
CC microblazeel-linux-user/accel/tcg/tcg-runtime.o
CC cris-linux-user/accel/stubs/whpx-stub.o
CC aarch64_be-linux-user/thunk.o
CC microblazeel-linux-user/accel/tcg/tcg-runtime-gvec.o
CC cris-linux-user/accel/stubs/kvm-stub.o
CC aarch64_be-linux-user/accel/stubs/hax-stub.o
CC cris-linux-user/accel/tcg/tcg-runtime.o
CC aarch64_be-linux-user/accel/stubs/hvf-stub.o
CC cris-linux-user/accel/tcg/tcg-runtime-gvec.o
CC microblazeel-linux-user/accel/tcg/cpu-exec.o
CC microblaze-linux-user/tcg/tcg-op.o
CC aarch64_be-linux-user/accel/stubs/whpx-stub.o
CC aarch64_be-linux-user/accel/stubs/kvm-stub.o
CC microblazeel-linux-user/accel/tcg/cpu-exec-common.o
CC aarch64_be-linux-user/accel/tcg/tcg-runtime.o
CC cris-linux-user/accel/tcg/cpu-exec.o
CC microblazeel-linux-user/accel/tcg/translate-all.o
CC aarch64_be-linux-user/accel/tcg/tcg-runtime-gvec.o
CC cris-linux-user/accel/tcg/cpu-exec-common.o
CC microblazeel-linux-user/accel/tcg/translator.o
CC microblaze-linux-user/tcg/tcg-op-vec.o
CC cris-linux-user/accel/tcg/translate-all.o
CC microblaze-linux-user/tcg/tcg-op-gvec.o
CC microblazeel-linux-user/accel/tcg/user-exec.o
CC aarch64_be-linux-user/accel/tcg/cpu-exec.o
CC cris-linux-user/accel/tcg/translator.o
CC microblazeel-linux-user/accel/tcg/user-exec-stub.o
CC aarch64_be-linux-user/accel/tcg/cpu-exec-common.o
CC aarch64_be-linux-user/accel/tcg/translate-all.o
CC cris-linux-user/accel/tcg/user-exec.o
CC microblazeel-linux-user/linux-user/main.o
CC microblaze-linux-user/tcg/tcg-common.o
CC aarch64_be-linux-user/accel/tcg/translator.o
CC microblaze-linux-user/tcg/optimize.o
CC microblazeel-linux-user/linux-user/syscall.o
CC cris-linux-user/accel/tcg/user-exec-stub.o
CC aarch64_be-linux-user/accel/tcg/user-exec.o
CC cris-linux-user/linux-user/main.o
CC microblaze-linux-user/fpu/softfloat.o
CC aarch64_be-linux-user/accel/tcg/user-exec-stub.o
CC cris-linux-user/linux-user/syscall.o
CC aarch64_be-linux-user/linux-user/main.o
CC aarch64_be-linux-user/linux-user/syscall.o
CC microblazeel-linux-user/linux-user/strace.o
CC microblaze-linux-user/disas.o
CC microblaze-linux-user/gdbstub.o
CC microblazeel-linux-user/linux-user/mmap.o
CC aarch64_be-linux-user/linux-user/strace.o
CC cris-linux-user/linux-user/strace.o
CC microblaze-linux-user/thunk.o
CC microblazeel-linux-user/linux-user/signal.o
CC microblaze-linux-user/accel/stubs/hax-stub.o
CC aarch64_be-linux-user/linux-user/mmap.o
CC microblaze-linux-user/accel/stubs/hvf-stub.o
CC cris-linux-user/linux-user/mmap.o
CC microblazeel-linux-user/linux-user/elfload.o
CC microblaze-linux-user/accel/stubs/whpx-stub.o
CC aarch64_be-linux-user/linux-user/signal.o
CC cris-linux-user/linux-user/signal.o
CC microblaze-linux-user/accel/stubs/kvm-stub.o
CC microblazeel-linux-user/linux-user/linuxload.o
CC microblaze-linux-user/accel/tcg/tcg-runtime.o
CC aarch64_be-linux-user/linux-user/elfload.o
CC cris-linux-user/linux-user/elfload.o
CC microblazeel-linux-user/linux-user/uaccess.o
CC microblaze-linux-user/accel/tcg/tcg-runtime-gvec.o
CC microblazeel-linux-user/linux-user/uname.o
CC cris-linux-user/linux-user/linuxload.o
CC aarch64_be-linux-user/linux-user/linuxload.o
CCAS microblazeel-linux-user/linux-user/safe-syscall.o
CC cris-linux-user/linux-user/uaccess.o
CC microblazeel-linux-user/linux-user/flatload.o
CC aarch64_be-linux-user/linux-user/uaccess.o
CC cris-linux-user/linux-user/uname.o
CC microblaze-linux-user/accel/tcg/cpu-exec.o
CCAS cris-linux-user/linux-user/safe-syscall.o
CC cris-linux-user/target/cris/translate.o
CC microblazeel-linux-user/target/microblaze/translate.o
CC aarch64_be-linux-user/linux-user/uname.o
CC microblaze-linux-user/accel/tcg/cpu-exec-common.o
CCAS aarch64_be-linux-user/linux-user/safe-syscall.o
CC microblaze-linux-user/accel/tcg/translate-all.o
CC aarch64_be-linux-user/linux-user/flatload.o
CC microblaze-linux-user/accel/tcg/translator.o
CC aarch64_be-linux-user/target/arm/arm-semi.o
CC microblazeel-linux-user/target/microblaze/op_helper.o
CC microblaze-linux-user/accel/tcg/user-exec.o
CC microblazeel-linux-user/target/microblaze/helper.o
CC cris-linux-user/target/cris/op_helper.o
CC aarch64_be-linux-user/target/arm/kvm-stub.o
CC microblazeel-linux-user/target/microblaze/cpu.o
CC cris-linux-user/target/cris/helper.o
CC microblaze-linux-user/accel/tcg/user-exec-stub.o
CC aarch64_be-linux-user/target/arm/translate.o
CC microblazeel-linux-user/target/microblaze/gdbstub.o
CC microblaze-linux-user/linux-user/main.o
CC cris-linux-user/target/cris/cpu.o
GEN trace/generated-helpers.c
CC microblazeel-linux-user/trace/control-target.o
CC cris-linux-user/target/cris/gdbstub.o
CC microblaze-linux-user/linux-user/syscall.o
GEN trace/generated-helpers.c
CC cris-linux-user/trace/control-target.o
CC microblazeel-linux-user/trace/generated-helpers.o
CC cris-linux-user/trace/generated-helpers.o
LINK microblazeel-linux-user/qemu-microblazeel
LINK cris-linux-user/qemu-cris
CC microblaze-linux-user/linux-user/strace.o
CC microblaze-linux-user/linux-user/mmap.o
CC microblaze-linux-user/linux-user/signal.o
CC microblaze-linux-user/linux-user/elfload.o
CC microblaze-linux-user/linux-user/linuxload.o
CC microblaze-linux-user/linux-user/uaccess.o
CC aarch64_be-linux-user/target/arm/op_helper.o
CC aarch64_be-linux-user/target/arm/helper.o
CC microblaze-linux-user/linux-user/uname.o
CCAS microblaze-linux-user/linux-user/safe-syscall.o
CC microblaze-linux-user/linux-user/flatload.o
CC aarch64_be-linux-user/target/arm/cpu.o
CC microblaze-linux-user/target/microblaze/translate.o
CC aarch64_be-linux-user/target/arm/neon_helper.o
CC microblaze-linux-user/target/microblaze/op_helper.o
CC aarch64_be-linux-user/target/arm/iwmmxt_helper.o
CC aarch64_be-linux-user/target/arm/gdbstub.o
CC microblaze-linux-user/target/microblaze/helper.o
CC aarch64_be-linux-user/target/arm/cpu64.o
CC microblaze-linux-user/target/microblaze/cpu.o
CC microblaze-linux-user/target/microblaze/gdbstub.o
GEN trace/generated-helpers.c
CC microblaze-linux-user/trace/control-target.o
GEN mips64el-linux-user/config-target.h
CC mips64el-linux-user/exec.o
CC microblaze-linux-user/trace/generated-helpers.o
CC mips64el-linux-user/tcg/tcg.o
LINK microblaze-linux-user/qemu-microblaze
GEN mips64-linux-user/config-target.h
CC mips64-linux-user/exec.o
CC mips64-linux-user/tcg/tcg.o
CC mips64el-linux-user/tcg/tcg-op.o
CC mips64-linux-user/tcg/tcg-op.o
CC mips64el-linux-user/tcg/tcg-op-vec.o
CC mips64el-linux-user/tcg/tcg-op-gvec.o
CC mips64-linux-user/tcg/tcg-op-vec.o
CC mips64-linux-user/tcg/tcg-op-gvec.o
CC mips64el-linux-user/tcg/tcg-common.o
CC mips64el-linux-user/tcg/optimize.o
CC mips64-linux-user/tcg/tcg-common.o
CC mips64-linux-user/tcg/optimize.o
CC mips64el-linux-user/fpu/softfloat.o
CC mips64-linux-user/fpu/softfloat.o
CC mips64el-linux-user/disas.o
CC mips64el-linux-user/gdbstub.o
CC mips64-linux-user/disas.o
CC mips64el-linux-user/thunk.o
CC mips64-linux-user/gdbstub.o
CC mips64el-linux-user/accel/stubs/hax-stub.o
CC mips64el-linux-user/accel/stubs/hvf-stub.o
CC mips64-linux-user/thunk.o
CC mips64el-linux-user/accel/stubs/whpx-stub.o
CC mips64el-linux-user/accel/stubs/kvm-stub.o
CC mips64-linux-user/accel/stubs/hax-stub.o
CC mips64el-linux-user/accel/tcg/tcg-runtime.o
CC mips64-linux-user/accel/stubs/hvf-stub.o
CC mips64-linux-user/accel/stubs/whpx-stub.o
CC mips64el-linux-user/accel/tcg/tcg-runtime-gvec.o
CC mips64-linux-user/accel/stubs/kvm-stub.o
CC mips64-linux-user/accel/tcg/tcg-runtime.o
CC mips64-linux-user/accel/tcg/tcg-runtime-gvec.o
CC mips64el-linux-user/accel/tcg/cpu-exec.o
CC mips64el-linux-user/accel/tcg/cpu-exec-common.o
CC mips64el-linux-user/accel/tcg/translate-all.o
CC mips64-linux-user/accel/tcg/cpu-exec.o
CC mips64-linux-user/accel/tcg/cpu-exec-common.o
CC mips64el-linux-user/accel/tcg/translator.o
CC mips64-linux-user/accel/tcg/translate-all.o
CC mips64el-linux-user/accel/tcg/user-exec.o
CC mips64-linux-user/accel/tcg/translator.o
CC mips64el-linux-user/accel/tcg/user-exec-stub.o
CC mips64-linux-user/accel/tcg/user-exec.o
CC mips64el-linux-user/linux-user/main.o
CC mips64el-linux-user/linux-user/syscall.o
CC mips64-linux-user/accel/tcg/user-exec-stub.o
CC mips64-linux-user/linux-user/main.o
CC mips64-linux-user/linux-user/syscall.o
CC mips64el-linux-user/linux-user/strace.o
CC mips64el-linux-user/linux-user/mmap.o
CC mips64-linux-user/linux-user/strace.o
CC mips64el-linux-user/linux-user/signal.o
CC mips64-linux-user/linux-user/mmap.o
CC mips64el-linux-user/linux-user/elfload.o
CC mips64-linux-user/linux-user/signal.o
CC mips64-linux-user/linux-user/elfload.o
CC mips64el-linux-user/linux-user/linuxload.o
CC mips64el-linux-user/linux-user/uaccess.o
CC mips64-linux-user/linux-user/linuxload.o
CC mips64el-linux-user/linux-user/uname.o
CC mips64-linux-user/linux-user/uaccess.o
CCAS mips64el-linux-user/linux-user/safe-syscall.o
CC mips64el-linux-user/target/mips/translate.o
CC mips64-linux-user/linux-user/uname.o
CCAS mips64-linux-user/linux-user/safe-syscall.o
CC mips64-linux-user/target/mips/translate.o
CC mips64el-linux-user/target/mips/dsp_helper.o
CC mips64-linux-user/target/mips/dsp_helper.o
CC mips64el-linux-user/target/mips/op_helper.o
CC mips64-linux-user/target/mips/op_helper.o
CC mips64el-linux-user/target/mips/lmi_helper.o
CC mips64-linux-user/target/mips/lmi_helper.o
CC mips64el-linux-user/target/mips/helper.o
CC mips64el-linux-user/target/mips/cpu.o
CC mips64-linux-user/target/mips/helper.o
CC mips64el-linux-user/target/mips/gdbstub.o
CC mips64-linux-user/target/mips/cpu.o
CC mips64el-linux-user/target/mips/msa_helper.o
CC mips64-linux-user/target/mips/gdbstub.o
CC mips64-linux-user/target/mips/msa_helper.o
CC mips64el-linux-user/target/mips/mips-semi.o
CC mips64-linux-user/target/mips/mips-semi.o
GEN trace/generated-helpers.c
CC mips64el-linux-user/trace/control-target.o
CC mips64el-linux-user/trace/generated-helpers.o
GEN trace/generated-helpers.c
CC mips64-linux-user/trace/control-target.o
LINK mips64el-linux-user/qemu-mips64el
CC mips64-linux-user/trace/generated-helpers.o
LINK mips64-linux-user/qemu-mips64
GEN mipsel-linux-user/config-target.h
CC mipsel-linux-user/exec.o
GEN mips-linux-user/config-target.h
CC mips-linux-user/exec.o
CC mips-linux-user/tcg/tcg.o
CC mips-linux-user/tcg/tcg-op.o
CC mips-linux-user/tcg/tcg-op-vec.o
CC mips-linux-user/tcg/tcg-op-gvec.o
CC mips-linux-user/tcg/tcg-common.o
CC mips-linux-user/tcg/optimize.o
CC mips-linux-user/fpu/softfloat.o
CC mips-linux-user/disas.o
CC mips-linux-user/gdbstub.o
CC mips-linux-user/thunk.o
CC mips-linux-user/accel/stubs/hax-stub.o
CC mips-linux-user/accel/stubs/hvf-stub.o
CC mips-linux-user/accel/stubs/whpx-stub.o
CC mips-linux-user/accel/stubs/kvm-stub.o
CC mips-linux-user/accel/tcg/tcg-runtime.o
CC mips-linux-user/accel/tcg/tcg-runtime-gvec.o
CC mips-linux-user/accel/tcg/cpu-exec.o
CC mips-linux-user/accel/tcg/cpu-exec-common.o
CC mips-linux-user/accel/tcg/translate-all.o
CC mips-linux-user/accel/tcg/translator.o
CC mips-linux-user/accel/tcg/user-exec.o
CC mips-linux-user/accel/tcg/user-exec-stub.o
CC mips-linux-user/linux-user/main.o
CC mips-linux-user/linux-user/syscall.o
CC mips-linux-user/linux-user/strace.o
CC mips-linux-user/linux-user/mmap.o
CC mips-linux-user/linux-user/signal.o
CC mips-linux-user/linux-user/elfload.o
CC mips-linux-user/linux-user/linuxload.o
CC mips-linux-user/linux-user/uaccess.o
CC mips-linux-user/linux-user/uname.o
CCAS mips-linux-user/linux-user/safe-syscall.o
CC mips-linux-user/target/mips/translate.o
CC mips-linux-user/target/mips/dsp_helper.o
CC mips-linux-user/target/mips/op_helper.o
CC mips-linux-user/target/mips/lmi_helper.o
CC mips-linux-user/target/mips/helper.o
CC mips-linux-user/target/mips/cpu.o
CC mips-linux-user/target/mips/gdbstub.o
CC mips-linux-user/target/mips/msa_helper.o
CC mips-linux-user/target/mips/mips-semi.o
GEN trace/generated-helpers.c
CC mips-linux-user/trace/control-target.o
CC mips-linux-user/trace/generated-helpers.o
LINK mips-linux-user/qemu-mips
CC mipsel-linux-user/tcg/tcg.o
CC aarch64_be-linux-user/target/arm/translate-a64.o
CC aarch64_be-linux-user/target/arm/helper-a64.o
CC mipsel-linux-user/tcg/tcg-op.o
CC aarch64_be-linux-user/target/arm/gdbstub64.o
CC mipsel-linux-user/tcg/tcg-op-vec.o
CC mipsel-linux-user/tcg/tcg-op-gvec.o
GEN mipsn32el-linux-user/config-target.h
CC mipsn32el-linux-user/exec.o
CC mipsn32el-linux-user/tcg/tcg.o
CC mipsn32el-linux-user/tcg/tcg-op.o
CC mipsn32el-linux-user/tcg/tcg-op-vec.o
CC mipsn32el-linux-user/tcg/tcg-op-gvec.o
CC mipsn32el-linux-user/tcg/tcg-common.o
CC mipsn32el-linux-user/tcg/optimize.o
CC mipsn32el-linux-user/fpu/softfloat.o
CC mipsn32el-linux-user/disas.o
CC mipsn32el-linux-user/gdbstub.o
CC mipsn32el-linux-user/thunk.o
CC mipsn32el-linux-user/accel/stubs/hax-stub.o
CC mipsn32el-linux-user/accel/stubs/hvf-stub.o
CC mipsn32el-linux-user/accel/stubs/whpx-stub.o
CC mipsn32el-linux-user/accel/stubs/kvm-stub.o
CC mipsn32el-linux-user/accel/tcg/tcg-runtime.o
CC mipsn32el-linux-user/accel/tcg/tcg-runtime-gvec.o
CC mipsn32el-linux-user/accel/tcg/cpu-exec.o
CC mipsn32el-linux-user/accel/tcg/cpu-exec-common.o
CC mipsn32el-linux-user/accel/tcg/translate-all.o
CC mipsn32el-linux-user/accel/tcg/translator.o
CC mipsn32el-linux-user/accel/tcg/user-exec.o
CC mipsn32el-linux-user/accel/tcg/user-exec-stub.o
CC mipsn32el-linux-user/linux-user/main.o
CC mipsn32el-linux-user/linux-user/syscall.o
CC mipsn32el-linux-user/linux-user/strace.o
CC mipsn32el-linux-user/linux-user/mmap.o
CC mipsn32el-linux-user/linux-user/signal.o
CC mipsn32el-linux-user/linux-user/elfload.o
CC mipsn32el-linux-user/linux-user/linuxload.o
CC mipsn32el-linux-user/linux-user/uaccess.o
CC mipsn32el-linux-user/linux-user/uname.o
CCAS mipsn32el-linux-user/linux-user/safe-syscall.o
CC mipsn32el-linux-user/target/mips/translate.o
CC mipsn32el-linux-user/target/mips/dsp_helper.o
CC mipsn32el-linux-user/target/mips/op_helper.o
CC mipsn32el-linux-user/target/mips/lmi_helper.o
CC mipsn32el-linux-user/target/mips/helper.o
CC mipsn32el-linux-user/target/mips/cpu.o
CC mipsn32el-linux-user/target/mips/gdbstub.o
CC mipsn32el-linux-user/target/mips/msa_helper.o
CC mipsn32el-linux-user/target/mips/mips-semi.o
GEN trace/generated-helpers.c
CC mipsn32el-linux-user/trace/control-target.o
CC mipsn32el-linux-user/trace/generated-helpers.o
LINK mipsn32el-linux-user/qemu-mipsn32el
CC aarch64_be-linux-user/target/arm/crypto_helper.o
CC mipsel-linux-user/tcg/tcg-common.o
CC mipsel-linux-user/tcg/optimize.o
CC mipsel-linux-user/fpu/softfloat.o
CC mipsel-linux-user/disas.o
GEN trace/generated-helpers.c
CC mipsel-linux-user/gdbstub.o
CC aarch64_be-linux-user/trace/control-target.o
CC aarch64_be-linux-user/gdbstub-xml.o
GEN mipsn32-linux-user/config-target.h
CC mipsn32-linux-user/exec.o
CC aarch64_be-linux-user/trace/generated-helpers.o
CC mipsel-linux-user/thunk.o
LINK aarch64_be-linux-user/qemu-aarch64_be
CC mipsel-linux-user/accel/stubs/hax-stub.o
CC mipsel-linux-user/accel/stubs/hvf-stub.o
GEN nios2-linux-user/config-target.h
CC nios2-linux-user/exec.o
CC nios2-linux-user/tcg/tcg.o
CC nios2-linux-user/tcg/tcg-op.o
CC nios2-linux-user/tcg/tcg-op-vec.o
CC nios2-linux-user/tcg/tcg-op-gvec.o
CC nios2-linux-user/tcg/tcg-common.o
CC nios2-linux-user/tcg/optimize.o
CC nios2-linux-user/fpu/softfloat.o
CC nios2-linux-user/disas.o
CC nios2-linux-user/gdbstub.o
CC nios2-linux-user/thunk.o
CC nios2-linux-user/accel/stubs/hax-stub.o
CC nios2-linux-user/accel/stubs/hvf-stub.o
CC nios2-linux-user/accel/stubs/whpx-stub.o
CC nios2-linux-user/accel/stubs/kvm-stub.o
CC nios2-linux-user/accel/tcg/tcg-runtime.o
CC nios2-linux-user/accel/tcg/tcg-runtime-gvec.o
CC nios2-linux-user/accel/tcg/cpu-exec.o
CC nios2-linux-user/accel/tcg/cpu-exec-common.o
CC nios2-linux-user/accel/tcg/translate-all.o
CC nios2-linux-user/accel/tcg/translator.o
CC nios2-linux-user/accel/tcg/user-exec.o
CC nios2-linux-user/accel/tcg/user-exec-stub.o
CC nios2-linux-user/linux-user/main.o
CC nios2-linux-user/linux-user/syscall.o
CC nios2-linux-user/linux-user/strace.o
CC nios2-linux-user/linux-user/mmap.o
CC nios2-linux-user/linux-user/signal.o
CC nios2-linux-user/linux-user/elfload.o
CC nios2-linux-user/linux-user/linuxload.o
CC nios2-linux-user/linux-user/uaccess.o
CC nios2-linux-user/linux-user/uname.o
CCAS nios2-linux-user/linux-user/safe-syscall.o
CC nios2-linux-user/target/nios2/translate.o
CC nios2-linux-user/target/nios2/op_helper.o
CC nios2-linux-user/target/nios2/helper.o
CC nios2-linux-user/target/nios2/cpu.o
CC nios2-linux-user/target/nios2/mmu.o
GEN trace/generated-helpers.c
CC nios2-linux-user/trace/control-target.o
CC nios2-linux-user/trace/generated-helpers.o
LINK nios2-linux-user/qemu-nios2
CC mipsn32-linux-user/tcg/tcg.o
CC mipsel-linux-user/accel/stubs/kvm-stub.o
CC mipsel-linux-user/accel/stubs/whpx-stub.o
CC mipsel-linux-user/accel/tcg/tcg-runtime.o
CC mipsel-linux-user/accel/tcg/tcg-runtime-gvec.o
CC mipsel-linux-user/accel/tcg/cpu-exec.o
CC mipsel-linux-user/accel/tcg/cpu-exec-common.o
CC mipsel-linux-user/accel/tcg/translate-all.o
CC mipsel-linux-user/accel/tcg/translator.o
CC mipsel-linux-user/accel/tcg/user-exec.o
GEN or1k-linux-user/config-target.h
CC or1k-linux-user/exec.o
CC or1k-linux-user/tcg/tcg.o
CC or1k-linux-user/tcg/tcg-op.o
CC or1k-linux-user/tcg/tcg-op-vec.o
CC or1k-linux-user/tcg/tcg-op-gvec.o
CC or1k-linux-user/tcg/tcg-common.o
CC or1k-linux-user/tcg/optimize.o
CC or1k-linux-user/fpu/softfloat.o
CC or1k-linux-user/disas.o
CC or1k-linux-user/gdbstub.o
CC or1k-linux-user/thunk.o
CC or1k-linux-user/accel/stubs/hax-stub.o
CC or1k-linux-user/accel/stubs/hvf-stub.o
CC or1k-linux-user/accel/stubs/whpx-stub.o
CC or1k-linux-user/accel/stubs/kvm-stub.o
CC or1k-linux-user/accel/tcg/tcg-runtime.o
CC or1k-linux-user/accel/tcg/tcg-runtime-gvec.o
CC or1k-linux-user/accel/tcg/cpu-exec.o
CC or1k-linux-user/accel/tcg/cpu-exec-common.o
CC or1k-linux-user/accel/tcg/translate-all.o
CC or1k-linux-user/accel/tcg/translator.o
CC or1k-linux-user/accel/tcg/user-exec.o
CC or1k-linux-user/accel/tcg/user-exec-stub.o
CC or1k-linux-user/linux-user/main.o
CC or1k-linux-user/linux-user/syscall.o
CC or1k-linux-user/linux-user/strace.o
CC or1k-linux-user/linux-user/mmap.o
CC or1k-linux-user/linux-user/signal.o
CC or1k-linux-user/linux-user/elfload.o
CC or1k-linux-user/linux-user/linuxload.o
CC or1k-linux-user/linux-user/uaccess.o
CC or1k-linux-user/linux-user/uname.o
CCAS or1k-linux-user/linux-user/safe-syscall.o
CC or1k-linux-user/target/openrisc/cpu.o
CC or1k-linux-user/target/openrisc/exception.o
CC or1k-linux-user/target/openrisc/interrupt.o
CC or1k-linux-user/target/openrisc/mmu.o
CC or1k-linux-user/target/openrisc/translate.o
CC or1k-linux-user/target/openrisc/exception_helper.o
CC or1k-linux-user/target/openrisc/fpu_helper.o
CC or1k-linux-user/target/openrisc/interrupt_helper.o
CC or1k-linux-user/target/openrisc/mmu_helper.o
CC or1k-linux-user/target/openrisc/sys_helper.o
CC or1k-linux-user/target/openrisc/gdbstub.o
GEN trace/generated-helpers.c
CC or1k-linux-user/trace/control-target.o
CC or1k-linux-user/trace/generated-helpers.o
LINK or1k-linux-user/qemu-or1k
CC mipsel-linux-user/accel/tcg/user-exec-stub.o
CC mipsel-linux-user/linux-user/main.o
CC mipsn32-linux-user/tcg/tcg-op.o
CC mipsel-linux-user/linux-user/syscall.o
CC mipsel-linux-user/linux-user/strace.o
CC mipsn32-linux-user/tcg/tcg-op-vec.o
CC mipsel-linux-user/linux-user/mmap.o
CC mipsel-linux-user/linux-user/signal.o
CC mipsel-linux-user/linux-user/elfload.o
CC mipsel-linux-user/linux-user/linuxload.o
CC mipsel-linux-user/linux-user/uaccess.o
CC mipsel-linux-user/linux-user/uname.o
CCAS mipsel-linux-user/linux-user/safe-syscall.o
CC mipsel-linux-user/target/mips/translate.o
CC mipsel-linux-user/target/mips/dsp_helper.o
CC mipsel-linux-user/target/mips/op_helper.o
CC mipsel-linux-user/target/mips/lmi_helper.o
CC mipsel-linux-user/target/mips/helper.o
CC mipsel-linux-user/target/mips/cpu.o
CC mipsel-linux-user/target/mips/gdbstub.o
CC mipsel-linux-user/target/mips/msa_helper.o
CC mipsel-linux-user/target/mips/mips-semi.o
GEN trace/generated-helpers.c
CC mipsel-linux-user/trace/control-target.o
CC mipsel-linux-user/trace/generated-helpers.o
CC mipsn32-linux-user/tcg/tcg-common.o
CC mipsn32-linux-user/tcg/tcg-op-gvec.o
GEN ppc64abi32-linux-user/config-target.h
CC ppc64abi32-linux-user/exec.o
LINK mipsel-linux-user/qemu-mipsel
CC mipsn32-linux-user/tcg/optimize.o
CC ppc64abi32-linux-user/tcg/tcg.o
GEN ppc64le-linux-user/config-target.h
CC ppc64le-linux-user/exec.o
CC ppc64le-linux-user/tcg/tcg.o
CC ppc64le-linux-user/tcg/tcg-op.o
CC mipsn32-linux-user/fpu/softfloat.o
CC ppc64abi32-linux-user/tcg/tcg-op.o
CC ppc64le-linux-user/tcg/tcg-op-vec.o
CC ppc64le-linux-user/tcg/tcg-op-gvec.o
CC ppc64le-linux-user/tcg/tcg-common.o
CC ppc64le-linux-user/tcg/optimize.o
CC ppc64le-linux-user/fpu/softfloat.o
CC ppc64le-linux-user/disas.o
GEN ppc64le-linux-user/gdbstub-xml.c
CC ppc64le-linux-user/gdbstub.o
CC ppc64le-linux-user/thunk.o
CC ppc64le-linux-user/accel/stubs/hax-stub.o
CC ppc64le-linux-user/accel/stubs/hvf-stub.o
CC ppc64le-linux-user/accel/stubs/whpx-stub.o
CC ppc64le-linux-user/accel/stubs/kvm-stub.o
CC ppc64le-linux-user/accel/tcg/tcg-runtime.o
CC ppc64le-linux-user/accel/tcg/tcg-runtime-gvec.o
CC ppc64le-linux-user/accel/tcg/cpu-exec.o
GEN ppc64-linux-user/config-target.h
CC ppc64-linux-user/exec.o
CC ppc64le-linux-user/accel/tcg/cpu-exec-common.o
CC ppc64-linux-user/tcg/tcg.o
CC ppc64le-linux-user/accel/tcg/translate-all.o
CC ppc64le-linux-user/accel/tcg/translator.o
CC ppc64le-linux-user/accel/tcg/user-exec.o
CC ppc64le-linux-user/accel/tcg/user-exec-stub.o
CC ppc64le-linux-user/linux-user/main.o
CC ppc64-linux-user/tcg/tcg-op.o
CC ppc64le-linux-user/linux-user/syscall.o
CC ppc64-linux-user/tcg/tcg-op-vec.o
CC ppc64-linux-user/tcg/tcg-op-gvec.o
CC ppc64le-linux-user/linux-user/strace.o
CC ppc64-linux-user/tcg/tcg-common.o
CC ppc64-linux-user/tcg/optimize.o
CC ppc64le-linux-user/linux-user/mmap.o
CC ppc64le-linux-user/linux-user/signal.o
CC ppc64-linux-user/fpu/softfloat.o
CC ppc64le-linux-user/linux-user/elfload.o
CC ppc64le-linux-user/linux-user/linuxload.o
CC ppc64le-linux-user/linux-user/uaccess.o
CC ppc64le-linux-user/linux-user/uname.o
CCAS ppc64le-linux-user/linux-user/safe-syscall.o
CC ppc64le-linux-user/target/ppc/cpu-models.o
CC ppc64le-linux-user/target/ppc/cpu.o
CC ppc64-linux-user/disas.o
CC ppc64le-linux-user/target/ppc/translate.o
GEN ppc64-linux-user/gdbstub-xml.c
CC ppc64-linux-user/gdbstub.o
CC ppc64-linux-user/thunk.o
CC ppc64-linux-user/accel/stubs/hax-stub.o
CC ppc64-linux-user/accel/stubs/hvf-stub.o
CC ppc64-linux-user/accel/stubs/whpx-stub.o
CC ppc64-linux-user/accel/stubs/kvm-stub.o
CC ppc64-linux-user/accel/tcg/tcg-runtime.o
CC ppc64-linux-user/accel/tcg/tcg-runtime-gvec.o
CC ppc64-linux-user/accel/tcg/cpu-exec.o
CC ppc64-linux-user/accel/tcg/cpu-exec-common.o
CC ppc64-linux-user/accel/tcg/translate-all.o
CC ppc64-linux-user/accel/tcg/translator.o
CC ppc64-linux-user/accel/tcg/user-exec.o
CC ppc64-linux-user/accel/tcg/user-exec-stub.o
CC ppc64-linux-user/linux-user/main.o
CC ppc64-linux-user/linux-user/syscall.o
CC ppc64-linux-user/linux-user/strace.o
CC ppc64-linux-user/linux-user/mmap.o
CC ppc64-linux-user/linux-user/signal.o
CC ppc64-linux-user/linux-user/elfload.o
CC ppc64-linux-user/linux-user/linuxload.o
CC ppc64-linux-user/linux-user/uaccess.o
CC ppc64-linux-user/linux-user/uname.o
CCAS ppc64-linux-user/linux-user/safe-syscall.o
CC ppc64-linux-user/target/ppc/cpu-models.o
CC ppc64le-linux-user/target/ppc/kvm-stub.o
CC ppc64le-linux-user/target/ppc/dfp_helper.o
CC ppc64le-linux-user/target/ppc/excp_helper.o
CC ppc64le-linux-user/target/ppc/fpu_helper.o
CC ppc64-linux-user/target/ppc/cpu.o
CC ppc64-linux-user/target/ppc/translate.o
CC ppc64le-linux-user/target/ppc/int_helper.o
CC ppc64le-linux-user/target/ppc/timebase_helper.o
CC ppc64le-linux-user/target/ppc/misc_helper.o
CC ppc64le-linux-user/target/ppc/mem_helper.o
CC ppc64le-linux-user/target/ppc/user_only_helper.o
CC ppc64le-linux-user/target/ppc/gdbstub.o
CC ppc64le-linux-user/target/ppc/../../libdecnumber/decContext.o
CC ppc64le-linux-user/target/ppc/../../libdecnumber/decNumber.o
CC ppc64le-linux-user/target/ppc/../../libdecnumber/dpd/decimal32.o
CC ppc64le-linux-user/target/ppc/../../libdecnumber/dpd/decimal64.o
CC ppc64le-linux-user/target/ppc/../../libdecnumber/dpd/decimal128.o
GEN trace/generated-helpers.c
CC ppc64le-linux-user/trace/control-target.o
CC ppc64le-linux-user/gdbstub-xml.o
CC ppc64le-linux-user/trace/generated-helpers.o
LINK ppc64le-linux-user/qemu-ppc64le
GEN ppc-linux-user/config-target.h
CC ppc-linux-user/exec.o
CC ppc-linux-user/tcg/tcg.o
make[1]: *** [/var/tmp/patchew-tester-tmp-2foxcz3r/src/rules.mak:66: tcg/tcg.o] Error 1
make: *** [Makefile:404: subdir-ppc-linux-user] Error 2
make: *** Waiting for unfinished jobs....
CC ppc64-linux-user/target/ppc/kvm-stub.o
make[1]: *** [/var/tmp/patchew-tester-tmp-2foxcz3r/src/rules.mak:66: target/ppc/translate.o] Error 1
make[1]: *** Waiting for unfinished jobs....
CC mipsn32-linux-user/gdbstub.o
CC mipsn32-linux-user/disas.o
make: *** [Makefile:404: subdir-ppc64-linux-user] Error 2
CC ppc64abi32-linux-user/tcg/tcg-op-vec.o
CC ppc64abi32-linux-user/tcg/tcg-op-gvec.o
CC mipsn32-linux-user/thunk.o
CC mipsn32-linux-user/accel/stubs/hax-stub.o
CC ppc64abi32-linux-user/tcg/tcg-common.o
CC mipsn32-linux-user/accel/stubs/hvf-stub.o
CC ppc64abi32-linux-user/tcg/optimize.o
CC mipsn32-linux-user/accel/stubs/whpx-stub.o
CC mipsn32-linux-user/accel/stubs/kvm-stub.o
CC ppc64abi32-linux-user/fpu/softfloat.o
CC mipsn32-linux-user/accel/tcg/tcg-runtime.o
CC ppc64abi32-linux-user/disas.o
GEN ppc64abi32-linux-user/gdbstub-xml.c
CC ppc64abi32-linux-user/gdbstub.o
CC ppc64abi32-linux-user/thunk.o
CC ppc64abi32-linux-user/accel/stubs/hax-stub.o
CC mipsn32-linux-user/accel/tcg/tcg-runtime-gvec.o
CC mipsn32-linux-user/accel/tcg/cpu-exec.o
CC mipsn32-linux-user/accel/tcg/cpu-exec-common.o
CC mipsn32-linux-user/accel/tcg/translate-all.o
CC mipsn32-linux-user/accel/tcg/translator.o
CC mipsn32-linux-user/accel/tcg/user-exec.o
CC mipsn32-linux-user/accel/tcg/user-exec-stub.o
CC mipsn32-linux-user/linux-user/main.o
CC mipsn32-linux-user/linux-user/syscall.o
CC mipsn32-linux-user/linux-user/strace.o
CC mipsn32-linux-user/linux-user/mmap.o
CC mipsn32-linux-user/linux-user/signal.o
CC mipsn32-linux-user/linux-user/elfload.o
CC mipsn32-linux-user/linux-user/linuxload.o
CC mipsn32-linux-user/linux-user/uaccess.o
CC mipsn32-linux-user/linux-user/uname.o
CCAS mipsn32-linux-user/linux-user/safe-syscall.o
CC mipsn32-linux-user/target/mips/translate.o
CC mipsn32-linux-user/target/mips/dsp_helper.o
CC mipsn32-linux-user/target/mips/op_helper.o
CC mipsn32-linux-user/target/mips/lmi_helper.o
CC mipsn32-linux-user/target/mips/helper.o
CC mipsn32-linux-user/target/mips/cpu.o
CC mipsn32-linux-user/target/mips/gdbstub.o
CC mipsn32-linux-user/target/mips/msa_helper.o
make[1]: *** [/var/tmp/patchew-tester-tmp-2foxcz3r/src/rules.mak:66: target/mips/translate.o] Error 1
make[1]: *** Waiting for unfinished jobs....
CC ppc64abi32-linux-user/accel/stubs/hvf-stub.o
CC ppc64abi32-linux-user/accel/stubs/whpx-stub.o
CC ppc64abi32-linux-user/accel/stubs/kvm-stub.o
make: *** [Makefile:404: subdir-mipsn32-linux-user] Error 2
CC ppc64abi32-linux-user/accel/tcg/tcg-runtime.o
CC ppc64abi32-linux-user/accel/tcg/tcg-runtime-gvec.o
CC ppc64abi32-linux-user/accel/tcg/cpu-exec.o
CC ppc64abi32-linux-user/accel/tcg/cpu-exec-common.o
CC ppc64abi32-linux-user/accel/tcg/translate-all.o
CC ppc64abi32-linux-user/accel/tcg/translator.o
CC ppc64abi32-linux-user/accel/tcg/user-exec.o
CC ppc64abi32-linux-user/accel/tcg/user-exec-stub.o
CC ppc64abi32-linux-user/linux-user/main.o
CC ppc64abi32-linux-user/linux-user/syscall.o
CC ppc64abi32-linux-user/linux-user/strace.o
CC ppc64abi32-linux-user/linux-user/mmap.o
CC ppc64abi32-linux-user/linux-user/signal.o
CC ppc64abi32-linux-user/linux-user/elfload.o
CC ppc64abi32-linux-user/linux-user/linuxload.o
CC ppc64abi32-linux-user/linux-user/uaccess.o
CC ppc64abi32-linux-user/linux-user/uname.o
CCAS ppc64abi32-linux-user/linux-user/safe-syscall.o
CC ppc64abi32-linux-user/target/ppc/cpu-models.o
CC ppc64abi32-linux-user/target/ppc/cpu.o
CC ppc64abi32-linux-user/target/ppc/translate.o
CC ppc64abi32-linux-user/target/ppc/kvm-stub.o
CC ppc64abi32-linux-user/target/ppc/dfp_helper.o
CC ppc64abi32-linux-user/target/ppc/excp_helper.o
CC ppc64abi32-linux-user/target/ppc/fpu_helper.o
CC ppc64abi32-linux-user/target/ppc/int_helper.o
make[1]: *** [/var/tmp/patchew-tester-tmp-2foxcz3r/src/rules.mak:66: linux-user/syscall.o] Error 1
make[1]: *** Waiting for unfinished jobs....
make[1]: *** [/var/tmp/patchew-tester-tmp-2foxcz3r/src/rules.mak:66: target/ppc/fpu_helper.o] Error 1
make[1]: *** [/var/tmp/patchew-tester-tmp-2foxcz3r/src/rules.mak:66: target/ppc/translate.o] Error 1
make: *** [Makefile:404: subdir-ppc64abi32-linux-user] Error 2
=== OUTPUT END ===
Test command exited with code: 2
---
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Please send your feedback to patchew-devel@freelists.org
^ permalink raw reply [flat|nested] 46+ messages in thread* Re: [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions
2018-02-23 15:36 [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions Alex Bennée
` (32 preceding siblings ...)
2018-02-24 7:59 ` no-reply
@ 2018-02-24 12:36 ` no-reply
33 siblings, 0 replies; 46+ messages in thread
From: no-reply @ 2018-02-24 12:36 UTC (permalink / raw)
To: alex.bennee; +Cc: famz, qemu-arm, richard.henderson, qemu-devel
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20180223153636.29809-1-alex.bennee@linaro.org
Subject: [Qemu-devel] [PATCH v3 00/31] Add ARMv8.2 half-precision functions
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
failed=1
echo
fi
n=$((n+1))
done
exit $failed
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
973d6ea847 arm/translate-a64: add all single op FP16 to handle_fp_1src_half
865c5efee7 arm/translate-a64: implement simd_scalar_three_reg_same_fp16
fd1fec9d84 arm/translate-a64: add all FP16 ops in simd_scalar_pairwise
34a9ee1b72 arm/translate-a64: add FP16 FMOV to simd_mod_imm
e61c7193a5 arm/translate-a64: add FP16 FRSQRTE to simd_two_reg_misc_fp16
dbbbc15721 arm/helper.c: re-factor rsqrte and add rsqrte_f16
1f776415c0 arm/translate-a64: add FP16 FSQRT to simd_two_reg_misc_fp16
01a7993654 arm/translate-a64: add FP16 FRCPX to simd_two_reg_misc_fp16
3e2b3ca80f arm/translate-a64: add FP16 FRECPE
33514ae31f arm/helper.c: re-factor recpe and add recepe_f16
a1dfb85e0f arm/translate-a64: add FP16 FNEG/FABS to simd_two_reg_misc_fp16
92e3338b5a arm/translate-a64: add FP16 SCVTF/UCVFT to simd_two_reg_misc_fp16
5b86cb374f arm/translate-a64: add FP16 FCMxx (zero) to simd_two_reg_misc_fp16
17e2eee31c arm/translate-a64: add FCVTxx to simd_two_reg_misc_fp16
893c84283a arm/translate-a64: add FP16 FPRINTx to simd_two_reg_misc_fp16
c29baaf9c1 arm/translate-a64: initial decode for simd_two_reg_misc_fp16
714d9395cc arm/translate-a64: add FP16 x2 ops for simd_indexed
b026878d1c arm/translate-a64: add FP16 FMULX/MLS/FMLA to simd_indexed
ea0357c725 arm/translate-a64: add FP16 pairwise ops simd_three_reg_same_fp16
dfbe2602d6 arm/translate-a64: add FP16 FR[ECP/SQRT]S to simd_three_reg_same_fp16
c17489ca3b arm/translate-a64: add FP16 FMULA/X/S to simd_three_reg_same_fp16
e4fa306574 arm/translate-a64: add FP16 F[A]C[EQ/GE/GT] to simd_three_reg_same_fp16
688c5a1edc arm/translate-a64: add FP16 FADD/FABD/FSUB/FMUL/FDIV to simd_three_reg_same_fp16
3d44f35de5 arm/translate-a64: initial decode for simd_three_reg_same_fp16
db5773e357 arm/translate-a64: handle_3same_64 comment fix
2e96f5c4ee arm/translate-a64: implement half-precision F(MIN|MAX)(V|NMV)
278b916615 target/arm/helper: pass explicit fpst to set_rmode
4ef0855eb3 target/arm/cpu.h: add additional float_status flags
9360101ac7 target/arm/cpu.h: update comment for half-precision values
7a30500e92 target/arm/cpu64: introduce ARM_V8_FP16 feature bit
47fba618d4 include/exec/helper-head.h: support f16 in helper calls
=== OUTPUT BEGIN ===
Checking PATCH 1/31: include/exec/helper-head.h: support f16 in helper calls...
Checking PATCH 2/31: target/arm/cpu64: introduce ARM_V8_FP16 feature bit...
Checking PATCH 3/31: target/arm/cpu.h: update comment for half-precision values...
Checking PATCH 4/31: target/arm/cpu.h: add additional float_status flags...
Checking PATCH 5/31: target/arm/helper: pass explicit fpst to set_rmode...
Checking PATCH 6/31: arm/translate-a64: implement half-precision F(MIN|MAX)(V|NMV)...
Checking PATCH 7/31: arm/translate-a64: handle_3same_64 comment fix...
Checking PATCH 8/31: arm/translate-a64: initial decode for simd_three_reg_same_fp16...
Checking PATCH 9/31: arm/translate-a64: add FP16 FADD/FABD/FSUB/FMUL/FDIV to simd_three_reg_same_fp16...
Checking PATCH 10/31: arm/translate-a64: add FP16 F[A]C[EQ/GE/GT] to simd_three_reg_same_fp16...
Checking PATCH 11/31: arm/translate-a64: add FP16 FMULA/X/S to simd_three_reg_same_fp16...
Checking PATCH 12/31: arm/translate-a64: add FP16 FR[ECP/SQRT]S to simd_three_reg_same_fp16...
Checking PATCH 13/31: arm/translate-a64: add FP16 pairwise ops simd_three_reg_same_fp16...
Checking PATCH 14/31: arm/translate-a64: add FP16 FMULX/MLS/FMLA to simd_indexed...
Checking PATCH 15/31: arm/translate-a64: add FP16 x2 ops for simd_indexed...
Checking PATCH 16/31: arm/translate-a64: initial decode for simd_two_reg_misc_fp16...
Checking PATCH 17/31: arm/translate-a64: add FP16 FPRINTx to simd_two_reg_misc_fp16...
Checking PATCH 18/31: arm/translate-a64: add FCVTxx to simd_two_reg_misc_fp16...
Checking PATCH 19/31: arm/translate-a64: add FP16 FCMxx (zero) to simd_two_reg_misc_fp16...
Checking PATCH 20/31: arm/translate-a64: add FP16 SCVTF/UCVFT to simd_two_reg_misc_fp16...
ERROR: space prohibited before that close parenthesis ')'
#26: FILE: target/arm/helper.c:11305:
+FLOAT_CONVS(si, h, 16, )
total: 1 errors, 0 warnings, 208 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 21/31: arm/translate-a64: add FP16 FNEG/FABS to simd_two_reg_misc_fp16...
Checking PATCH 22/31: arm/helper.c: re-factor recpe and add recepe_f16...
Checking PATCH 23/31: arm/translate-a64: add FP16 FRECPE...
Checking PATCH 24/31: arm/translate-a64: add FP16 FRCPX to simd_two_reg_misc_fp16...
Checking PATCH 25/31: arm/translate-a64: add FP16 FSQRT to simd_two_reg_misc_fp16...
Checking PATCH 26/31: arm/helper.c: re-factor rsqrte and add rsqrte_f16...
Checking PATCH 27/31: arm/translate-a64: add FP16 FRSQRTE to simd_two_reg_misc_fp16...
Checking PATCH 28/31: arm/translate-a64: add FP16 FMOV to simd_mod_imm...
Checking PATCH 29/31: arm/translate-a64: add all FP16 ops in simd_scalar_pairwise...
Checking PATCH 30/31: arm/translate-a64: implement simd_scalar_three_reg_same_fp16...
Checking PATCH 31/31: arm/translate-a64: add all single op FP16 to handle_fp_1src_half...
=== OUTPUT END ===
Test command exited with code: 1
---
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