From: Brijesh Singh <brijesh.singh@amd.com>
To: qemu-devel@nongnu.org
Cc: Alistair Francis <alistair.francis@xilinx.com>,
Christian Borntraeger <borntraeger@de.ibm.com>,
Cornelia Huck <cornelia.huck@de.ibm.com>,
"Daniel P . Berrange" <berrange@redhat.com>,
"Dr. David Alan Gilbert" <dgilbert@redhat.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Edgar E. Iglesias" <edgar.iglesias@xilinx.com>,
Eduardo Habkost <ehabkost@redhat.com>,
Eric Blake <eblake@redhat.com>,
kvm@vger.kernel.org, Marcel Apfelbaum <marcel@redhat.com>,
Markus Armbruster <armbru@redhat.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Peter Crosthwaite <crosthwaite.peter@gmail.com>,
Peter Maydell <peter.maydell@linaro.org>,
Richard Henderson <richard.henderson@linaro.org>,
Stefan Hajnoczi <stefanha@gmail.com>,
Thomas Lendacky <Thomas.Lendacky@amd.com>,
Borislav Petkov <bp@suse.de>, Alexander Graf <agraf@suse.de>,
Bruce Rogers <brogers@suse.com>,
Brijesh Singh <brijesh.singh@amd.com>,
Richard Henderson <rth@twiddle.net>
Subject: [Qemu-devel] [PATCH v10 03/28] exec: add debug version of physical memory read and write API
Date: Wed, 28 Feb 2018 15:10:03 -0600 [thread overview]
Message-ID: <20180228211028.83970-4-brijesh.singh@amd.com> (raw)
In-Reply-To: <20180228211028.83970-1-brijesh.singh@amd.com>
Adds the following new APIs
- cpu_physical_memory_read_debug
- cpu_physical_memory_write_debug
- cpu_physical_memory_rw_debug
- ldl_phys_debug
- ldq_phys_debug
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
---
exec.c | 40 ++++++++++++++++++++++++++++++++++++++++
include/exec/cpu-common.h | 15 +++++++++++++++
2 files changed, 55 insertions(+)
diff --git a/exec.c b/exec.c
index 4408cd26c989..633be92d2b3a 100644
--- a/exec.c
+++ b/exec.c
@@ -3596,6 +3596,46 @@ void address_space_cache_destroy(MemoryRegionCache *cache)
#define RCU_READ_UNLOCK() rcu_read_unlock()
#include "memory_ldst.inc.c"
+uint32_t ldl_phys_debug(CPUState *cpu, hwaddr addr)
+{
+ MemTxAttrs attrs;
+ int asidx = cpu_asidx_from_attrs(cpu, attrs);
+ uint32_t val;
+
+ /* set debug attrs to indicate memory access is from the debugger */
+ attrs.debug = 1;
+
+ address_space_rw(cpu->cpu_ases[asidx].as, addr, attrs,
+ (void *) &val, 4, 0);
+
+ return tswap32(val);
+}
+
+uint64_t ldq_phys_debug(CPUState *cpu, hwaddr addr)
+{
+ MemTxAttrs attrs;
+ int asidx = cpu_asidx_from_attrs(cpu, attrs);
+ uint64_t val;
+
+ /* set debug attrs to indicate memory access is from the debugger */
+ attrs.debug = 1;
+
+ address_space_rw(cpu->cpu_ases[asidx].as, addr, attrs,
+ (void *) &val, 8, 0);
+ return val;
+}
+
+void cpu_physical_memory_rw_debug(hwaddr addr, uint8_t *buf,
+ int len, int is_write)
+{
+ MemTxAttrs attrs;
+
+ /* set debug attrs to indicate memory access is from the debugger */
+ attrs.debug = 1;
+
+ address_space_rw(&address_space_memory, addr, attrs, buf, len, is_write);
+}
+
/* virtual memory access for debug (includes writing to ROM) */
int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
uint8_t *buf, int len, int is_write)
diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h
index 74341b19d26a..fa01385d4f1b 100644
--- a/include/exec/cpu-common.h
+++ b/include/exec/cpu-common.h
@@ -77,11 +77,26 @@ size_t qemu_ram_pagesize_largest(void);
void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf,
int len, int is_write);
+void cpu_physical_memory_rw_debug(hwaddr addr, uint8_t *buf,
+ int len, int is_write);
static inline void cpu_physical_memory_read(hwaddr addr,
void *buf, int len)
{
cpu_physical_memory_rw(addr, buf, len, 0);
}
+static inline void cpu_physical_memory_read_debug(hwaddr addr,
+ void *buf, int len)
+{
+ cpu_physical_memory_rw_debug(addr, buf, len, 0);
+}
+static inline void cpu_physical_memory_write_debug(hwaddr addr,
+ const void *buf, int len)
+{
+ cpu_physical_memory_rw_debug(addr, (void *)buf, len, 1);
+}
+uint32_t ldl_phys_debug(CPUState *cpu, hwaddr addr);
+uint64_t ldq_phys_debug(CPUState *cpu, hwaddr addr);
+
static inline void cpu_physical_memory_write(hwaddr addr,
const void *buf, int len)
{
--
2.14.3
next prev parent reply other threads:[~2018-02-28 21:11 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-28 21:10 [Qemu-devel] [PATCH v10 00/29] x86: Secure Encrypted Virtualization (AMD) Brijesh Singh
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 01/28] memattrs: add debug attribute Brijesh Singh
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 02/28] exec: add ram_debug_ops support Brijesh Singh
2018-02-28 21:10 ` Brijesh Singh [this message]
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 04/28] monitor/i386: use debug APIs when accessing guest memory Brijesh Singh
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 05/28] machine: add -memory-encryption property Brijesh Singh
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 06/28] kvm: update kvm.h to include memory encryption ioctls Brijesh Singh
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 07/28] docs: add AMD Secure Encrypted Virtualization (SEV) Brijesh Singh
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 08/28] target/i386: add Secure Encrypted Virtulization (SEV) object Brijesh Singh
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 09/28] qmp: add query-sev command Brijesh Singh
2018-03-01 20:09 ` Eric Blake
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 10/28] include: add psp-sev.h header file Brijesh Singh
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 11/28] sev/i386: add command to initialize the memory encryption context Brijesh Singh
2018-03-05 13:37 ` Laszlo Ersek
2018-03-07 13:19 ` Brijesh Singh
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 12/28] sev/i386: register the guest memory range which may contain encrypted data Brijesh Singh
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 13/28] kvm: introduce memory encryption APIs Brijesh Singh
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 14/28] hmp: add 'info sev' command Brijesh Singh
2018-03-02 11:31 ` Dr. David Alan Gilbert
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 15/28] sev/i386: add command to create launch memory encryption context Brijesh Singh
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 16/28] sev/i386: add command to encrypt guest memory region Brijesh Singh
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 17/28] target/i386: encrypt bios rom Brijesh Singh
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 18/28] sev/i386: add support to LAUNCH_MEASURE command Brijesh Singh
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 19/28] sev/i386: finalize the SEV guest launch flow Brijesh Singh
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 20/28] hw/i386: set ram_debug_ops when memory encryption is enabled Brijesh Singh
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 21/28] sev/i386: add debug encrypt and decrypt commands Brijesh Singh
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 22/28] target/i386: clear C-bit when walking SEV guest page table Brijesh Singh
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 23/28] qmp: add query-sev-launch-measure command Brijesh Singh
2018-03-01 20:11 ` Eric Blake
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 24/28] sev/i386: add migration blocker Brijesh Singh
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 25/28] cpu/i386: populate CPUID 0x8000_001F when SEV is active Brijesh Singh
2018-03-06 12:39 ` Eduardo Habkost
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 26/28] qmp: add query-sev-capabilities command Brijesh Singh
2018-03-01 20:13 ` Eric Blake
2018-03-05 17:35 ` Brijesh Singh
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 27/28] sev/i386: add sev_get_capabilities() Brijesh Singh
2018-02-28 21:10 ` [Qemu-devel] [PATCH v10 28/28] tests/qmp-test: blacklist sev specific qmp commands Brijesh Singh
2018-02-28 21:43 ` [Qemu-devel] [PATCH v10 00/29] x86: Secure Encrypted Virtualization (AMD) Brijesh Singh
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