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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 03/39] xlnx-zynqmp: Connect the RTC device
Date: Fri,  2 Mar 2018 11:06:04 +0000	[thread overview]
Message-ID: <20180302110640.28004-4-peter.maydell@linaro.org> (raw)
In-Reply-To: <20180302110640.28004-1-peter.maydell@linaro.org>

From: Alistair Francis <alistair.francis@xilinx.com>

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 include/hw/arm/xlnx-zynqmp.h |  2 ++
 hw/arm/xlnx-zynqmp.c         | 14 ++++++++++++++
 2 files changed, 16 insertions(+)

diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
index 0a2b037c6b..3b613e364d 100644
--- a/include/hw/arm/xlnx-zynqmp.h
+++ b/include/hw/arm/xlnx-zynqmp.h
@@ -29,6 +29,7 @@
 #include "hw/dma/xlnx_dpdma.h"
 #include "hw/display/xlnx_dp.h"
 #include "hw/intc/xlnx-zynqmp-ipi.h"
+#include "hw/timer/xlnx-zynqmp-rtc.h"
 
 #define TYPE_XLNX_ZYNQMP "xlnx,zynqmp"
 #define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \
@@ -92,6 +93,7 @@ typedef struct XlnxZynqMPState {
     XlnxDPState dp;
     XlnxDPDMAState dpdma;
     XlnxZynqMPIPI ipi;
+    XlnxZynqMPRTC rtc;
 
     char *boot_cpu;
     ARMCPU *boot_cpu_ptr;
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 4b93a3abd2..69227fd4c9 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -53,6 +53,9 @@
 #define IPI_ADDR            0xFF300000
 #define IPI_IRQ             64
 
+#define RTC_ADDR            0xffa60000
+#define RTC_IRQ             26
+
 #define SDHCI_CAPABILITIES  0x280737ec6481 /* Datasheet: UG1085 (v1.7) */
 
 static const uint64_t gem_addr[XLNX_ZYNQMP_NUM_GEMS] = {
@@ -191,6 +194,9 @@ static void xlnx_zynqmp_init(Object *obj)
 
     object_initialize(&s->ipi, sizeof(s->ipi), TYPE_XLNX_ZYNQMP_IPI);
     qdev_set_parent_bus(DEVICE(&s->ipi), sysbus_get_default());
+
+    object_initialize(&s->rtc, sizeof(s->rtc), TYPE_XLNX_ZYNQMP_RTC);
+    qdev_set_parent_bus(DEVICE(&s->rtc), sysbus_get_default());
 }
 
 static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
@@ -476,6 +482,14 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
     }
     sysbus_mmio_map(SYS_BUS_DEVICE(&s->ipi), 0, IPI_ADDR);
     sysbus_connect_irq(SYS_BUS_DEVICE(&s->ipi), 0, gic_spi[IPI_IRQ]);
+
+    object_property_set_bool(OBJECT(&s->rtc), true, "realized", &err);
+    if (err) {
+        error_propagate(errp, err);
+        return;
+    }
+    sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, RTC_ADDR);
+    sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0, gic_spi[RTC_IRQ]);
 }
 
 static Property xlnx_zynqmp_props[] = {
-- 
2.16.2

  parent reply	other threads:[~2018-03-02 11:06 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-02 11:06 [Qemu-devel] [PULL 00/39] target-arm queue Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 01/39] xlnx-zynqmp-rtc: Initial commit Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 02/39] xlnx-zynqmp-rtc: Add basic time support Peter Maydell
2018-03-02 11:06 ` Peter Maydell [this message]
2018-03-02 11:06 ` [Qemu-devel] [PULL 04/39] decodetree: Propagate return value from translate subroutines Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 05/39] loader: Add new load_ramdisk_as() Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 06/39] hw/arm/boot: Honour CPU's address space for image loads Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 07/39] hw/arm/armv7m: " Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 08/39] target/arm: Define an IDAU interface Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 09/39] armv7m: Forward idau property to CPU object Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 10/39] target/arm: Define init-svtor property for the reset secure VTOR value Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 11/39] armv7m: Forward init-svtor property to CPU object Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 12/39] target/arm: Add Cortex-M33 Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 13/39] hw/misc/unimp: Move struct to header file Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 14/39] include/hw/or-irq.h: Add missing include guard Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 15/39] qdev: Add new qdev_init_gpio_in_named_with_opaque() Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 16/39] hw/core/split-irq: Device that splits IRQ lines Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 17/39] hw/misc/mps2-fpgaio: FPGA control block for MPS2 AN505 Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 18/39] hw/misc/tz-ppc: Model TrustZone peripheral protection controller Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 19/39] hw/misc/iotkit-secctl: Arm IoT Kit security controller initial skeleton Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 20/39] hw/misc/iotkit-secctl: Add handling for PPCs Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 21/39] hw/misc/iotkit-secctl: Add remaining simple registers Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 22/39] hw/arm/iotkit: Model Arm IOT Kit Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 23/39] mps2-an505: New board model: MPS2 with AN505 Cortex-M33 FPGA image Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 24/39] target/arm: Add ARM_FEATURE_V8_RDM Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 25/39] target/arm: Refactor disas_simd_indexed decode Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 26/39] target/arm: Refactor disas_simd_indexed size checks Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 27/39] target/arm: Decode aa64 armv8.1 scalar three same extra Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 28/39] target/arm: Decode aa64 armv8.1 " Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 29/39] target/arm: Decode aa64 armv8.1 scalar/vector x indexed element Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 30/39] target/arm: Decode aa32 armv8.1 three same Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 31/39] target/arm: Decode aa32 armv8.1 two reg and a scalar Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 32/39] target/arm: Enable ARM_FEATURE_V8_RDM Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 33/39] target/arm: Add ARM_FEATURE_V8_FCMA Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 34/39] target/arm: Decode aa64 armv8.3 fcadd Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 35/39] target/arm: Decode aa64 armv8.3 fcmla Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 36/39] target/arm: Decode aa32 armv8.3 3-same Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 37/39] target/arm: Decode aa32 armv8.3 2-reg-index Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 38/39] target/arm: Decode t32 simd 3reg and 2reg_scalar extension Peter Maydell
2018-03-02 11:06 ` [Qemu-devel] [PULL 39/39] target/arm: Enable ARM_FEATURE_V8_FCMA Peter Maydell
2018-03-02 11:42 ` [Qemu-devel] [PULL 00/39] target-arm queue no-reply
2018-03-02 15:45 ` Peter Maydell

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