From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41098) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1et2mm-0008It-EF for qemu-devel@nongnu.org; Mon, 05 Mar 2018 21:57:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1et2mj-0004ln-BT for qemu-devel@nongnu.org; Mon, 05 Mar 2018 21:57:04 -0500 Date: Mon, 5 Mar 2018 21:56:59 -0500 From: "Emilio G. Cota" Message-ID: <20180306025659.GA4195@flamenco> References: <1519944838-12430-1-git-send-email-cota@braap.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Subject: Re: [Qemu-devel] [PATCHv1 00/14] Translation loop conversion for sh4/sparc/mips/s390x/openrisc targets List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Michael Clark Cc: QEMU Developers , David Hildenbrand , Mark Cave-Ayland , Cornelia Huck , Richard Henderson , Alexander Graf , qemu-s390x@nongnu.org, Artyom Tarasenko , Stafford Horne , Yongbok Kim , Aurelien Jarno On Tue, Mar 06, 2018 at 12:57:13 +1300, Michael Clark wrote: > On Fri, Mar 2, 2018 at 11:53 AM, Emilio G. Cota wrote: > > > [ What is this all about? See this message: > > http://lists.gnu.org/archive/html/qemu-devel/2018-02/msg04785.html ] (snip) > > You can fetch this series from: > > https://github.com/cota/qemu/tree/trloop-conv-v1 > > > Curious to know what we would need to change in RISC-V translate.c: > > - > https://github.com/riscv/riscv-qemu/blob/qemu-upstream-v8/target/riscv/translate.c > > I'm going to make a v8.1 branch and tag that is a rebase of the v8 patch > series against current QEMU master, and hopefully we get the RISC-V port > merged before the soft-freeze. Fingers crossed. I have patches that convert riscv as well. Once riscv is on master I'll send the patches to the list; I don't want this work to delay the riscv merge even more! Emilio