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From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org, groug@kaod.org
Cc: agraf@suse.de, surajjs@au1.ibm.com, qemu-ppc@nongnu.org,
	qemu-devel@nongnu.org,
	Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,
	David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PULL 11/30] heathrow: QOMify heathrow PIC
Date: Tue,  6 Mar 2018 15:01:35 +1100	[thread overview]
Message-ID: <20180306040154.3669-12-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20180306040154.3669-1-david@gibson.dropbear.id.au>

From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 hw/intc/heathrow_pic.c         | 126 +++++++++++++++++++++++------------------
 include/hw/intc/heathrow_pic.h |  49 ++++++++++++++++
 2 files changed, 119 insertions(+), 56 deletions(-)
 create mode 100644 include/hw/intc/heathrow_pic.h

diff --git a/hw/intc/heathrow_pic.c b/hw/intc/heathrow_pic.c
index 171f5ed814..7bf44e0d86 100644
--- a/hw/intc/heathrow_pic.c
+++ b/hw/intc/heathrow_pic.c
@@ -25,6 +25,7 @@
 #include "qemu/osdep.h"
 #include "hw/hw.h"
 #include "hw/ppc/mac.h"
+#include "hw/intc/heathrow_pic.h"
 
 /* debug PIC */
 //#define DEBUG_PIC
@@ -36,39 +37,27 @@
 #define PIC_DPRINTF(fmt, ...)
 #endif
 
-typedef struct HeathrowPIC {
-    uint32_t events;
-    uint32_t mask;
-    uint32_t levels;
-    uint32_t level_triggered;
-} HeathrowPIC;
-
-typedef struct HeathrowPICS {
-    MemoryRegion mem;
-    HeathrowPIC pics[2];
-    qemu_irq *irqs;
-} HeathrowPICS;
-
-static inline int check_irq(HeathrowPIC *pic)
+static inline int heathrow_check_irq(HeathrowPICState *pic)
 {
     return (pic->events | (pic->levels & pic->level_triggered)) & pic->mask;
 }
 
 /* update the CPU irq state */
-static void heathrow_pic_update(HeathrowPICS *s)
+static void heathrow_update_irq(HeathrowState *s)
 {
-    if (check_irq(&s->pics[0]) || check_irq(&s->pics[1])) {
+    if (heathrow_check_irq(&s->pics[0]) ||
+            heathrow_check_irq(&s->pics[1])) {
         qemu_irq_raise(s->irqs[0]);
     } else {
         qemu_irq_lower(s->irqs[0]);
     }
 }
 
-static void pic_write(void *opaque, hwaddr addr,
-                      uint64_t value, unsigned size)
+static void heathrow_write(void *opaque, hwaddr addr,
+                           uint64_t value, unsigned size)
 {
-    HeathrowPICS *s = opaque;
-    HeathrowPIC *pic;
+    HeathrowState *s = opaque;
+    HeathrowPICState *pic;
     unsigned int n;
 
     n = ((addr & 0xfff) - 0x10) >> 4;
@@ -79,24 +68,24 @@ static void pic_write(void *opaque, hwaddr addr,
     switch(addr & 0xf) {
     case 0x04:
         pic->mask = value;
-        heathrow_pic_update(s);
+        heathrow_update_irq(s);
         break;
     case 0x08:
         /* do not reset level triggered IRQs */
         value &= ~pic->level_triggered;
         pic->events &= ~value;
-        heathrow_pic_update(s);
+        heathrow_update_irq(s);
         break;
     default:
         break;
     }
 }
 
-static uint64_t pic_read(void *opaque, hwaddr addr,
-                         unsigned size)
+static uint64_t heathrow_read(void *opaque, hwaddr addr,
+                              unsigned size)
 {
-    HeathrowPICS *s = opaque;
-    HeathrowPIC *pic;
+    HeathrowState *s = opaque;
+    HeathrowPICState *pic;
     unsigned int n;
     uint32_t value;
 
@@ -124,16 +113,16 @@ static uint64_t pic_read(void *opaque, hwaddr addr,
     return value;
 }
 
-static const MemoryRegionOps heathrow_pic_ops = {
-    .read = pic_read,
-    .write = pic_write,
+static const MemoryRegionOps heathrow_ops = {
+    .read = heathrow_read,
+    .write = heathrow_write,
     .endianness = DEVICE_LITTLE_ENDIAN,
 };
 
-static void heathrow_pic_set_irq(void *opaque, int num, int level)
+static void heathrow_set_irq(void *opaque, int num, int level)
 {
-    HeathrowPICS *s = opaque;
-    HeathrowPIC *pic;
+    HeathrowState *s = opaque;
+    HeathrowPICState *pic;
     unsigned int irq_bit;
 
 #if defined(DEBUG)
@@ -153,7 +142,7 @@ static void heathrow_pic_set_irq(void *opaque, int num, int level)
     } else {
         pic->levels &= ~irq_bit;
     }
-    heathrow_pic_update(s);
+    heathrow_update_irq(s);
 }
 
 static const VMStateDescription vmstate_heathrow_pic_one = {
@@ -161,54 +150,79 @@ static const VMStateDescription vmstate_heathrow_pic_one = {
     .version_id = 0,
     .minimum_version_id = 0,
     .fields = (VMStateField[]) {
-        VMSTATE_UINT32(events, HeathrowPIC),
-        VMSTATE_UINT32(mask, HeathrowPIC),
-        VMSTATE_UINT32(levels, HeathrowPIC),
-        VMSTATE_UINT32(level_triggered, HeathrowPIC),
+        VMSTATE_UINT32(events, HeathrowPICState),
+        VMSTATE_UINT32(mask, HeathrowPICState),
+        VMSTATE_UINT32(levels, HeathrowPICState),
+        VMSTATE_UINT32(level_triggered, HeathrowPICState),
         VMSTATE_END_OF_LIST()
     }
 };
 
-static const VMStateDescription vmstate_heathrow_pic = {
+static const VMStateDescription vmstate_heathrow = {
     .name = "heathrow_pic",
     .version_id = 1,
     .minimum_version_id = 1,
     .fields = (VMStateField[]) {
-        VMSTATE_STRUCT_ARRAY(pics, HeathrowPICS, 2, 1,
-                             vmstate_heathrow_pic_one, HeathrowPIC),
+        VMSTATE_STRUCT_ARRAY(pics, HeathrowState, 2, 1,
+                             vmstate_heathrow_pic_one, HeathrowPICState),
         VMSTATE_END_OF_LIST()
     }
 };
 
-static void heathrow_pic_reset_one(HeathrowPIC *s)
+static void heathrow_reset(DeviceState *d)
 {
-    memset(s, '\0', sizeof(HeathrowPIC));
+    HeathrowState *s = HEATHROW(d);
+
+    s->pics[0].level_triggered = 0;
+    s->pics[1].level_triggered = 0x1ff00000;
 }
 
-static void heathrow_pic_reset(void *opaque)
+static void heathrow_init(Object *obj)
 {
-    HeathrowPICS *s = opaque;
-
-    heathrow_pic_reset_one(&s->pics[0]);
-    heathrow_pic_reset_one(&s->pics[1]);
+    HeathrowState *s = HEATHROW(obj);
 
-    s->pics[0].level_triggered = 0;
-    s->pics[1].level_triggered = 0x1ff00000;
+    memory_region_init_io(&s->mem, OBJECT(s), &heathrow_ops, s,
+                          "heathrow-pic", 0x1000);
 }
 
 qemu_irq *heathrow_pic_init(MemoryRegion **pmem,
                             int nb_cpus, qemu_irq **irqs)
 {
-    HeathrowPICS *s;
+    DeviceState *d;
+    HeathrowState *s;
 
-    s = g_malloc0(sizeof(HeathrowPICS));
+    d = qdev_create(NULL, TYPE_HEATHROW);
+    qdev_init_nofail(d);
+
+    s = HEATHROW(d);
     /* only 1 CPU */
     s->irqs = irqs[0];
-    memory_region_init_io(&s->mem, NULL, &heathrow_pic_ops, s,
-                          "heathrow-pic", 0x1000);
+
     *pmem = &s->mem;
 
-    vmstate_register(NULL, -1, &vmstate_heathrow_pic, s);
-    qemu_register_reset(heathrow_pic_reset, s);
-    return qemu_allocate_irqs(heathrow_pic_set_irq, s, 64);
+    return qemu_allocate_irqs(heathrow_set_irq, s, HEATHROW_NUM_IRQS);
+}
+
+static void heathrow_class_init(ObjectClass *oc, void *data)
+{
+    DeviceClass *dc = DEVICE_CLASS(oc);
+
+    dc->reset = heathrow_reset;
+    dc->vmsd = &vmstate_heathrow;
+    set_bit(DEVICE_CATEGORY_MISC, dc->categories);
 }
+
+static const TypeInfo heathrow_type_info = {
+    .name = TYPE_HEATHROW,
+    .parent = TYPE_SYS_BUS_DEVICE,
+    .instance_size = sizeof(HeathrowState),
+    .instance_init = heathrow_init,
+    .class_init = heathrow_class_init,
+};
+
+static void heathrow_register_types(void)
+{
+    type_register_static(&heathrow_type_info);
+}
+
+type_init(heathrow_register_types)
diff --git a/include/hw/intc/heathrow_pic.h b/include/hw/intc/heathrow_pic.h
new file mode 100644
index 0000000000..bc3ffaab87
--- /dev/null
+++ b/include/hw/intc/heathrow_pic.h
@@ -0,0 +1,49 @@
+/*
+ * Heathrow PIC support (OldWorld PowerMac)
+ *
+ * Copyright (c) 2005-2007 Fabrice Bellard
+ * Copyright (c) 2007 Jocelyn Mayer
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef HEATHROW_H
+#define HEATHROW_H
+
+#define TYPE_HEATHROW "heathrow"
+#define HEATHROW(obj) OBJECT_CHECK(HeathrowState, (obj), TYPE_HEATHROW)
+
+typedef struct HeathrowPICState {
+    uint32_t events;
+    uint32_t mask;
+    uint32_t levels;
+    uint32_t level_triggered;
+} HeathrowPICState;
+
+typedef struct HeathrowState {
+    SysBusDevice parent_obj;
+
+    MemoryRegion mem;
+    HeathrowPICState pics[2];
+    qemu_irq *irqs;
+} HeathrowState;
+
+#define HEATHROW_NUM_IRQS 64
+
+#endif /* HEATHROW_H */
-- 
2.14.3

  parent reply	other threads:[~2018-03-06  4:02 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-06  4:01 [Qemu-devel] [PULL 00/30] ppc-for-2.12 queue 20180306 David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 01/30] spapr: fix missing CPU core nodes in DT when running with TCG David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 02/30] ppc440_uc: Fix unintialized variable warning with older gcc David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 03/30] ppc440: Add emulation of plb-pcix controller found in some 440 SoCs David Gibson
2018-04-27 12:34   ` Peter Maydell
2018-04-27 21:38     ` BALATON Zoltan
2018-03-06  4:01 ` [Qemu-devel] [PULL 04/30] roms: Added git submodule for u-boot-sam460 (firmware for sam460ex) David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 05/30] pc-bios: Added u-boot-sam460 firmware binary David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 06/30] ppc: Add aCube Sam460ex board David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 07/30] spapr: register dummy ICPs later David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 08/30] spapr: harden code that depends on VSMT David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 09/30] macio: embed DBDMA device directly within macio David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 10/30] macio: move ESCC device within the macio device David Gibson
2018-03-06  4:01 ` David Gibson [this message]
2018-03-06  4:01 ` [Qemu-devel] [PULL 12/30] heathrow: convert to trace-events David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 13/30] heathrow: change heathrow_pic_init() to return the heathrow device David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 14/30] macio: move macio related structures and defines into separate macio.h file David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 15/30] mac_oldworld: use object link to pass heathrow PIC object to macio David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 16/30] openpic: move KVM-specific declarations into separate openpic_kvm.h file David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 17/30] openpic: move OpenPIC state and related definitions to openpic.h David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 18/30] mac_newworld: use object link to pass OpenPIC object to macio David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 19/30] macio: move setting of CUDA timebase frequency to macio_common_realize() David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 20/30] macio: remove macio_init() function David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 21/30] target/ppc: Check mask when setting cap_ppc_safe_indirect_branch David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 22/30] ppc/spapr-caps: Add support for custom spapr_capabilities David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 23/30] ppc/spapr-caps: Convert cap-cfpc to custom spapr-cap David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 24/30] ppc/spapr-caps: Convert cap-sbbc " David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 25/30] ppc/spapr-caps: Convert cap-ibs " David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 26/30] ppc/spapr-caps: Define the pseries-2.12-sxxm machine type David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 27/30] hw/ppc/spapr, e500: Use new property "stdout-path" for boot console David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 28/30] PPC: e500: Fix duplicate kernel load and device tree overlap David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 29/30] adb: add trace-events for monitoring keyboard/mouse during bus enumeration David Gibson
2018-03-06  4:01 ` [Qemu-devel] [PULL 30/30] PowerPC: Add TS bits into msr_mask David Gibson
2018-03-06  4:30 ` [Qemu-devel] [PULL 00/30] ppc-for-2.12 queue 20180306 no-reply
2018-03-06  4:39   ` David Gibson
2018-03-06 11:19 ` Peter Maydell
2018-03-06 16:48 ` Thomas Huth
2018-03-06 17:28   ` Mark Cave-Ayland
2018-03-06 17:47     ` Thomas Huth
2018-03-06 17:54       ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
2018-03-06 17:56       ` [Qemu-devel] " Mark Cave-Ayland
2018-03-07 10:23         ` Daniel P. Berrangé
2018-03-06 18:55       ` Peter Maydell
2018-03-07 12:16   ` [Qemu-devel] [Qemu-ppc] " luigi burdo
2018-03-07 12:21     ` Thomas Huth
2018-03-07 12:52       ` Cornelia Huck

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