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From: Sandipan Das <sandipan@linux.vnet.ibm.com>
To: peter.maydell@linaro.org, joserz@linux.vnet.ibm.com
Cc: nikunj@linux.vnet.ibm.com, naveen.n.rao@linux.vnet.ibm.com,
	qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH risu 3/3] risu_reginfo_ppc64.c: Fix register name prefix
Date: Tue,  6 Mar 2018 12:12:10 +0530	[thread overview]
Message-ID: <20180306064210.26157-3-sandipan@linux.vnet.ibm.com> (raw)
In-Reply-To: <20180306064210.26157-1-sandipan@linux.vnet.ibm.com>

Use 'f' instead of 'r' as the prefix when dumping the values
of floating-point registers.

Signed-off-by: Sandipan Das <sandipan@linux.vnet.ibm.com>
---
 risu_reginfo_ppc64.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/risu_reginfo_ppc64.c b/risu_reginfo_ppc64.c
index eb9c12b..5f33648 100644
--- a/risu_reginfo_ppc64.c
+++ b/risu_reginfo_ppc64.c
@@ -122,7 +122,7 @@ int reginfo_dump(struct reginfo *ri, FILE * f)
     fprintf(f, "\tdscr   : %16lx\n\n", ri->gregs[44]);
 
     for (i = 0; i < 16; i++) {
-        fprintf(f, "\tf%2d: %.4f\tr%2d: %.4f\n", i, ri->fpregs[i],
+        fprintf(f, "\tf%2d: %.4f\tf%2d: %.4f\n", i, ri->fpregs[i],
                 i + 16, ri->fpregs[i + 16]);
     }
     fprintf(f, "\tfpscr: %f\n\n", ri->fpregs[32]);
@@ -167,7 +167,7 @@ int reginfo_dump_mismatch(struct reginfo *m, struct reginfo *a, FILE *f)
         }
 
         if (m->fpregs[i] != a->fpregs[i]) {
-            fprintf(f, "Mismatch: Register r%d\n", i);
+            fprintf(f, "Mismatch: Register f%d\n", i);
             fprintf(f, "m: [%f] != a: [%f]\n", m->fpregs[i], a->fpregs[i]);
         }
     }
-- 
2.14.3

  parent reply	other threads:[~2018-03-06  6:42 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-06  6:42 [Qemu-devel] [PATCH risu 1/3] ppc64.risu: Add missing byte and dword loads Sandipan Das
2018-03-06  6:42 ` [Qemu-devel] [PATCH risu 2/3] ppc64.risu: Fix pattern for load qword Sandipan Das
2018-03-06  6:42 ` Sandipan Das [this message]
2018-03-06 11:39 ` [Qemu-devel] [PATCH risu 1/3] ppc64.risu: Add missing byte and dword loads Peter Maydell
2018-03-06 11:42   ` Sandipan Das

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