From: Sandipan Das <sandipan@linux.vnet.ibm.com>
To: peter.maydell@linaro.org, joserz@linux.vnet.ibm.com
Cc: nikunj@linux.vnet.ibm.com, naveen.n.rao@linux.vnet.ibm.com,
qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH risu v2 0/3] Miscellaneous fixes for powerpc64
Date: Tue, 6 Mar 2018 17:38:10 +0530 [thread overview]
Message-ID: <20180306120813.17537-1-sandipan@linux.vnet.ibm.com> (raw)
The first patch adds the patterns for the missing byte and
doubleword load instructions. The second patch fixes mismatches
encountered when using the load quadword instruction. The last
patch fixes a minor typo in the floating-point register prefix
shown when dumping the register values.
Changelog:
v2 -> Added a cover letter as requested by Peter.
Sandipan Das (3):
ppc64.risu: Add missing byte and dword loads
ppc64.risu: Fix pattern for load qword
risu_reginfo_ppc64.c: Fix register name prefix
ppc64.risu | 29 +++++++++++++++++++++++++++--
risu_reginfo_ppc64.c | 4 ++--
2 files changed, 29 insertions(+), 4 deletions(-)
--
2.14.3
next reply other threads:[~2018-03-06 12:08 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-06 12:08 Sandipan Das [this message]
2018-03-06 12:08 ` [Qemu-devel] [PATCH risu v2 1/3] ppc64.risu: Add missing byte and dword loads Sandipan Das
2018-03-06 12:08 ` [Qemu-devel] [PATCH risu v2 2/3] ppc64.risu: Fix pattern for load qword Sandipan Das
2018-03-06 12:08 ` [Qemu-devel] [PATCH risu v2 3/3] risu_reginfo_ppc64.c: Fix register name prefix Sandipan Das
2018-03-06 13:05 ` [Qemu-devel] [PATCH risu v2 0/3] Miscellaneous fixes for powerpc64 Peter Maydell
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