From: Eduardo Habkost <ehabkost@redhat.com>
To: Brijesh Singh <brijesh.singh@amd.com>
Cc: "Daniel P. Berrangé" <berrange@redhat.com>,
qemu-devel@nongnu.org,
"Alistair Francis" <alistair.francis@xilinx.com>,
"Christian Borntraeger" <borntraeger@de.ibm.com>,
"Cornelia Huck" <cornelia.huck@de.ibm.com>,
"Dr. David Alan Gilbert" <dgilbert@redhat.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Edgar E. Iglesias" <edgar.iglesias@xilinx.com>,
"Eric Blake" <eblake@redhat.com>,
kvm@vger.kernel.org, "Marcel Apfelbaum" <marcel@redhat.com>,
"Markus Armbruster" <armbru@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Peter Crosthwaite" <crosthwaite.peter@gmail.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Stefan Hajnoczi" <stefanha@gmail.com>,
"Thomas Lendacky" <Thomas.Lendacky@amd.com>,
"Borislav Petkov" <bp@suse.de>, "Alexander Graf" <agraf@suse.de>,
"Bruce Rogers" <brogers@suse.com>,
"Richard Henderson" <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH v12 08/28] target/i386: add Secure Encrypted Virtulization (SEV) object
Date: Thu, 8 Mar 2018 19:44:12 -0300 [thread overview]
Message-ID: <20180308224412.GF3417@localhost.localdomain> (raw)
In-Reply-To: <e39191c3-9c83-8c44-f1d2-9fa7a2f7695d@amd.com>
On Thu, Mar 08, 2018 at 04:22:52PM -0600, Brijesh Singh wrote:
>
>
> On 3/8/18 10:49 AM, Daniel P. Berrangé wrote:
> > On Thu, Mar 08, 2018 at 06:48:41AM -0600, Brijesh Singh wrote:
> >> Add a new memory encryption object 'sev-guest'. The object will be used
> >> to create enrypted VMs on AMD EPYC CPU. The object provides the properties
> >> to pass guest owner's public Diffie-hellman key, guest policy and session
> >> information required to create the memory encryption context within the
> >> SEV firmware.
> >>
> >> e.g to launch SEV guest
> >> # $QEMU \
> >> -object sev-guest,id=sev0 \
> >> -machine ....,memory-encryption=sev0
> >>
> >> Cc: Paolo Bonzini <pbonzini@redhat.com>
> >> Cc: Richard Henderson <rth@twiddle.net>
> >> Cc: Eduardo Habkost <ehabkost@redhat.com>
> >> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
> >
> >> diff --git a/qemu-options.hx b/qemu-options.hx
> >> index 4c280142c52c..6113bce08a8c 100644
> >> --- a/qemu-options.hx
> >> +++ b/qemu-options.hx
> >> @@ -4353,6 +4353,50 @@ contents of @code{iv.b64} to the second secret
> >> data=$SECRET,iv=$(<iv.b64)
> >> @end example
> >>
> >> +@item -object sev-guest,id=@var{id},cbitpos=@var{cbitpos},reduced-phys-bits=@var{val},[sev-device=@var{string},policy=@var{policy},handle=@var{handle},dh-cert-file=@var{file},session-file=@var{file}]
> >> +
> >> +Create a Secure Encrypted Virtualization (SEV) guest object, which can be used
> >> +to provide the guest memory encryption support on AMD processors.
> >> +
> >> +When memory encryption is enabled, one of the physical address bit (aka the
> >> +C-bit) is utilized to mark if a memory page is protected. The @option{cbitpos}
> >> +is used to provide the C-bit position. The C-bit position is Host family dependent
> >> +hence user must provide this value. On EPYC, the value should be 47.
> >> +
> >> +When memory encryption is enabled, we loose certain bits in physical address space.
> >> +The @option{reduced-phys-bits} is used to provide the number of bits we loose in
> >> +physical address space. Similar to C-bit, the value is Host family dependent.
> >> +On EPYC, the value should be 5.
> > Is it valid to specify a different value for either of these properties ?
> > eg what happens if I pass cbitpos=45 instead of 47 on an EPYC host ?
>
> On EPYC, passing anything other than 47 will trigger error during SEV
> guest initialization. The value of Cbit position is host dependent, the
> value is readonly and can be obtained through the host CPUID. The
> cbitpos must be same between guest and host. Please note that the pte's
> in guest page table will need to use the cbitpos information to mark
> the pages as encrypted. If cbit position given to the guest is different
> from the host then guest will fail to execute.
>
> >
> > In particular I thinking about possible migration scenario, where EPYC
> > uses 47 by default but some $NEXT AMD CPU uses 48 by default. In that
> > case we might want to use '47' on both CPUs if we need ability to live
> > migrate between different host CPU generations. Would that be valid ?
>
> We will not be able to migrate SEV guests if cbit position does not
> match between the source and destination hosts. Since during migration,
> the destination guest is launched with same QEMU cli as source hence
> cbitpos check in QEMU will catch it and fail the new launch. Optionally,
> user can call query-sev-capabilities on both source and destination to
> see if cbitpos is compatible before attempting to migrate the guest.
>
> > On the flip side, if the value really it strictly tied to the host
> > CPU family and no deviation is permitted, could the kernel not just
> > pick the right value automatically avoiding the config option ?
> >
>
> I think doing so will be an issue for the migration. Consider your above
> use case, a SEV guest is running on EPYC with cbitpos=47 and if we
> migrate to some $NEXT AMD CPU which uses need to use cbitpos=48 and we
> will fail to resume the guest on destination after migrating.
Exactly, in other words these two options are part of the guest
ABI, and QEMU promises to never make the guest ABI depend on the
host hardware unless you're using "-cpu host".
In theory we could make QEMU choose the right values
automatically if we document very clearly that the default
behavior is unsafe. But I would rather not take that risk and
force management software to be aware of the gotchas involved in
using SEV + live-migration.
--
Eduardo
next prev parent reply other threads:[~2018-03-08 22:44 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-08 12:48 [Qemu-devel] [PATCH v12 00/28] x86: Secure Encrypted Virtualization (AMD) Brijesh Singh
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 01/28] memattrs: add debug attribute Brijesh Singh
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 02/28] exec: add ram_debug_ops support Brijesh Singh
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 03/28] exec: add debug version of physical memory read and write API Brijesh Singh
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 04/28] monitor/i386: use debug APIs when accessing guest memory Brijesh Singh
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 05/28] machine: add -memory-encryption property Brijesh Singh
2018-03-08 16:43 ` Daniel P. Berrangé
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 06/28] kvm: update kvm.h to include memory encryption ioctls Brijesh Singh
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 07/28] docs: add AMD Secure Encrypted Virtualization (SEV) Brijesh Singh
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 08/28] target/i386: add Secure Encrypted Virtulization (SEV) object Brijesh Singh
2018-03-08 16:49 ` Daniel P. Berrangé
2018-03-08 22:22 ` Brijesh Singh
2018-03-08 22:44 ` Eduardo Habkost [this message]
2018-03-13 8:42 ` Paolo Bonzini
2018-03-13 18:49 ` Eduardo Habkost
2018-03-13 19:04 ` Paolo Bonzini
2018-03-13 19:20 ` Eduardo Habkost
2018-03-13 19:49 ` Dr. David Alan Gilbert
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 09/28] qmp: add query-sev command Brijesh Singh
2018-03-08 16:52 ` Daniel P. Berrangé
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 10/28] include: add psp-sev.h header file Brijesh Singh
2018-03-08 16:54 ` Daniel P. Berrangé
2018-03-09 12:24 ` Dr. David Alan Gilbert
2018-03-12 10:32 ` Daniel P. Berrangé
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 11/28] sev/i386: add command to initialize the memory encryption context Brijesh Singh
2018-03-08 16:57 ` Daniel P. Berrangé
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 12/28] sev/i386: register the guest memory range which may contain encrypted data Brijesh Singh
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 13/28] kvm: introduce memory encryption APIs Brijesh Singh
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 14/28] hmp: add 'info sev' command Brijesh Singh
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 15/28] sev/i386: add command to create launch memory encryption context Brijesh Singh
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 16/28] sev/i386: add command to encrypt guest memory region Brijesh Singh
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 17/28] target/i386: encrypt bios rom Brijesh Singh
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 18/28] sev/i386: add support to LAUNCH_MEASURE command Brijesh Singh
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 19/28] sev/i386: finalize the SEV guest launch flow Brijesh Singh
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 20/28] hw/i386: set ram_debug_ops when memory encryption is enabled Brijesh Singh
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 21/28] sev/i386: add debug encrypt and decrypt commands Brijesh Singh
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 22/28] target/i386: clear C-bit when walking SEV guest page table Brijesh Singh
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 23/28] qmp: add query-sev-launch-measure command Brijesh Singh
2018-03-08 17:03 ` Daniel P. Berrangé
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 24/28] sev/i386: add migration blocker Brijesh Singh
2018-03-13 9:33 ` Paolo Bonzini
2018-03-13 11:28 ` Brijesh Singh
2018-03-13 11:36 ` Paolo Bonzini
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 25/28] cpu/i386: populate CPUID 0x8000_001F when SEV is active Brijesh Singh
2018-03-08 12:48 ` [Qemu-devel] [PATCH v12 26/28] qmp: add query-sev-capabilities command Brijesh Singh
2018-03-08 17:05 ` Daniel P. Berrangé
2018-03-08 22:52 ` Brijesh Singh
2018-03-08 12:49 ` [Qemu-devel] [PATCH v12 27/28] sev/i386: add sev_get_capabilities() Brijesh Singh
2018-03-08 12:49 ` [Qemu-devel] [PATCH v12 28/28] tests/qmp-test: blacklist sev specific qmp commands Brijesh Singh
2018-03-08 17:08 ` Daniel P. Berrangé
2018-03-08 20:18 ` Brijesh Singh
2018-03-08 21:45 ` Eduardo Habkost
2018-03-08 23:22 ` Daniel P. Berrange
2018-03-09 10:12 ` Dr. David Alan Gilbert
2018-03-13 9:07 ` Paolo Bonzini
2018-03-13 11:21 ` Brijesh Singh
2018-03-13 11:36 ` Paolo Bonzini
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