From: Eduardo Habkost <ehabkost@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
"Richard Henderson" <rth@twiddle.net>,
qemu-devel@nongnu.org, "Wanpeng Li" <wanpengli@tencent.com>,
"Radim Krčmář" <rkrcmar@redhat.com>
Subject: [Qemu-devel] [PULL 1/3] target-i386: add KVM_HINTS_DEDICATED performance hint
Date: Mon, 12 Mar 2018 17:00:20 -0300 [thread overview]
Message-ID: <20180312200022.9760-2-ehabkost@redhat.com> (raw)
In-Reply-To: <20180312200022.9760-1-ehabkost@redhat.com>
From: Wanpeng Li <wanpengli@tencent.com>
Add KVM_HINTS_DEDICATED performance hint, guest checks this feature bit
to determine if they run on dedicated vCPUs, allowing optimizations such
as usage of qspinlocks.
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim Krčmář <rkrcmar@redhat.com>
Cc: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Wanpeng Li <wanpengli@tencent.com>
Message-Id: <1518185725-69559-1-git-send-email-wanpengli@tencent.com>
[ehabkost: Renamed property to kvm-hint-dedicated]
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
target/i386/cpu.h | 3 +++
target/i386/cpu.c | 14 ++++++++++++++
target/i386/kvm.c | 4 ++++
3 files changed, 21 insertions(+)
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index faf39ec1ce..8d977ec567 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -471,6 +471,7 @@ typedef enum FeatureWord {
FEAT_8000_0008_EBX, /* CPUID[8000_0008].EBX */
FEAT_C000_0001_EDX, /* CPUID[C000_0001].EDX */
FEAT_KVM, /* CPUID[4000_0001].EAX (KVM_CPUID_FEATURES) */
+ FEAT_KVM_HINTS, /* CPUID[4000_0001].EDX */
FEAT_HYPERV_EAX, /* CPUID[4000_0003].EAX */
FEAT_HYPERV_EBX, /* CPUID[4000_0003].EBX */
FEAT_HYPERV_EDX, /* CPUID[4000_0003].EDX */
@@ -666,6 +667,8 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
#define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulation Single Precision */
#define CPUID_7_0_EDX_SPEC_CTRL (1U << 26) /* Speculation Control */
+#define KVM_HINTS_DEDICATED (1U << 0)
+
#define CPUID_8000_0008_EBX_IBPB (1U << 12) /* Indirect Branch Prediction Barrier */
#define CPUID_XSAVE_XSAVEOPT (1U << 0)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 2c04645cea..5ea1931b7e 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -359,6 +359,20 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
.cpuid_eax = KVM_CPUID_FEATURES, .cpuid_reg = R_EAX,
.tcg_features = TCG_KVM_FEATURES,
},
+ [FEAT_KVM_HINTS] = {
+ .feat_names = {
+ "kvm-hint-dedicated", NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ },
+ .cpuid_eax = KVM_CPUID_FEATURES, .cpuid_reg = R_EDX,
+ .tcg_features = TCG_KVM_FEATURES,
+ },
[FEAT_HYPERV_EAX] = {
.feat_names = {
NULL /* hv_msr_vp_runtime_access */, NULL /* hv_msr_time_refcount_access */,
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
index ad4b159b28..44ee524188 100644
--- a/target/i386/kvm.c
+++ b/target/i386/kvm.c
@@ -383,6 +383,9 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function,
if (!kvm_irqchip_in_kernel()) {
ret &= ~(1U << KVM_FEATURE_PV_UNHALT);
}
+ } else if (function == KVM_CPUID_FEATURES && reg == R_EDX) {
+ ret |= KVM_HINTS_DEDICATED;
+ found = 1;
}
/* fallback for older kernels */
@@ -801,6 +804,7 @@ int kvm_arch_init_vcpu(CPUState *cs)
c = &cpuid_data.entries[cpuid_i++];
c->function = KVM_CPUID_FEATURES | kvm_base;
c->eax = env->features[FEAT_KVM];
+ c->edx = env->features[FEAT_KVM_HINTS];
}
cpu_x86_cpuid(env, 0, 0, &limit, &unused, &unused, &unused);
--
2.14.3
next prev parent reply other threads:[~2018-03-12 20:00 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-12 20:00 [Qemu-devel] [PULL 0/3] x86 queue, 2018-03-12 Eduardo Habkost
2018-03-12 20:00 ` Eduardo Habkost [this message]
2018-03-12 20:00 ` [Qemu-devel] [PULL 2/3] i386: Add Intel Processor Trace feature support Eduardo Habkost
2018-03-12 20:00 ` [Qemu-devel] [PULL 3/3] i386: Add support to get/set/migrate Intel Processor Trace feature Eduardo Habkost
2018-03-13 15:25 ` [Qemu-devel] [PULL 0/3] x86 queue, 2018-03-12 Peter Maydell
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