* [Qemu-devel] [PATCH] i386: add KNM cpu model
@ 2018-03-14 7:29 Boqun Feng
2018-03-14 13:01 ` Daniel P. Berrangé
0 siblings, 1 reply; 4+ messages in thread
From: Boqun Feng @ 2018-03-14 7:29 UTC (permalink / raw)
To: qemu-devel; +Cc: Boqun Feng, Paolo Bonzini, Richard Henderson, Eduardo Habkost
A new cpu model called "KNM" is added to model Knights Mill processors.
Compared to "Skylake-Server" cpu model, the following features are
added:
avx512_4vnniw avx512_4fmaps avx512pf avx512er avx512_vpopcntdq
and the following features are removed:
pcid invpcid clflushopt avx512dq avx512bw axv512cd clwb smap rtm
mpx xsavec xgetbv1 hle
Signed-off-by: Boqun Feng <boqun.feng@intel.com>
---
target/i386/cpu.c | 42 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 2c04645ceac9..215a9ee6026a 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1795,6 +1795,48 @@ static X86CPUDefinition builtin_x86_defs[] = {
.xlevel = 0x80000008,
.model_id = "Intel Xeon Processor (Skylake, IBRS)",
},
+ {
+ .name = "KNM",
+ .level = 0xd,
+ .vendor = CPUID_VENDOR_INTEL,
+ .family = 6,
+ .model = 133,
+ .stepping = 0,
+ .features[FEAT_1_EDX] =
+ CPUID_VME | CPUID_SS | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR |
+ CPUID_MMX | CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV |
+ CPUID_MCA | CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC |
+ CPUID_CX8 | CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC |
+ CPUID_PSE | CPUID_DE | CPUID_FP87,
+ .features[FEAT_1_ECX] =
+ CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
+ CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
+ CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
+ CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
+ CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
+ CPUID_EXT_F16C | CPUID_EXT_RDRAND,
+ .features[FEAT_8000_0001_EDX] =
+ CPUID_EXT2_LM | CPUID_EXT2_PDPE1GB | CPUID_EXT2_RDTSCP |
+ CPUID_EXT2_NX | CPUID_EXT2_SYSCALL,
+ .features[FEAT_8000_0001_ECX] =
+ CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH,
+ .features[FEAT_7_0_EBX] =
+ CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_AVX2 |
+ CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS |
+ CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX | CPUID_7_0_EBX_AVX512F |
+ CPUID_7_0_EBX_AVX512CD | CPUID_7_0_EBX_AVX512PF |
+ CPUID_7_0_EBX_AVX512ER,
+ .features[FEAT_7_0_ECX] =
+ CPUID_7_0_ECX_AVX512_VPOPCNTDQ,
+ .features[FEAT_7_0_EDX] =
+ CPUID_7_0_EDX_AVX512_4VNNIW | CPUID_7_0_EDX_AVX512_4FMAPS,
+ .features[FEAT_XSAVE] =
+ CPUID_XSAVE_XSAVEOPT,
+ .features[FEAT_6_EAX] =
+ CPUID_6_EAX_ARAT,
+ .xlevel = 0x80000008,
+ .model_id = "Intel Xeon Phi Processor (Knights Mill)",
+ },
{
.name = "Opteron_G1",
.level = 5,
--
2.16.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [PATCH] i386: add KNM cpu model
2018-03-14 7:29 [Qemu-devel] [PATCH] i386: add KNM cpu model Boqun Feng
@ 2018-03-14 13:01 ` Daniel P. Berrangé
2018-03-16 2:11 ` Boqun Feng
0 siblings, 1 reply; 4+ messages in thread
From: Daniel P. Berrangé @ 2018-03-14 13:01 UTC (permalink / raw)
To: Boqun Feng; +Cc: qemu-devel, Paolo Bonzini, Eduardo Habkost, Richard Henderson
On Wed, Mar 14, 2018 at 03:29:59PM +0800, Boqun Feng wrote:
> A new cpu model called "KNM" is added to model Knights Mill processors.
Why the obscure acryonym? Can't we just call it KnightsMill so it is
obvious what it is to everyone, as we've done for all other Intel
CPU model names in the past.
> Compared to "Skylake-Server" cpu model, the following features are
> added:
>
> avx512_4vnniw avx512_4fmaps avx512pf avx512er avx512_vpopcntdq
>
> and the following features are removed:
>
> pcid invpcid clflushopt avx512dq avx512bw axv512cd clwb smap rtm
> mpx xsavec xgetbv1 hle
"pcid" was one of the features critical to mitigate performance
downside of the Meltdown bug fix in guests. Will Knights Mill have
a fix for Meltdown in hardware, to avoid the need for split table
pages and thus avoid the perf hit in guests ?
>
> Signed-off-by: Boqun Feng <boqun.feng@intel.com>
> ---
> target/i386/cpu.c | 42 ++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 42 insertions(+)
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 2c04645ceac9..215a9ee6026a 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -1795,6 +1795,48 @@ static X86CPUDefinition builtin_x86_defs[] = {
> .xlevel = 0x80000008,
> .model_id = "Intel Xeon Processor (Skylake, IBRS)",
> },
> + {
> + .name = "KNM",
> + .level = 0xd,
> + .vendor = CPUID_VENDOR_INTEL,
> + .family = 6,
> + .model = 133,
> + .stepping = 0,
> + .features[FEAT_1_EDX] =
> + CPUID_VME | CPUID_SS | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR |
> + CPUID_MMX | CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV |
> + CPUID_MCA | CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC |
> + CPUID_CX8 | CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC |
> + CPUID_PSE | CPUID_DE | CPUID_FP87,
> + .features[FEAT_1_ECX] =
> + CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
> + CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
> + CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
> + CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
> + CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
> + CPUID_EXT_F16C | CPUID_EXT_RDRAND,
> + .features[FEAT_8000_0001_EDX] =
> + CPUID_EXT2_LM | CPUID_EXT2_PDPE1GB | CPUID_EXT2_RDTSCP |
> + CPUID_EXT2_NX | CPUID_EXT2_SYSCALL,
> + .features[FEAT_8000_0001_ECX] =
> + CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH,
> + .features[FEAT_7_0_EBX] =
> + CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_AVX2 |
> + CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS |
> + CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX | CPUID_7_0_EBX_AVX512F |
> + CPUID_7_0_EBX_AVX512CD | CPUID_7_0_EBX_AVX512PF |
> + CPUID_7_0_EBX_AVX512ER,
> + .features[FEAT_7_0_ECX] =
> + CPUID_7_0_ECX_AVX512_VPOPCNTDQ,
> + .features[FEAT_7_0_EDX] =
> + CPUID_7_0_EDX_AVX512_4VNNIW | CPUID_7_0_EDX_AVX512_4FMAPS,
> + .features[FEAT_XSAVE] =
> + CPUID_XSAVE_XSAVEOPT,
> + .features[FEAT_6_EAX] =
> + CPUID_6_EAX_ARAT,
> + .xlevel = 0x80000008,
> + .model_id = "Intel Xeon Phi Processor (Knights Mill)",
> + },
> {
> .name = "Opteron_G1",
> .level = 5,
> --
> 2.16.1
>
>
Regards,
Daniel
--
|: https://berrange.com -o- https://www.flickr.com/photos/dberrange :|
|: https://libvirt.org -o- https://fstop138.berrange.com :|
|: https://entangle-photo.org -o- https://www.instagram.com/dberrange :|
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [PATCH] i386: add KNM cpu model
2018-03-14 13:01 ` Daniel P. Berrangé
@ 2018-03-16 2:11 ` Boqun Feng
2018-03-16 9:42 ` Daniel P. Berrangé
0 siblings, 1 reply; 4+ messages in thread
From: Boqun Feng @ 2018-03-16 2:11 UTC (permalink / raw)
To: Daniel P. Berrangé
Cc: qemu-devel, Paolo Bonzini, Eduardo Habkost, Richard Henderson
On Wed, Mar 14, 2018 at 01:01:30PM +0000, Daniel P. Berrangé wrote:
> On Wed, Mar 14, 2018 at 03:29:59PM +0800, Boqun Feng wrote:
> > A new cpu model called "KNM" is added to model Knights Mill processors.
>
> Why the obscure acryonym? Can't we just call it KnightsMill so it is
> obvious what it is to everyone, as we've done for all other Intel
> CPU model names in the past.
>
Ah.. my bad, good point! I will rename to "KnightsMill" in the next
version.
> > Compared to "Skylake-Server" cpu model, the following features are
> > added:
> >
> > avx512_4vnniw avx512_4fmaps avx512pf avx512er avx512_vpopcntdq
> >
> > and the following features are removed:
> >
> > pcid invpcid clflushopt avx512dq avx512bw axv512cd clwb smap rtm
> > mpx xsavec xgetbv1 hle
>
> "pcid" was one of the features critical to mitigate performance
> downside of the Meltdown bug fix in guests. Will Knights Mill have
> a fix for Meltdown in hardware, to avoid the need for split table
> pages and thus avoid the perf hit in guests ?
>
I got the confirmation the Knights Mill doesn't have PCID at all. For
the alternative fix for Meltdown in hardware, I will ask around and info
you if I get something.
Regards,
Boqun
> >
> > Signed-off-by: Boqun Feng <boqun.feng@intel.com>
> > ---
> > target/i386/cpu.c | 42 ++++++++++++++++++++++++++++++++++++++++++
> > 1 file changed, 42 insertions(+)
> >
> > diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> > index 2c04645ceac9..215a9ee6026a 100644
> > --- a/target/i386/cpu.c
> > +++ b/target/i386/cpu.c
> > @@ -1795,6 +1795,48 @@ static X86CPUDefinition builtin_x86_defs[] = {
> > .xlevel = 0x80000008,
> > .model_id = "Intel Xeon Processor (Skylake, IBRS)",
> > },
> > + {
> > + .name = "KNM",
> > + .level = 0xd,
> > + .vendor = CPUID_VENDOR_INTEL,
> > + .family = 6,
> > + .model = 133,
> > + .stepping = 0,
> > + .features[FEAT_1_EDX] =
> > + CPUID_VME | CPUID_SS | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR |
> > + CPUID_MMX | CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV |
> > + CPUID_MCA | CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC |
> > + CPUID_CX8 | CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC |
> > + CPUID_PSE | CPUID_DE | CPUID_FP87,
> > + .features[FEAT_1_ECX] =
> > + CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
> > + CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
> > + CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
> > + CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
> > + CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
> > + CPUID_EXT_F16C | CPUID_EXT_RDRAND,
> > + .features[FEAT_8000_0001_EDX] =
> > + CPUID_EXT2_LM | CPUID_EXT2_PDPE1GB | CPUID_EXT2_RDTSCP |
> > + CPUID_EXT2_NX | CPUID_EXT2_SYSCALL,
> > + .features[FEAT_8000_0001_ECX] =
> > + CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH,
> > + .features[FEAT_7_0_EBX] =
> > + CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_AVX2 |
> > + CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS |
> > + CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX | CPUID_7_0_EBX_AVX512F |
> > + CPUID_7_0_EBX_AVX512CD | CPUID_7_0_EBX_AVX512PF |
> > + CPUID_7_0_EBX_AVX512ER,
> > + .features[FEAT_7_0_ECX] =
> > + CPUID_7_0_ECX_AVX512_VPOPCNTDQ,
> > + .features[FEAT_7_0_EDX] =
> > + CPUID_7_0_EDX_AVX512_4VNNIW | CPUID_7_0_EDX_AVX512_4FMAPS,
> > + .features[FEAT_XSAVE] =
> > + CPUID_XSAVE_XSAVEOPT,
> > + .features[FEAT_6_EAX] =
> > + CPUID_6_EAX_ARAT,
> > + .xlevel = 0x80000008,
> > + .model_id = "Intel Xeon Phi Processor (Knights Mill)",
> > + },
> > {
> > .name = "Opteron_G1",
> > .level = 5,
> > --
> > 2.16.1
> >
> >
>
> Regards,
> Daniel
> --
> |: https://berrange.com -o- https://www.flickr.com/photos/dberrange :|
> |: https://libvirt.org -o- https://fstop138.berrange.com :|
> |: https://entangle-photo.org -o- https://www.instagram.com/dberrange :|
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [PATCH] i386: add KNM cpu model
2018-03-16 2:11 ` Boqun Feng
@ 2018-03-16 9:42 ` Daniel P. Berrangé
0 siblings, 0 replies; 4+ messages in thread
From: Daniel P. Berrangé @ 2018-03-16 9:42 UTC (permalink / raw)
To: Boqun Feng; +Cc: qemu-devel, Paolo Bonzini, Eduardo Habkost, Richard Henderson
On Fri, Mar 16, 2018 at 10:11:57AM +0800, Boqun Feng wrote:
> On Wed, Mar 14, 2018 at 01:01:30PM +0000, Daniel P. Berrangé wrote:
> > On Wed, Mar 14, 2018 at 03:29:59PM +0800, Boqun Feng wrote:
> > > A new cpu model called "KNM" is added to model Knights Mill processors.
> >
> > Why the obscure acryonym? Can't we just call it KnightsMill so it is
> > obvious what it is to everyone, as we've done for all other Intel
> > CPU model names in the past.
> >
>
> Ah.. my bad, good point! I will rename to "KnightsMill" in the next
> version.
>
> > > Compared to "Skylake-Server" cpu model, the following features are
> > > added:
> > >
> > > avx512_4vnniw avx512_4fmaps avx512pf avx512er avx512_vpopcntdq
> > >
> > > and the following features are removed:
> > >
> > > pcid invpcid clflushopt avx512dq avx512bw axv512cd clwb smap rtm
> > > mpx xsavec xgetbv1 hle
> >
> > "pcid" was one of the features critical to mitigate performance
> > downside of the Meltdown bug fix in guests. Will Knights Mill have
> > a fix for Meltdown in hardware, to avoid the need for split table
> > pages and thus avoid the perf hit in guests ?
> >
>
> I got the confirmation the Knights Mill doesn't have PCID at all. For
> the alternative fix for Meltdown in hardware, I will ask around and info
> you if I get something.
No need to wait for an answer to that question - if 'pcid' is not
in hardware, we simply have to accept whatever the answer is. So
just repost with the changed name.
Regards,
Daniel
--
|: https://berrange.com -o- https://www.flickr.com/photos/dberrange :|
|: https://libvirt.org -o- https://fstop138.berrange.com :|
|: https://entangle-photo.org -o- https://www.instagram.com/dberrange :|
^ permalink raw reply [flat|nested] 4+ messages in thread
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2018-03-14 7:29 [Qemu-devel] [PATCH] i386: add KNM cpu model Boqun Feng
2018-03-14 13:01 ` Daniel P. Berrangé
2018-03-16 2:11 ` Boqun Feng
2018-03-16 9:42 ` Daniel P. Berrangé
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