From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 11/13] hw/arm/bcm2836: Use correct affinity values for BCM2837
Date: Mon, 19 Mar 2018 18:34:13 +0000 [thread overview]
Message-ID: <20180319183415.1976-12-peter.maydell@linaro.org> (raw)
In-Reply-To: <20180319183415.1976-1-peter.maydell@linaro.org>
The BCM2837 sets the Aff1 field of the MPIDR affinity values for the
CPUs to 0, whereas the BCM2836 uses 0xf. Set this correctly, as it
is required for Linux to boot.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Andrew Baumann <Andrew.Baumann@microsoft.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20180313153458.26822-8-peter.maydell@linaro.org
---
hw/arm/bcm2836.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index 07d2705f96..d775a33969 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -25,14 +25,17 @@
struct BCM283XInfo {
const char *name;
+ int clusterid;
};
static const BCM283XInfo bcm283x_socs[] = {
{
.name = TYPE_BCM2836,
+ .clusterid = 0xf,
},
{
.name = TYPE_BCM2837,
+ .clusterid = 0x0,
},
};
@@ -58,6 +61,8 @@ static void bcm2836_init(Object *obj)
static void bcm2836_realize(DeviceState *dev, Error **errp)
{
BCM283XState *s = BCM283X(dev);
+ BCM283XClass *bc = BCM283X_GET_CLASS(dev);
+ const BCM283XInfo *info = bc->info;
Object *obj;
Error *err = NULL;
int n;
@@ -116,10 +121,8 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-fiq", 0));
for (n = 0; n < BCM283X_NCPUS; n++) {
- /* Mirror bcm2836, which has clusterid set to 0xf
- * TODO: this should be converted to a property of ARM_CPU
- */
- s->cpus[n].mp_affinity = 0xF00 | n;
+ /* TODO: this should be converted to a property of ARM_CPU */
+ s->cpus[n].mp_affinity = (info->clusterid << 8) | n;
/* set periphbase/CBAR value for CPU-local registers */
object_property_set_int(OBJECT(&s->cpus[n]),
--
2.16.2
next prev parent reply other threads:[~2018-03-19 18:34 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-19 18:34 [Qemu-devel] [PULL 00/13] target-arm queue Peter Maydell
2018-03-19 18:34 ` [Qemu-devel] [PULL 01/13] fsl-imx6: Swap Ethernet interrupt defines Peter Maydell
2018-03-19 18:34 ` [Qemu-devel] [PULL 02/13] dump: Update correct kdump phys_base field for AArch64 Peter Maydell
2018-03-19 18:34 ` [Qemu-devel] [PULL 03/13] char: i.MX: Simplify imx_update() Peter Maydell
2018-03-19 18:34 ` [Qemu-devel] [PULL 04/13] char: i.MX: Add support for "TX complete" interrupt Peter Maydell
2018-03-19 18:34 ` [Qemu-devel] [PULL 05/13] hw/arm/raspi: Don't do board-setup or secure-boot for raspi3 Peter Maydell
2018-03-19 18:34 ` [Qemu-devel] [PULL 06/13] hw/arm/boot: assert that secure_boot and secure_board_setup are false for AArch64 Peter Maydell
2018-03-19 18:34 ` [Qemu-devel] [PULL 07/13] hw/arm/boot: If booting a kernel in EL2, set SCR_EL3.HCE Peter Maydell
2018-03-19 18:34 ` [Qemu-devel] [PULL 08/13] hw/arm/bcm2386: Fix parent type of bcm2386 Peter Maydell
2018-03-19 18:34 ` [Qemu-devel] [PULL 09/13] hw/arm/bcm2836: Rename bcm2836 type/struct to bcm283x Peter Maydell
2018-03-19 18:34 ` [Qemu-devel] [PULL 10/13] hw/arm/bcm2836: Create proper bcm2837 device Peter Maydell
2018-03-19 18:34 ` Peter Maydell [this message]
2018-03-19 18:34 ` [Qemu-devel] [PULL 12/13] hw/arm/bcm2836: Hardcode correct CPU type Peter Maydell
2018-03-19 18:34 ` [Qemu-devel] [PULL 13/13] hw/arm/raspi: Provide spin-loop code for AArch64 CPUs Peter Maydell
2018-03-20 9:51 ` [Qemu-devel] [PULL 00/13] target-arm queue Peter Maydell
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