* Re: [Qemu-devel] [PATCH] target/ppc: Fix backwards migration of msr_mask
2018-03-20 2:23 [Qemu-devel] [PATCH] target/ppc: Fix backwards migration of msr_mask David Gibson
@ 2018-03-20 8:08 ` Laurent Vivier
2018-03-20 9:41 ` Greg Kurz
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Laurent Vivier @ 2018-03-20 8:08 UTC (permalink / raw)
To: David Gibson, groug, wei.guo.simon; +Cc: ldoktor, qemu-ppc, qemu-devel
On 20/03/2018 03:23, David Gibson wrote:
> 21b786f "PowerPC: Add TS bits into msr_mask" added the transaction states
> to msr_mask for recent POWER CPUs to allow correct migration of machines
> that are in certain interim transactional memory states.
>
> This was correct, but unfortunately breaks backwards of pseries-2.7 and
> earlier machine types which (stupidly) transferred the msr_mask in the
> migration stream and failed if it wasn't equal on each end.
>
> This works around the problem by masking out the new MSR bits in the
> compatibility code to send the msr_mask on old machine types.
>
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> target/ppc/machine.c | 10 +++++++++-
> 1 file changed, 9 insertions(+), 1 deletion(-)
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [Qemu-devel] [PATCH] target/ppc: Fix backwards migration of msr_mask
2018-03-20 2:23 [Qemu-devel] [PATCH] target/ppc: Fix backwards migration of msr_mask David Gibson
2018-03-20 8:08 ` Laurent Vivier
@ 2018-03-20 9:41 ` Greg Kurz
2018-03-20 12:17 ` Lukáš Doktor
2018-04-04 3:27 ` Simon Guo
3 siblings, 0 replies; 5+ messages in thread
From: Greg Kurz @ 2018-03-20 9:41 UTC (permalink / raw)
To: David Gibson; +Cc: lvivier, wei.guo.simon, ldoktor, qemu-ppc, qemu-devel
On Tue, 20 Mar 2018 13:23:19 +1100
David Gibson <david@gibson.dropbear.id.au> wrote:
> 21b786f "PowerPC: Add TS bits into msr_mask" added the transaction states
> to msr_mask for recent POWER CPUs to allow correct migration of machines
> that are in certain interim transactional memory states.
>
> This was correct, but unfortunately breaks backwards of pseries-2.7 and
> earlier machine types which (stupidly) transferred the msr_mask in the
> migration stream and failed if it wasn't equal on each end.
>
> This works around the problem by masking out the new MSR bits in the
> compatibility code to send the msr_mask on old machine types.
>
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> ---
Reviewed-by: Greg Kurz <groug@kaod.org>
and
Tested-by: Greg Kurz <groug@kaod.org>
> target/ppc/machine.c | 10 +++++++++-
> 1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/target/ppc/machine.c b/target/ppc/machine.c
> index e475206c6a..0634cdb295 100644
> --- a/target/ppc/machine.c
> +++ b/target/ppc/machine.c
> @@ -190,7 +190,15 @@ static int cpu_pre_save(void *opaque)
>
> /* Hacks for migration compatibility between 2.6, 2.7 & 2.8 */
> if (cpu->pre_2_8_migration) {
> - cpu->mig_msr_mask = env->msr_mask;
> + /* Mask out bits that got added to msr_mask since the versions
> + * which stupidly included it in the migration stream. */
> + target_ulong metamask = 0
> +#if defined(TARGET_PPC64)
> + | (1ULL << MSR_TS0)
> + | (1ULL << MSR_TS1)
> +#endif
> + ;
> + cpu->mig_msr_mask = env->msr_mask & ~metamask;
> cpu->mig_insns_flags = env->insns_flags & insns_compat_mask;
> cpu->mig_insns_flags2 = env->insns_flags2 & insns_compat_mask2;
> cpu->mig_nb_BATs = env->nb_BATs;
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [Qemu-devel] [PATCH] target/ppc: Fix backwards migration of msr_mask
2018-03-20 2:23 [Qemu-devel] [PATCH] target/ppc: Fix backwards migration of msr_mask David Gibson
2018-03-20 8:08 ` Laurent Vivier
2018-03-20 9:41 ` Greg Kurz
@ 2018-03-20 12:17 ` Lukáš Doktor
2018-04-04 3:27 ` Simon Guo
3 siblings, 0 replies; 5+ messages in thread
From: Lukáš Doktor @ 2018-03-20 12:17 UTC (permalink / raw)
To: David Gibson, groug, lvivier, wei.guo.simon; +Cc: qemu-ppc, qemu-devel
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Dne 20.3.2018 v 03:23 David Gibson napsal(a):
> 21b786f "PowerPC: Add TS bits into msr_mask" added the transaction states
> to msr_mask for recent POWER CPUs to allow correct migration of machines
> that are in certain interim transactional memory states.
>
> This was correct, but unfortunately breaks backwards of pseries-2.7 and
> earlier machine types which (stupidly) transferred the msr_mask in the
> migration stream and failed if it wasn't equal on each end.
>
> This works around the problem by masking out the new MSR bits in the
> compatibility code to send the msr_mask on old machine types.
>
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> ---
Thanks, migration to 2.6.2 works again.
Tested-by: Lukáš Doktor <ldoktor@redhat.com>
> target/ppc/machine.c | 10 +++++++++-
> 1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/target/ppc/machine.c b/target/ppc/machine.c
> index e475206c6a..0634cdb295 100644
> --- a/target/ppc/machine.c
> +++ b/target/ppc/machine.c
> @@ -190,7 +190,15 @@ static int cpu_pre_save(void *opaque)
>
> /* Hacks for migration compatibility between 2.6, 2.7 & 2.8 */
> if (cpu->pre_2_8_migration) {
> - cpu->mig_msr_mask = env->msr_mask;
> + /* Mask out bits that got added to msr_mask since the versions
> + * which stupidly included it in the migration stream. */
> + target_ulong metamask = 0
> +#if defined(TARGET_PPC64)
> + | (1ULL << MSR_TS0)
> + | (1ULL << MSR_TS1)
> +#endif
> + ;
> + cpu->mig_msr_mask = env->msr_mask & ~metamask;
> cpu->mig_insns_flags = env->insns_flags & insns_compat_mask;
> cpu->mig_insns_flags2 = env->insns_flags2 & insns_compat_mask2;
> cpu->mig_nb_BATs = env->nb_BATs;
>
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^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [Qemu-devel] [PATCH] target/ppc: Fix backwards migration of msr_mask
2018-03-20 2:23 [Qemu-devel] [PATCH] target/ppc: Fix backwards migration of msr_mask David Gibson
` (2 preceding siblings ...)
2018-03-20 12:17 ` Lukáš Doktor
@ 2018-04-04 3:27 ` Simon Guo
3 siblings, 0 replies; 5+ messages in thread
From: Simon Guo @ 2018-04-04 3:27 UTC (permalink / raw)
To: David Gibson; +Cc: groug, lvivier, ldoktor, qemu-ppc, qemu-devel
David,
On Tue, Mar 20, 2018 at 01:23:19PM +1100, David Gibson wrote:
> 21b786f "PowerPC: Add TS bits into msr_mask" added the transaction states
> to msr_mask for recent POWER CPUs to allow correct migration of machines
> that are in certain interim transactional memory states.
>
> This was correct, but unfortunately breaks backwards of pseries-2.7 and
> earlier machine types which (stupidly) transferred the msr_mask in the
> migration stream and failed if it wasn't equal on each end.
>
> This works around the problem by masking out the new MSR bits in the
> compatibility code to send the msr_mask on old machine types.
>
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Sorry I didn't consider the backward compatibility in previous
commit. Thanks for fix that.
Thanks,
- Simon
^ permalink raw reply [flat|nested] 5+ messages in thread