From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: alex.bennee@linaro.org, peter.maydell@linaro.org
Subject: [Qemu-devel] [PATCH for-2.12] fpu: Fix rounding mode for floatN_to_uintM_round_to_zero
Date: Tue, 10 Apr 2018 15:59:12 +1000 [thread overview]
Message-ID: <20180410055912.934-1-richard.henderson@linaro.org> (raw)
We incorrectly passed in the current rounding mode
instead of float_round_to_zero.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
Found while runnning SVE RISU tests; it should be visible with the
right set of inputs to AdvSIMD RISU tests.
r~
---
fpu/softfloat.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 6e16284e66..b46dccc63e 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -1486,8 +1486,8 @@ uint ## isz ## _t float ## fsz ## _to_uint ## isz ## _round_to_zero \
(float ## fsz a, float_status *s) \
{ \
FloatParts p = float ## fsz ## _unpack_canonical(a, s); \
- return round_to_uint_and_pack(p, s->float_rounding_mode, \
- UINT ## isz ## _MAX, s); \
+ return round_to_uint_and_pack(p, float_round_to_zero, \
+ UINT ## isz ## _MAX, s); \
}
FLOAT_TO_UINT(16, 16)
--
2.14.3
next reply other threads:[~2018-04-10 5:59 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-10 5:59 Richard Henderson [this message]
2018-04-10 7:40 ` [Qemu-devel] [PATCH for-2.12] fpu: Fix rounding mode for floatN_to_uintM_round_to_zero Peter Maydell
2018-04-10 10:16 ` Richard Henderson
2018-04-10 10:58 ` Peter Maydell
2018-04-10 13:05 ` Alex Bennée
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