From: Aaron Lindsay <alindsay@codeaurora.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm <qemu-arm@nongnu.org>,
Alistair Francis <alistair.francis@xilinx.com>,
Wei Huang <wei@redhat.com>,
Peter Crosthwaite <crosthwaite.peter@gmail.com>,
QEMU Developers <qemu-devel@nongnu.org>,
Michael Spradling <mspradli@codeaurora.org>,
Digant Desai <digantd@codeaurora.org>
Subject: Re: [Qemu-devel] [PATCH v3 09/22] target/arm: Add pre-EL change hooks
Date: Thu, 12 Apr 2018 13:01:39 -0400 [thread overview]
Message-ID: <20180412170139.GH24561@codeaurora.org> (raw)
In-Reply-To: <CAFEAcA9UpNW8q+vBKDskhAMVxHh4QUOJ5diP8AR6mpMRk+enBQ@mail.gmail.com>
On Apr 12 17:49, Peter Maydell wrote:
> On 16 March 2018 at 20:31, Aaron Lindsay <alindsay@codeaurora.org> wrote:
> > Because the design of the PMU requires that the counter values be
> > converted between their delta and guest-visible forms for mode
> > filtering, an additional hook which occurs before the EL is changed is
> > necessary.
> >
> > Signed-off-by: Aaron Lindsay <alindsay@codeaurora.org>
> > ---
> > target/arm/cpu.c | 13 +++++++++++++
> > target/arm/cpu.h | 12 ++++++++----
> > target/arm/helper.c | 14 ++++++++------
> > target/arm/internals.h | 7 +++++++
> > target/arm/op_helper.c | 8 ++++++++
> > 5 files changed, 44 insertions(+), 10 deletions(-)
> >
> > diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> > index 5f782bf..a2cb21e 100644
> > --- a/target/arm/cpu.c
> > +++ b/target/arm/cpu.c
> > @@ -55,6 +55,18 @@ static bool arm_cpu_has_work(CPUState *cs)
> > | CPU_INTERRUPT_EXITTB);
> > }
> >
> > +void arm_register_pre_el_change_hook(ARMCPU *cpu, ARMELChangeHookFn *hook,
> > + void *opaque)
> > +{
> > + ARMELChangeHook *entry;
> > + entry = g_malloc0(sizeof (*entry));
>
> g_new0().
>
> > +
> > + entry->hook = hook;
> > + entry->opaque = opaque;
> > +
> > + QLIST_INSERT_HEAD(&cpu->pre_el_change_hooks, entry, node);
> > +}
> > +
> > void arm_register_el_change_hook(ARMCPU *cpu, ARMELChangeHookFn *hook,
> > void *opaque)
> > {
> > @@ -747,6 +759,7 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
> > return;
> > }
> >
> > + QLIST_INIT(&cpu->pre_el_change_hooks);
> > QLIST_INIT(&cpu->el_change_hooks);
> >
> > /* Some features automatically imply others: */
> > diff --git a/target/arm/cpu.h b/target/arm/cpu.h
> > index 3b45d3d..b0ef727 100644
> > --- a/target/arm/cpu.h
> > +++ b/target/arm/cpu.h
> > @@ -832,6 +832,7 @@ struct ARMCPU {
> > */
> > bool cfgend;
> >
> > + QLIST_HEAD(, ARMELChangeHook) pre_el_change_hooks;
> > QLIST_HEAD(, ARMELChangeHook) el_change_hooks;
> >
> > int32_t node_id; /* NUMA node this CPU belongs to */
> > @@ -2895,12 +2896,15 @@ static inline AddressSpace *arm_addressspace(CPUState *cs, MemTxAttrs attrs)
> > #endif
> >
> > /**
> > + * arm_register_pre_el_change_hook:
> > * arm_register_el_change_hook:
> > - * Register a hook function which will be called back whenever this
> > - * CPU changes exception level or mode. The hook function will be
> > - * passed a pointer to the ARMCPU and the opaque data pointer passed
> > - * to this function when the hook was registered.
> > + * Register a hook function which will be called back before or after this CPU
> > + * changes exception level or mode. The hook function will be passed a pointer
> > + * to the ARMCPU and the opaque data pointer passed to this function when the
> > + * hook was registered.
> > */
>
> I would just have one doc comment for each function, rather than
> trying to share. (Some day we may actually autogenerate HTML docs
> from these comments...)
>
> Do we make the guarantee that if we call the pre-change hook
> then we will definitely subsequently call the post-change hook?
> (ie does the PMU hook rely on that?)
Yes, the PMU relies on the pre- and post- hooks being called in pairs
since they drive the state machine of sorts that exists in the variables
holding the counter values/deltas. And unless I've really screwed up the
implementation, I believe the change hooks in my patchset make that
guarantee.
-Aaron
>
> Otherwise looks OK.
>
> thanks
> -- PMM
--
Qualcomm Datacenter Technologies as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.
next prev parent reply other threads:[~2018-04-12 17:02 UTC|newest]
Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-16 20:30 [Qemu-devel] [PATCH v3 00/22] More fully implement ARM PMUv3 Aaron Lindsay
2018-03-16 20:30 ` [Qemu-devel] [PATCH v3 01/22] target/arm: A53: Initialize PMCEID[01] Aaron Lindsay
2018-03-18 22:35 ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé
2018-03-18 22:57 ` Philippe Mathieu-Daudé
2018-03-19 20:35 ` Aaron Lindsay
2018-03-20 1:03 ` Philippe Mathieu-Daudé
2018-03-21 15:17 ` Aaron Lindsay
2018-03-16 20:31 ` [Qemu-devel] [PATCH v3 02/22] target/arm: A15 PMCEID0 initialization style nit Aaron Lindsay
2018-04-12 16:07 ` Peter Maydell
2018-03-16 20:31 ` [Qemu-devel] [PATCH v3 03/22] target/arm: Check PMCNTEN for whether PMCCNTR is enabled Aaron Lindsay
2018-03-16 20:31 ` [Qemu-devel] [PATCH v3 04/22] target/arm: Treat PMCCNTR as alias of PMCCNTR_EL0 Aaron Lindsay
2018-04-12 16:10 ` Peter Maydell
2018-04-12 16:56 ` Aaron Lindsay
2018-03-16 20:31 ` [Qemu-devel] [PATCH v3 05/22] target/arm: Reorganize PMCCNTR read, write, sync Aaron Lindsay
2018-04-12 16:18 ` Peter Maydell
2018-04-13 13:51 ` Aaron Lindsay
2018-03-16 20:31 ` [Qemu-devel] [PATCH v3 06/22] target/arm: Mask PMU register writes based on PMCR_EL0.N Aaron Lindsay
2018-04-12 16:24 ` Peter Maydell
2018-03-16 20:31 ` [Qemu-devel] [PATCH v3 07/22] target/arm: Fetch GICv3 state directly from CPUARMState Aaron Lindsay
2018-04-12 16:28 ` Peter Maydell
2018-03-16 20:31 ` [Qemu-devel] [PATCH v3 08/22] target/arm: Support multiple EL change hooks Aaron Lindsay
2018-03-18 22:41 ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé
2018-03-20 20:45 ` Aaron Lindsay
2018-03-20 21:01 ` Philippe Mathieu-Daudé
2018-04-12 16:36 ` [Qemu-devel] " Peter Maydell
2018-03-16 20:31 ` [Qemu-devel] [PATCH v3 09/22] target/arm: Add pre-EL " Aaron Lindsay
2018-04-12 16:49 ` Peter Maydell
2018-04-12 17:01 ` Aaron Lindsay [this message]
2018-04-12 17:21 ` Peter Maydell
2018-03-16 20:31 ` [Qemu-devel] [PATCH v3 10/22] target/arm: Allow EL change hooks to do IO Aaron Lindsay
2018-04-12 16:53 ` Peter Maydell
2018-04-12 17:08 ` Aaron Lindsay
2018-04-12 17:21 ` Peter Maydell
2018-03-16 20:31 ` [Qemu-devel] [PATCH v3 11/22] target/arm: Fix bitmask for PMCCFILTR writes Aaron Lindsay
2018-04-12 16:41 ` Peter Maydell
2018-04-13 18:15 ` Aaron Lindsay
2018-03-16 20:31 ` [Qemu-devel] [PATCH v3 12/22] target/arm: Filter cycle counter based on PMCCFILTR_EL0 Aaron Lindsay
2018-04-12 17:15 ` Peter Maydell
2018-04-12 17:36 ` Aaron Lindsay
2018-04-17 15:21 ` Aaron Lindsay
2018-04-17 15:37 ` Peter Maydell
2018-04-17 20:03 ` Aaron Lindsay
2018-03-16 20:31 ` [Qemu-devel] [PATCH v3 13/22] target/arm: Allow AArch32 access for PMCCFILTR Aaron Lindsay
2018-03-16 20:31 ` [Qemu-devel] [PATCH v3 14/22] target/arm: Make PMOVSCLR 64 bits wide Aaron Lindsay
2018-03-18 23:14 ` Philippe Mathieu-Daudé
2018-03-19 15:24 ` Aaron Lindsay
2018-03-19 15:31 ` Peter Maydell
2018-03-20 1:01 ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé
2018-03-16 20:31 ` [Qemu-devel] [PATCH v3 15/22] target/arm: Add ARM_FEATURE_V7VE for v7 Virtualization Extensions Aaron Lindsay
2018-03-18 22:42 ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé
2018-04-12 17:17 ` [Qemu-devel] " Peter Maydell
2018-04-17 14:23 ` Aaron Lindsay
2018-04-17 15:00 ` Peter Maydell
2018-04-24 20:35 ` Aaron Lindsay
2018-05-17 19:31 ` Aaron Lindsay
2018-05-31 14:18 ` Peter Maydell
2018-05-31 20:39 ` Aaron Lindsay
2018-06-01 8:57 ` Peter Maydell
2018-06-01 15:34 ` Aaron Lindsay
2018-06-01 15:59 ` Peter Maydell
2018-06-01 19:12 ` Aaron Lindsay
2018-03-16 20:31 ` [Qemu-devel] [PATCH v3 16/22] target/arm: Implement PMOVSSET Aaron Lindsay
2018-04-12 17:28 ` Peter Maydell
2018-03-16 20:31 ` [Qemu-devel] [PATCH v3 17/22] target/arm: Split arm_ccnt_enabled into generic pmu_counter_enabled Aaron Lindsay
2018-04-12 17:29 ` Peter Maydell
2018-03-16 20:31 ` [Qemu-devel] [PATCH v3 18/22] target/arm: Add array for supported PMU events, generate PMCEID[01] Aaron Lindsay
2018-03-16 20:31 ` [Qemu-devel] [PATCH v3 19/22] target/arm: Finish implementation of PM[X]EVCNTR and PM[X]EVTYPER Aaron Lindsay
2018-03-16 20:31 ` [Qemu-devel] [PATCH v3 20/22] target/arm: PMU: Add instruction and cycle events Aaron Lindsay
2018-03-18 22:43 ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé
2018-03-18 22:48 ` Philippe Mathieu-Daudé
2018-03-19 17:36 ` Aaron Lindsay
2018-03-16 20:31 ` [Qemu-devel] [PATCH v3 21/22] target/arm: PMU: Set PMCR.N to 4 Aaron Lindsay
2018-03-16 20:31 ` [Qemu-devel] [PATCH v3 22/22] target/arm: Implement PMSWINC Aaron Lindsay
2018-03-16 20:58 ` [Qemu-devel] [PATCH v3 00/22] More fully implement ARM PMUv3 no-reply
2018-03-17 0:01 ` Aaron Lindsay
2018-04-12 17:17 ` [Qemu-devel] [PATCH v3] RFC: target/arm: Send interrupts on PMU counter overflow Aaron Lindsay
2018-04-12 17:32 ` [Qemu-devel] [PATCH v3 00/22] More fully implement ARM PMUv3 Peter Maydell
2018-04-12 19:34 ` Aaron Lindsay
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20180412170139.GH24561@codeaurora.org \
--to=alindsay@codeaurora.org \
--cc=alistair.francis@xilinx.com \
--cc=crosthwaite.peter@gmail.com \
--cc=digantd@codeaurora.org \
--cc=mspradli@codeaurora.org \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=wei@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).