[Qemu-devel] [PATCH 1/2] fpu: Check for inf/x before x/0

[Richard Henderson <richard.henderson@linaro.org>]

The re-factoring of div_floats changed the order of checking meaning
an operation like -inf/0 erroneously raises the divbyzero flag.
IEEE-754 (2008) specifies this should only occur for operations
on finite operands.

We fix this by moving the check on the dividend being Inf/0 to
before the divisor is zero check.

Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Cc: Alex Bennée <alex.bennee@linaro.org>
Cc: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 fpu/softfloat.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index fb8663f59e..ba6e654050 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -1146,15 +1146,20 @@ static FloatParts div_floats(FloatParts a, FloatParts b, float_status *s)
         a.cls = float_class_dnan;
         return a;
     }
-    /* Div 0 => Inf */
+    /* Inf / x */
+    if (a.cls == float_class_inf) {
+        a.sign = sign;
+        return a;
+    }
+    /* x / 0 => Inf */
     if (b.cls == float_class_zero) {
         s->float_exception_flags |= float_flag_divbyzero;
         a.cls = float_class_inf;
         a.sign = sign;
         return a;
     }
-    /* Inf / x or 0 / x */
-    if (a.cls == float_class_inf || a.cls == float_class_zero) {
+    /* 0 / x */
+    if (a.cls == float_class_zero) {
         a.sign = sign;
         return a;
     }
-- 
2.14.3