qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Greg Kurz <groug@kaod.org>
To: David Gibson <david@gibson.dropbear.id.au>
Cc: benh@kernel.crashing.org, qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH for-2.13 06/10] target/ppc: Add ppc_store_lpcr() helper
Date: Fri, 20 Apr 2018 17:46:07 +0200	[thread overview]
Message-ID: <20180420174607.412a9abf@bahia.lan> (raw)
In-Reply-To: <20180417071722.9399-7-david@gibson.dropbear.id.au>

On Tue, 17 Apr 2018 17:17:18 +1000
David Gibson <david@gibson.dropbear.id.au> wrote:

> There are some fields in the cpu state which need to be updated when the
> LPCR register is changed, which is done by ppc_hash64_update_rmls() and
> ppc_hash64_update_vrma().  Code which alters env->spr[SPR_LPCR] needs to
> call them afterwards to make sure the state is up to date.
> 
> That's easy to get wrong.  The normal way of dealing with sitautions like

                                                    s/sitautions/situations/

> that is to use a helper which both updates the basic register value and the
> derived state.
> 
> So, do that.
> 
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> ---

Reviewed-by: Greg Kurz <groug@kaod.org>

>  hw/ppc/spapr_cpu_core.c |  6 +-----
>  target/ppc/mmu-hash64.c | 15 +++++++++++----
>  target/ppc/mmu-hash64.h |  3 +--
>  3 files changed, 13 insertions(+), 11 deletions(-)
> 
> diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
> index 9080664ec1..b1c3cf11f0 100644
> --- a/hw/ppc/spapr_cpu_core.c
> +++ b/hw/ppc/spapr_cpu_core.c
> @@ -74,14 +74,10 @@ static void spapr_cpu_reset(void *opaque)
>          lpcr &= ~pcc->lpcr_pm;
>      }
>  
> -    env->spr[SPR_LPCR] = lpcr;
> +    ppc_store_lpcr(cpu, lpcr);
>  
>      /* Set a full AMOR so guest can use the AMR as it sees fit */
>      env->spr[SPR_AMOR] = 0xffffffffffffffffull;
> -
> -    /* Update some env bits based on new LPCR value */
> -    ppc_hash64_update_rmls(cpu);
> -    ppc_hash64_update_vrma(cpu);
>  }
>  
>  static void spapr_cpu_destroy(PowerPCCPU *cpu)
> diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c
> index 7e0adecfd9..a1db20e3a8 100644
> --- a/target/ppc/mmu-hash64.c
> +++ b/target/ppc/mmu-hash64.c
> @@ -942,7 +942,7 @@ void ppc_hash64_tlb_flush_hpte(PowerPCCPU *cpu, target_ulong ptex,
>      cpu->env.tlb_need_flush = TLB_NEED_GLOBAL_FLUSH | TLB_NEED_LOCAL_FLUSH;
>  }
>  
> -void ppc_hash64_update_rmls(PowerPCCPU *cpu)
> +static void ppc_hash64_update_rmls(PowerPCCPU *cpu)
>  {
>      CPUPPCState *env = &cpu->env;
>      uint64_t lpcr = env->spr[SPR_LPCR];
> @@ -977,7 +977,7 @@ void ppc_hash64_update_rmls(PowerPCCPU *cpu)
>      }
>  }
>  
> -void ppc_hash64_update_vrma(PowerPCCPU *cpu)
> +static void ppc_hash64_update_vrma(PowerPCCPU *cpu)
>  {
>      CPUPPCState *env = &cpu->env;
>      const PPCHash64SegmentPageSizes *sps = NULL;
> @@ -1028,9 +1028,9 @@ void ppc_hash64_update_vrma(PowerPCCPU *cpu)
>      slb->sps = sps;
>  }
>  
> -void helper_store_lpcr(CPUPPCState *env, target_ulong val)
> +void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val)
>  {
> -    PowerPCCPU *cpu = ppc_env_get_cpu(env);
> +    CPUPPCState *env = &cpu->env;
>      uint64_t lpcr = 0;
>  
>      /* Filter out bits */
> @@ -1096,6 +1096,13 @@ void helper_store_lpcr(CPUPPCState *env, target_ulong val)
>      ppc_hash64_update_vrma(cpu);
>  }
>  
> +void helper_store_lpcr(CPUPPCState *env, target_ulong val)
> +{
> +    PowerPCCPU *cpu = ppc_env_get_cpu(env);
> +
> +    ppc_store_lpcr(cpu, val);
> +}
> +
>  void ppc_hash64_init(PowerPCCPU *cpu)
>  {
>      CPUPPCState *env = &cpu->env;
> diff --git a/target/ppc/mmu-hash64.h b/target/ppc/mmu-hash64.h
> index d5fc03441d..f23b78d787 100644
> --- a/target/ppc/mmu-hash64.h
> +++ b/target/ppc/mmu-hash64.h
> @@ -17,8 +17,7 @@ void ppc_hash64_tlb_flush_hpte(PowerPCCPU *cpu,
>                                 target_ulong pte0, target_ulong pte1);
>  unsigned ppc_hash64_hpte_page_shift_noslb(PowerPCCPU *cpu,
>                                            uint64_t pte0, uint64_t pte1);
> -void ppc_hash64_update_vrma(PowerPCCPU *cpu);
> -void ppc_hash64_update_rmls(PowerPCCPU *cpu);
> +void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val);
>  void ppc_hash64_init(PowerPCCPU *cpu);
>  void ppc_hash64_finalize(PowerPCCPU *cpu);
>  #endif

  reply	other threads:[~2018-04-20 15:46 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-17  7:17 [Qemu-devel] [PATCH for-2.13 00/10] spapr: Cleanups to PAPR mode setup David Gibson
2018-04-17  7:17 ` [Qemu-devel] [PATCH for-2.13 01/10] spapr: Avoid redundant calls to spapr_cpu_reset() David Gibson
2018-04-19 13:48   ` Greg Kurz
2018-04-20  6:34     ` David Gibson
2018-04-20  9:15       ` Greg Kurz
2018-04-20 15:39         ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
2018-06-18  3:42           ` David Gibson
2018-06-18  9:01             ` Greg Kurz
2018-04-17  7:17 ` [Qemu-devel] [PATCH for-2.13 02/10] spapr: Remove support for PowerPC 970 with pseries machine type David Gibson
2018-04-19 17:21   ` Greg Kurz
2018-04-20  5:58     ` [Qemu-devel] [Qemu-ppc] " Thomas Huth
2018-04-20  6:40     ` [Qemu-devel] " David Gibson
2018-04-20  6:48       ` [Qemu-devel] [Qemu-ppc] " luigi burdo
2018-04-20  7:15         ` David Gibson
2018-04-20 12:25   ` [Qemu-devel] " Greg Kurz
2018-05-03  6:23     ` David Gibson
2018-04-17  7:17 ` [Qemu-devel] [PATCH for-2.13 03/10] target/ppc: Remove unnecessary initialization of LPCR_UPRT David Gibson
2018-04-20 11:34   ` Greg Kurz
2018-04-20 12:57     ` David Gibson
2018-04-25  9:52   ` [Qemu-devel] [Qemu-ppc] " Cédric Le Goater
2018-04-26  6:46     ` David Gibson
2018-04-26  7:20       ` Cédric Le Goater
2018-05-01  6:39         ` David Gibson
2018-05-01 15:59           ` Cédric Le Goater
2018-04-17  7:17 ` [Qemu-devel] [PATCH for-2.13 04/10] spapr: Set compatibility mode before the rest of spapr_cpu_reset() David Gibson
2018-04-20  9:16   ` Greg Kurz
2018-04-20 10:48     ` David Gibson
2018-04-17  7:17 ` [Qemu-devel] [PATCH for-2.13 05/10] spapr: Move PAPR mode register initialization to spapr code David Gibson
2018-04-20 15:42   ` Greg Kurz
2018-04-17  7:17 ` [Qemu-devel] [PATCH for-2.13 06/10] target/ppc: Add ppc_store_lpcr() helper David Gibson
2018-04-20 15:46   ` Greg Kurz [this message]
2018-04-17  7:17 ` [Qemu-devel] [PATCH for-2.13 07/10] spapr: Make a helper to set up cpu entry point state David Gibson
2018-04-20 15:48   ` Greg Kurz
2018-04-17  7:17 ` [Qemu-devel] [PATCH for-2.13 08/10] spapr: Clean up handling of LPCR power-saving exit bits David Gibson
2018-04-20 15:56   ` Greg Kurz
2018-04-17  7:17 ` [Qemu-devel] [PATCH for-2.13 09/10] target/ppc: Don't bother with MSR_EP in cpu_ppc_set_papr() David Gibson
2018-04-20  6:08   ` [Qemu-devel] [Qemu-ppc] " Thomas Huth
2018-04-20  6:21     ` David Gibson
2018-04-17  7:17 ` [Qemu-devel] [PATCH for-2.13 10/10] spapr: Move PAPR specific cpu logic to pseries machine type David Gibson
2018-04-20 15:58   ` Greg Kurz

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180420174607.412a9abf@bahia.lan \
    --to=groug@kaod.org \
    --cc=benh@kernel.crashing.org \
    --cc=david@gibson.dropbear.id.au \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).