From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55372) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fB99N-0003yd-K4 for qemu-devel@nongnu.org; Tue, 24 Apr 2018 21:23:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fB99I-00073O-Lt for qemu-devel@nongnu.org; Tue, 24 Apr 2018 21:23:13 -0400 Received: from mail-pf0-x233.google.com ([2607:f8b0:400e:c00::233]:42584) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fB99I-00072d-FA for qemu-devel@nongnu.org; Tue, 24 Apr 2018 21:23:08 -0400 Received: by mail-pf0-x233.google.com with SMTP id o16so13743726pfk.9 for ; Tue, 24 Apr 2018 18:23:08 -0700 (PDT) From: Richard Henderson Date: Tue, 24 Apr 2018 15:22:51 -1000 Message-Id: <20180425012300.14698-1-richard.henderson@linaro.org> Subject: [Qemu-devel] [PATCH 0/9] target/arm: Fixups for ARM_FEATURE_V8_FP16 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, alex.bennee@linaro.org When running the gcc testsuite with current aarch64-linux-user, the testsuite detects the presence of the fp16 extension and enables lots of extra tests for builtins. Quite a few of these new tests fail because we missed implementing some instructions. We really should go back and verify that nothing else is missing from this (rather large) extension. In addition, it tests some edge conditions on data that show flaws in the way we were performing integer<->fp conversion; particularly with respect to scaled conversion. r~ PS: FWIW, this was written against my tgt-arm-sve-9 tree, since I was trying to test sve as generated by gcc. I don't *think* there are any dependencies on any of the sve patches, but I didn't check. PPS: There are two more failures that might be qemu fp16 failures, but those are SIGSEGV. This patch set cures all of the SIGILL and (subsequent) SIGABRT type failures within the testsuite. Richard Henderson (9): target/arm: Implement vector shifted SCVF/UCVF for fp16 target/arm: Implement vector shifted FCVT for fp16 target/arm: Fix float16 to/from int16 target/arm: Clear SVE high bits for FMOV target/arm: Implement FMOV (general) for fp16 target/arm: Implement FCVT (scalar,integer) for fp16 target/arm: Implement FCVT (scalar,fixed-point) for fp16 target/arm: Implement FP data-processing (2 source) for fp16 target/arm: Implement FP data-processing (3 source) for fp16 target/arm/helper.h | 6 + target/arm/helper.c | 87 ++++++++++- target/arm/translate-a64.c | 371 +++++++++++++++++++++++++++++++++++++-------- 3 files changed, 399 insertions(+), 65 deletions(-) -- 2.14.3