From: Alex Williamson <alex.williamson@redhat.com>
To: Jintack Lim <jintack@cs.columbia.edu>
Cc: iommu@lists.linux-foundation.org,
QEMU Devel Mailing List <qemu-devel@nongnu.org>,
KVM General <kvm@vger.kernel.org>
Subject: Re: [Qemu-devel] How to check if Vt-d is capable of posted-interrupt?
Date: Mon, 30 Apr 2018 12:09:41 -0600 [thread overview]
Message-ID: <20180430120941.741f31cb@w520.home> (raw)
In-Reply-To: <CAHyh4xjzi5CK8+OJPpnr+F2ABpy5Jbbo1S4YR5ATi62LMRn+Pw@mail.gmail.com>
On Mon, 30 Apr 2018 13:44:23 -0400
Jintack Lim <jintack@cs.columbia.edu> wrote:
> Add iommu mailing list since this question might be more related to iommu.
>
> On Mon, Apr 30, 2018 at 10:11 AM, Jintack Lim <jintack@cs.columbia.edu> wrote:
> > Hi,
> >
> > I wonder how to check if Vt-d is capable of posted-interrupt? I'm
> > using Intel E5-2630 v3.
> >
> > I was once told that APICv and posted-interrupt capability always come
> > together. But it seems like my cpu support APICv
> > (/sys/module/kvm_intel/parameters/enable_apicv is Y), but
> > posted-interrupt capability is only shipped with the next generation
> > of the cpu (E5-2600 v4, which is Broadwell).
> >
> > What would be an easy way to check this?
PI support is bit 59 in the capability register which is exposed
through sysfs at /sys/class/iommu/dmar*/intel-iommu/cap so you could do
something like:
# for i in $(find /sys/class/iommu/dmar* -type l); do echo -n "$i: "; echo $(( ( 0x$(cat $i/intel-iommu/cap) >> 59 ) & 1 )); done
I think the relationship between APICv and PI goes the other direction,
if you have PI, you probably have APICv. Having APICv implies nothing
about having PI. Thanks,
Alex
next prev parent reply other threads:[~2018-04-30 18:09 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-30 14:11 [Qemu-devel] How to check if Vt-d is capable of posted-interrupt? Jintack Lim
2018-04-30 17:44 ` Jintack Lim
2018-04-30 18:09 ` Alex Williamson [this message]
2018-04-30 18:13 ` Jintack Lim
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