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From: David Gibson <david@gibson.dropbear.id.au>
To: groug@kaod.org, clg@kaod.org
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, lvivier@redhat.com,
	David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PATCH 8/8] spapr: Clean up handling of LPCR power-saving exit bits
Date: Thu,  3 May 2018 16:21:45 +1000	[thread overview]
Message-ID: <20180503062145.17899-9-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20180503062145.17899-1-david@gibson.dropbear.id.au>

To prevent spurious wakeups on cpus that are supposed to be disabled, we
need to clear the LPCR bits which control certain wakeup events.
spapr_cpu_reset() has separate cases here for boot and non-boot (initially
inactive) cpus.  rtas_start_cpu() then turns the LPCR bits on when the
non-boot cpus are activated.

But explicit checks against first_cpu are not how we usually do things:
instead spapr_cpu_reset() generally sets things up for non-boot (inactive)
cpus, then spapr_machine_reset() and/or rtas_start_cpu() override as
necessary.

So, do that instead.  Because the LPCR activation is identical for boot
cpus and non-boot cpus just activated with rtas_start_cpu() we can put the
code common in spapr_cpu_set_entry_state().

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 hw/ppc/spapr_cpu_core.c | 22 +++++++---------------
 hw/ppc/spapr_rtas.c     |  2 +-
 2 files changed, 8 insertions(+), 16 deletions(-)

diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index a52ddade5e..f3e9b879b2 100644
--- a/hw/ppc/spapr_cpu_core.c
+++ b/hw/ppc/spapr_cpu_core.c
@@ -54,28 +54,17 @@ static void spapr_cpu_reset(void *opaque)
      * Clearing VPM0 will also cause us to use RMOR in mmu-hash64.c for
      * real mode accesses, which thankfully defaults to 0 and isn't
      * accessible in guest mode.
+     *
+     * Disable Power-saving mode Exit Cause exceptions for the CPU, so
+     * we don't get spurious wakups before an RTAS start-cpu call.
      */
-    lpcr &= ~(LPCR_VPM0 | LPCR_VPM1 | LPCR_ISL | LPCR_KBV);
+    lpcr &= ~(LPCR_VPM0 | LPCR_VPM1 | LPCR_ISL | LPCR_KBV | pcc->lpcr_pm);
     lpcr |= LPCR_LPES0 | LPCR_LPES1;
 
     /* Set RMLS to the max (ie, 16G) */
     lpcr &= ~LPCR_RMLS;
     lpcr |= 1ull << LPCR_RMLS_SHIFT;
 
-    /* Only enable Power-saving mode Exit Cause exceptions on the boot
-     * CPU. The RTAS command start-cpu will enable them on secondaries.
-     */
-    if (cs == first_cpu) {
-        lpcr |= pcc->lpcr_pm;
-    }
-
-    /* Disable Power-saving mode Exit Cause exceptions for the CPU.
-     * This can cause issues when rebooting the guest if a secondary
-     * is awaken */
-    if (cs != first_cpu) {
-        lpcr &= ~pcc->lpcr_pm;
-    }
-
     ppc_store_lpcr(cpu, lpcr);
 
     /* Set a full AMOR so guest can use the AMR as it sees fit */
@@ -84,11 +73,14 @@ static void spapr_cpu_reset(void *opaque)
 
 void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip, target_ulong r3)
 {
+    PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
     CPUPPCState *env = &cpu->env;
 
     env->nip = nip;
     env->gpr[3] = r3;
     CPU(cpu)->halted = 0;
+    /* Enable Power-saving mode Exit Cause exceptions */
+    ppc_store_lpcr(cpu, env->spr[SPR_LPCR] | pcc->lpcr_pm);
 }
 
 static void spapr_cpu_destroy(PowerPCCPU *cpu)
diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
index 652233bdf1..7f9738daed 100644
--- a/hw/ppc/spapr_rtas.c
+++ b/hw/ppc/spapr_rtas.c
@@ -162,7 +162,7 @@ static void rtas_start_cpu(PowerPCCPU *callcpu, sPAPRMachineState *spapr,
     env->msr = (1ULL << MSR_SF) | (1ULL << MSR_ME);
 
     /* Enable Power-saving mode Exit Cause exceptions for the new CPU */
-    lpcr = env->spr[SPR_LPCR] | pcc->lpcr_pm;
+    lpcr = env->spr[SPR_LPCR];
     if (!pcc->interrupts_big_endian(callcpu)) {
         lpcr |= LPCR_ILE;
     }
-- 
2.17.0

  parent reply	other threads:[~2018-05-03  6:21 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-03  6:21 [Qemu-devel] [PATCH 0/8] spapr: Cleanups to startup and LPCR handling David Gibson
2018-05-03  6:21 ` [Qemu-devel] [PATCH 1/8] target/ppc: Add ppc_store_lpcr() helper David Gibson
2018-05-03  7:06   ` Cédric Le Goater
2018-05-03  7:16     ` David Gibson
2018-05-03 12:41   ` Greg Kurz
2018-05-03  6:21 ` [Qemu-devel] [PATCH 2/8] spapr: Clean up rtas_start_cpu() & rtas_stop_self() David Gibson
2018-05-03  7:11   ` Cédric Le Goater
2018-05-03 15:13   ` Greg Kurz
2018-05-04  5:01     ` David Gibson
2018-05-03  6:21 ` [Qemu-devel] [PATCH 3/8] spapr: Remove unhelpful helpers from rtas_start_cpu() David Gibson
2018-05-03  7:18   ` Cédric Le Goater
2018-05-03 16:34   ` Greg Kurz
2018-05-04  5:00     ` David Gibson
2018-05-04  6:43       ` Greg Kurz
2018-05-03  6:21 ` [Qemu-devel] [PATCH 4/8] spapr: Make a helper to set up cpu entry point state David Gibson
2018-05-03 16:36   ` Greg Kurz
2018-05-03  6:21 ` [Qemu-devel] [PATCH 5/8] spapr: Clean up LPCR updates from hypercalls David Gibson
2018-05-03  7:24   ` Cédric Le Goater
2018-05-03  6:21 ` [Qemu-devel] [PATCH 6/8] target/ppc: Delay initialization of LPCR_UPRT for secondary cpus David Gibson
2018-05-03  7:27   ` Cédric Le Goater
2018-05-03  6:21 ` [Qemu-devel] [PATCH 7/8] spapr: Move PAPR mode cpu setup fully to spapr code David Gibson
2018-05-03  7:30   ` Cédric Le Goater
2018-05-03  6:21 ` David Gibson [this message]
2018-05-03  7:47   ` [Qemu-devel] [PATCH 8/8] spapr: Clean up handling of LPCR power-saving exit bits Cédric Le Goater
2018-05-03 11:59     ` David Gibson
2018-05-03 14:32       ` Cédric Le Goater

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