[Qemu-devel] [PATCH] Allow PIR read in privileged mode

[Qemu-devel] [PATCH] Allow PIR read in privileged mode

[Leandro]

According to PowerISA, the PIR register should be readable in privileged
mode also, not only in hypervisor privileged mode.

The following patch fixes this:

--- qemu-2.12.0-original/target/ppc/translate_init.c    2018-04-24
13:30:47.000000000 -0300
+++ qemu-2.12.0/target/ppc/translate_init.c     2018-04-25
16:40:04.248844415 -0300
@@ -7811,7 +7811,7 @@
     /* Processor identification */
     spr_register_hv(env, SPR_PIR, "PIR",
                  SPR_NOACCESS, SPR_NOACCESS,
-                 SPR_NOACCESS, SPR_NOACCESS,
+                 &spr_read_generic, SPR_NOACCESS,
                  &spr_read_generic, NULL,
                  0x00000000);
     spr_register_hv(env, SPR_HID0, "HID0",

Re: [Qemu-devel] [PATCH] Allow PIR read in privileged mode

[joserz]

> According to PowerISA, the PIR register should be readable in privileged mode also, not only in hypervisor privileged mode.

The code makes sense but it doesn't seem created by git format-patch. If
so, could you please follow the instructions from
https://wiki.qemu.org/Contribute/SubmitAPatch and resend it? (note you
need to cc the maintainers)

In the next version you can include my review.

Reviewed-by: Jose Ricardo Ziviani <joserz@linux.ibm.com>

Thanks

[Qemu-devel] [PATCH] Allow PIR read in privileged mode

[luporl]

According to PowerISA, the PIR register should be readable in privileged
mode also, not only in hypervisor privileged mode.

Cc: David Gibson <david@gibson.dropbear.id.au>
Cc: Alexander Graf <agraf@suse.de>
Cc: qemu-ppc@nongnu.org
Signed-off-by: Leandro Lupori <leandro.lupori@gmail.com>
Reviewed-by: Jose Ricardo Ziviani <joserz@linux.ibm.com>
---
 target/ppc/translate_init.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
index a72be6d121..7b56e3ffb9 100644
--- a/target/ppc/translate_init.c
+++ b/target/ppc/translate_init.c
@@ -7816,7 +7816,7 @@ static void gen_spr_book3s_ids(CPUPPCState *env)
     /* Processor identification */
     spr_register_hv(env, SPR_PIR, "PIR",
                  SPR_NOACCESS, SPR_NOACCESS,
-                 SPR_NOACCESS, SPR_NOACCESS,
+                 &spr_read_generic, SPR_NOACCESS,
                  &spr_read_generic, NULL,
                  0x00000000);
     spr_register_hv(env, SPR_HID0, "HID0",
-- 
2.11.0