From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: Michael Clark <mjc@sifive.com>,
Palmer Dabbelt <palmer@sifive.com>,
Sagar Karandikar <sagark@eecs.berkeley.edu>,
Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Subject: [Qemu-devel] [PATCH 5/9] target/riscv: Honor CPU_DUMP_FPU
Date: Thu, 10 May 2018 20:52:36 -0700 [thread overview]
Message-ID: <20180511035240.4016-6-richard.henderson@linaro.org> (raw)
In-Reply-To: <20180511035240.4016-1-richard.henderson@linaro.org>
Cc: Michael Clark <mjc@sifive.com>
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/riscv/cpu.c | 16 +++++++++++-----
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 4e5a56d4e3..4612f324c9 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -199,6 +199,10 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f,
int i;
cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "pc ", env->pc);
+ if (flags & CPU_DUMP_FPU) {
+ cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "fcsr ",
+ cpu_riscv_get_fcsr(env));
+ }
#ifndef CONFIG_USER_ONLY
cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mhartid ", env->mhartid);
cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mstatus ", env->mstatus);
@@ -219,11 +223,13 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f,
cpu_fprintf(f, "\n");
}
}
- for (i = 0; i < 32; i++) {
- cpu_fprintf(f, " %s %016" PRIx64,
- riscv_fpr_regnames[i], env->fpr[i]);
- if ((i & 3) == 3) {
- cpu_fprintf(f, "\n");
+ if (flags & CPU_DUMP_FPU) {
+ for (i = 0; i < 32; i++) {
+ cpu_fprintf(f, " %s %016" PRIx64,
+ riscv_fpr_regnames[i], env->fpr[i]);
+ if ((i & 3) == 3) {
+ cpu_fprintf(f, "\n");
+ }
}
}
}
--
2.17.0
next prev parent reply other threads:[~2018-05-11 3:52 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-11 3:52 [Qemu-devel] [PATCH 0/9] Honor CPU_DUMP_FPU Richard Henderson
2018-05-11 3:52 ` [Qemu-devel] [PATCH 1/9] target/alpha: " Richard Henderson
2018-05-13 0:48 ` Philippe Mathieu-Daudé
2018-05-11 3:52 ` [Qemu-devel] [PATCH 2/9] target/mips: " Richard Henderson
2018-05-13 0:49 ` Philippe Mathieu-Daudé
2018-05-11 3:52 ` [Qemu-devel] [PATCH 3/9] target/ppc: " Richard Henderson
2018-05-13 0:50 ` Philippe Mathieu-Daudé
2018-05-11 3:52 ` [Qemu-devel] [PATCH 4/9] target/riscv: Introduce cpu_riscv_get_fcsr Richard Henderson
2018-05-13 0:51 ` Philippe Mathieu-Daudé
2018-05-18 2:46 ` Michael Clark
2018-05-18 3:35 ` Richard Henderson
2018-05-11 3:52 ` Richard Henderson [this message]
2018-05-13 0:52 ` [Qemu-devel] [PATCH 5/9] target/riscv: Honor CPU_DUMP_FPU Philippe Mathieu-Daudé
2018-05-18 2:16 ` Michael Clark
2018-05-11 3:52 ` [Qemu-devel] [PATCH 6/9] target/s390x: " Richard Henderson
2018-05-11 6:57 ` David Hildenbrand
2018-05-11 3:52 ` [Qemu-devel] [PATCH 7/9] target/sparc: " Richard Henderson
2018-05-13 0:54 ` Philippe Mathieu-Daudé
2018-05-11 3:52 ` [Qemu-devel] [PATCH 8/9] target/unicore32: " Richard Henderson
2018-05-13 0:54 ` Philippe Mathieu-Daudé
2018-05-11 3:52 ` [Qemu-devel] [PATCH 9/9] target/xtensa: " Richard Henderson
2018-05-11 4:46 ` Max Filippov
2018-05-13 0:55 ` Philippe Mathieu-Daudé
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