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From: Eduardo Habkost <ehabkost@redhat.com>
To: Babu Moger <babu.moger@amd.com>
Cc: mst@redhat.com, marcel.apfelbaum@gmail.com, pbonzini@redhat.com,
	rth@twiddle.net, mtosatti@redhat.com, qemu-devel@nongnu.org,
	kvm@vger.kernel.org, geoff@hostfission.com, kash@tripleback.net
Subject: Re: [Qemu-devel] [PATCH v8 3/8] i386: Add new property to control cache info
Date: Fri, 11 May 2018 16:21:45 -0300	[thread overview]
Message-ID: <20180511192145.GV25013@localhost.localdomain> (raw)
In-Reply-To: <20180510204148.11687-4-babu.moger@amd.com>

On Thu, May 10, 2018 at 03:41:43PM -0500, Babu Moger wrote:
> The property legacy-cache will be used to control the cache information.
> If user passes "-cpu legacy-cache" then older information will
> be displayed even if the hardware supports new information. Otherwise
> use the statically loaded cache definitions if available.
> 
> Signed-off-by: Babu Moger <babu.moger@amd.com>
> Tested-by: Geoffrey McRae <geoff@hostfission.com>
> ---
>  include/hw/i386/pc.h |  8 ++++
>  target/i386/cpu.c    | 97 ++++++++++++++++++++++++++++++++------------
>  target/i386/cpu.h    |  5 +++
>  3 files changed, 84 insertions(+), 26 deletions(-)
> 
> diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
> index 2e834e6ded..df15deefca 100644
> --- a/include/hw/i386/pc.h
> +++ b/include/hw/i386/pc.h
> @@ -304,6 +304,14 @@ int e820_add_entry(uint64_t, uint64_t, uint32_t);
>  int e820_get_num_entries(void);
>  bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
>  
> +#define PC_COMPAT_2_12 \
> +    HW_COMPAT_2_12 \
> +    {\
> +        .driver   = TYPE_X86_CPU,\
> +        .property = "legacy-cache",\
> +        .value    = "on",\
> +    },

This isn't enough if the pc-*-2.12 machine-type isn't using the
macro.

Before we do this, we need a commit similar to commit
df47ce8af4a5, but adding pc-*-2.13 machine-types.

The rest of the patch looks good to me, but I will suggest a
clean up (that can be submitted a separate patch later, or
included in v9) in a separate reply.

-- 
Eduardo

  reply	other threads:[~2018-05-11 19:21 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-10 20:41 [Qemu-devel] [PATCH v8 0/8] i386: Enable TOPOEXT to support hyperthreading on AMD CPU Babu Moger
2018-05-10 20:41 ` [Qemu-devel] [PATCH v8 1/8] i386: Helpers to encode cache information consistently Babu Moger
2018-05-11 19:12   ` Eduardo Habkost
2018-07-16 13:20   ` Philippe Mathieu-Daudé
2018-07-16 19:52     ` Eduardo Habkost
2018-07-17 15:42       ` Philippe Mathieu-Daudé
2018-05-10 20:41 ` [Qemu-devel] [PATCH v8 2/8] i386: Add cache information in X86CPUDefinition Babu Moger
2018-05-10 20:41 ` [Qemu-devel] [PATCH v8 3/8] i386: Add new property to control cache info Babu Moger
2018-05-11 19:21   ` Eduardo Habkost [this message]
2018-05-11 20:21     ` Moger, Babu
2018-05-11 20:40       ` Eduardo Habkost
2018-05-11 20:47       ` Eduardo Habkost
2018-05-14 16:44         ` Moger, Babu
2018-05-10 20:41 ` [Qemu-devel] [PATCH v8 4/8] i386: Initialize cache information for EPYC family processors Babu Moger
2018-05-10 20:41 ` [Qemu-devel] [PATCH v8 5/8] i386: Populate AMD Processor Cache Information for cpuid 0x8000001D Babu Moger
2018-05-10 20:41 ` [Qemu-devel] [PATCH v8 6/8] i386: Add support for CPUID_8000_001E for AMD Babu Moger
2018-05-10 20:41 ` [Qemu-devel] [PATCH v8 7/8] i386: Enable TOPOEXT feature on AMD EPYC CPU Babu Moger
2018-05-11 20:46   ` Eduardo Habkost
2018-05-11 22:16     ` Moger, Babu
2018-05-10 20:41 ` [Qemu-devel] [PATCH v8 8/8] i386: Remove generic SMT thread check Babu Moger

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