From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33577) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fHIdU-0004ww-FD for qemu-devel@nongnu.org; Fri, 11 May 2018 20:43:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fHIdT-0002zP-Cn for qemu-devel@nongnu.org; Fri, 11 May 2018 20:43:44 -0400 Received: from mail-pf0-x243.google.com ([2607:f8b0:400e:c00::243]:39876) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fHIdT-0002zC-6f for qemu-devel@nongnu.org; Fri, 11 May 2018 20:43:43 -0400 Received: by mail-pf0-x243.google.com with SMTP id a22-v6so3433253pfn.6 for ; Fri, 11 May 2018 17:43:43 -0700 (PDT) From: Richard Henderson Date: Fri, 11 May 2018 17:43:04 -0700 Message-Id: <20180512004311.9299-21-richard.henderson@linaro.org> In-Reply-To: <20180512004311.9299-1-richard.henderson@linaro.org> References: <20180512004311.9299-1-richard.henderson@linaro.org> Subject: [Qemu-devel] [PATCH v2 20/27] target/riscv: Remove floatX_maybe_silence_nan from conversions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, alex.bennee@linaro.org, Michael Clark , Palmer Dabbelt , Sagar Karandikar , Bastian Koppelmann This is now handled properly by the generic softfloat code. Cc: Michael Clark Cc: Palmer Dabbelt Cc: Sagar Karandikar Cc: Bastian Koppelmann Signed-off-by: Richard Henderson --- target/riscv/fpu_helper.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/target/riscv/fpu_helper.c b/target/riscv/fpu_helper.c index abbadead5c..fdb87d8d82 100644 --- a/target/riscv/fpu_helper.c +++ b/target/riscv/fpu_helper.c @@ -279,14 +279,12 @@ uint64_t helper_fmax_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2) uint64_t helper_fcvt_s_d(CPURISCVState *env, uint64_t rs1) { - rs1 = float64_to_float32(rs1, &env->fp_status); - return float32_maybe_silence_nan(rs1, &env->fp_status); + return float64_to_float32(rs1, &env->fp_status); } uint64_t helper_fcvt_d_s(CPURISCVState *env, uint64_t rs1) { - rs1 = float32_to_float64(rs1, &env->fp_status); - return float64_maybe_silence_nan(rs1, &env->fp_status); + return float32_to_float64(rs1, &env->fp_status); } uint64_t helper_fsqrt_d(CPURISCVState *env, uint64_t frs1) -- 2.17.0