From: Michael Walle <michael@walle.cc>
To: qemu-devel@nongnu.org
Cc: "Alex Bennée" <alex.bennee@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Michael Walle" <michael@walle.cc>,
qemu-stable@nongnu.org
Subject: [Qemu-devel] [PATCH 2/2] target/lm32: hold BQL in gdbstub
Date: Mon, 21 May 2018 13:52:52 +0200 [thread overview]
Message-ID: <20180521115252.10759-3-michael@walle.cc> (raw)
In-Reply-To: <20180521115252.10759-1-michael@walle.cc>
Changing the IP/IM registers may cause interrupts, so hold the BQL.
Cc: qemu-stable@nongnu.org
Signed-off-by: Michael Walle <michael@walle.cc>
---
target/lm32/gdbstub.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/target/lm32/gdbstub.c b/target/lm32/gdbstub.c
index cf929dd392..2cdeef8f5e 100644
--- a/target/lm32/gdbstub.c
+++ b/target/lm32/gdbstub.c
@@ -82,10 +82,14 @@ int lm32_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
env->ie = tmp;
break;
case 37:
+ qemu_mutex_lock_iothread();
lm32_pic_set_im(env->pic_state, tmp);
+ qemu_mutex_unlock_iothread();
break;
case 38:
+ qemu_mutex_lock_iothread();
lm32_pic_set_ip(env->pic_state, tmp);
+ qemu_mutex_unlock_iothread();
break;
}
}
--
2.11.0
prev parent reply other threads:[~2018-05-21 11:53 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-21 11:52 [Qemu-devel] [PATCH 0/2] BQL patches for the lm32 target Michael Walle
2018-05-21 11:52 ` [Qemu-devel] [PATCH 1/2] lm32: take BQL before writing IP/IM register Michael Walle
2018-05-21 11:52 ` Michael Walle [this message]
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