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From: Peter Xu <peterx@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm <qemu-arm@nongnu.org>,
	"QEMU Developers" <qemu-devel@nongnu.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Richard Henderson" <rth@twiddle.net>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"patches@linaro.org" <patches@linaro.org>,
	"David Gibson" <david@gibson.dropbear.id.au>,
	"Alex Williamson" <alex.williamson@redhat.com>
Subject: Re: [Qemu-devel] [PATCH 14/27] iommu: Add IOMMU index concept to IOMMU API
Date: Thu, 24 May 2018 14:23:52 +0800	[thread overview]
Message-ID: <20180524062352.GA12122@xz-mi> (raw)
In-Reply-To: <CAFEAcA840qn7Ms9hph9zzZgMbL8C7kN=cs4esGO9kxGXsgBg1A@mail.gmail.com>

On Wed, May 23, 2018 at 12:47:16PM +0100, Peter Maydell wrote:
> On 23 May 2018 at 02:06, Peter Xu <peterx@redhat.com> wrote:
> > On Tue, May 22, 2018 at 12:11:38PM +0100, Peter Maydell wrote:
> >> On 22 May 2018 at 12:02, Peter Xu <peterx@redhat.com> wrote:
> >> > On Tue, May 22, 2018 at 09:40:44AM +0100, Peter Maydell wrote:
> 
> >> > And if we see current implementation for this (still, I copied code
> >> > from other patch in the series to here to ease discussion):
> >> >
> >> > @@ -498,8 +498,15 @@ static MemoryRegionSection address_space_translate_iommu(IOMMUMemoryRegion *iomm
> >> >      do {
> >> >          hwaddr addr = *xlat;
> >> >          IOMMUMemoryRegionClass *imrc = memory_region_get_iommu_class_nocheck(iommu_mr);
> >> > -        IOMMUTLBEntry iotlb = imrc->translate(iommu_mr, addr, is_write ?
> >> > -                                              IOMMU_WO : IOMMU_RO);
> >> > +        int iommu_idx = 0;
> >> > +        IOMMUTLBEntry iotlb;
> >> > +
> >> > +        if (imrc->attrs_to_index) {
> >> > +            iommu_idx = imrc->attrs_to_index(iommu_mr, attrs);
> >> > +        }
> >> > +
> >> > +        iotlb = imrc->translate(iommu_mr, addr, is_write ?
> >> > +                                IOMMU_WO : IOMMU_RO, iommu_idx);
> >> >
> >> > Here what if we pass attrs directly into imrc->translate() and just
> >> > call imrc->attrs_to_index() inside the arch-dependent translate()
> >> > function?  Will that work too?
> >>
> >> You don't always have the attributes at the point where you want
> >> to call translate. (For instance, memory_region_notify_iommu()
> >> doesn't have attributes.)
> >>
> >> I started off with "pass the tx attrs into the translate method",
> >> which is fine for the code flows which are actually doing
> >> memory transactions, but breaks down when you try to incorporate
> >> notifiers.
> >
> > Could you elaborate a bit more on why IOMMU notifier failed to
> > corporate when passing in MemTxAttrs?  I am not sure I caught the idea
> > here, but can we copy the MemTxAttrs into IOMMUTLBEntry when
> > translating, then in IOMMU notifiers we can know the attrs (if that is
> > what MPC wants)?
> 
> (1) The notifier API lets you register a notifier before you've
> called the translate API

Yes.

> (2) An IOMMUTLBEntry can be valid for more than just the txattrs
> that it was passed in (for instance, if an IOMMU doesn't care
> about txattrs at all, then the resulting TLB entry is valid for
> any txattrs; or if the IOMMU only cares about attrs.secure the
> resulting TLB entries are valid for both attrs.user=0 and
> attrs.user=1).

[1]

Yes exactly, that's why I thought copying the txattrs into IOTLB
should work.

> (3) when the IOMMU calls the notifier because the guest config
> changed it doesn't have tx attributes, so it would have to
> fabricate some; and the guest config will invalidate transactions
> with some combinations of tx attributes and not others.

IMHO it doesn't directly matter with what we are discussing now.  That
IOMMU_NOTIFIER_[UN]MAP flag tells what kind of message would the
notifier be interested in from "what kind of mapping it is".  IMHO
it's not really related to some other attributes when translation
happens - in our case, it does not directly related to what txattrs
value is.  Here as mentioned at [1] above IMHO we can still check this
against txattrs in the notifier handler, then we ignore messages that
we don't care about.  Actually the IOMMU_NOTIFIER_[UN]MAP flags can be
removed and we can just do similar things (e.g., we can skip MAP
messages if we only care about UNMAP messages), but since it's a
general concept and easy to be generalized, so we provided these
MAP/UNMAP flags to ease the notifier hooks.

In other words, I think we can also add more flags for SECURE or not.
However I still don't see a reason (from above three points) on why we
can't pass in txattrs directly into translate(), and at the same time
we copy the txattrs into IOTLB so that IOMMUTLBEntry can contain some
context information. [2]

> 
> As Paolo pointed out you could also implement this by rather
> of having an iommu_index concept, instead having some kind
> of "here is a mask of which txattrs fields matter, and here's
> another parameter with which txattrs fields are affected".
> That makes it awkward though to implement "txattrs.unspecified
> acts like txattrs.secure == 1" type behaviour, though, which is
> easy with an index abstraction layer. It also would be harder
> to implement the default 'replay' method, I think.

Please refer to my above comment at [2] - I am still confused on why
we must use this iommu_idx concept.  How about we just introduce
IOMMU_NOTIFIER_SECURE (or something similar) and let TCG code register
with that?  Though for the rest of notifiers we'll need to touch up
too to make sure all existing notifiers will still receive all the
message, no matter whether it's secure or not.

I'd also appreciate if you could paste me the link for Paolo's
message, since I cannot find it.

> 
> Plus I think that handling this the same way TCG does is a
> reasonable approach -- we know that it's a usefully flexible
> concept.
> 
> >> > I had a quick glance at the series, I have no thorough idea on the
> >> > whole stuff, but I'd say some of the patches are exactly what I wanted
> >> > if to support MemTxAttrs in VT-d emulation one day (now DMAR of VT-d
> >> > is bypassing MemTxAttrs and IMHO that's incorrect).  If we can somehow
> >> > pass in the MemTxAttrs then that'll be perfect and I can continue to
> >> > work on that.  If we pass in iommu_idx now instead, it would take some
> >> > time for me to figure out how to further achieve the same goal for
> >> > VT-d in the future, e.g., I would still want to pass in MemTxAttrs,
> >> > but that's obviously duplicated with iommu_idx.
> >>
> >> The idea is that you should never need to pass in the MemTxAttrs,
> >> because everything that the IOMMU might care about in the tx attrs
> >> must be encoded into the iommu index. (The point where the IOMMU
> >> gets to do that encoding is in its attrs_to_index() method.)
> >
> > For the DMAR issue I would care about MemTxAttrs.requester_id.  Just
> > to confirm - do you mean I encode the 16bits field into iommu_idx too,
> > or is there any smarter way to do so?  Asked since otherwise iommu_idx
> > will gradually grow into another MemTxAttrs to me.
> 
> It will only need to do so for IOMMUs that care about that field.
> 
> (See also the other thread with Eric Auger talking about
> maybe caring about requester_id like that. Needing to look
> at requester_id is an area I haven't thought too much about,
> and it is a bit of an odd one because it's a much larger
> space than any of the other parts of the txattrs. In some
> cases it ought to be possible to say "requester_id lets
> us determine an iommu index, and there are a lot fewer
> than 2^16 actual iommu indexes because a lot of the requestor_id
> values indicate the same actual iommu translation", I suspect.)

AFAIK requester_id will only be the same in very rare cases, for
example, when multiple PCI devices (no matter whether it's PCI or
PCIe) are under the same PCIe-to-PCI bridge, then all these devices
will use the bridge's requester ID as their own.  In most cases, each
PCIe device will have their own unique requester ID.  So it'll be
common that requester ID number can be at least equal to the number of
devices.

Thanks,

-- 
Peter Xu

  reply	other threads:[~2018-05-24  6:24 UTC|newest]

Thread overview: 114+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-21 14:03 [Qemu-devel] [PATCH 00/27] iommu: support txattrs, support TCG execution, implement TZ MPC Peter Maydell
2018-05-21 14:03 ` [Qemu-devel] [PATCH 01/27] memory.h: Improve IOMMU related documentation Peter Maydell
2018-05-21 19:46   ` Richard Henderson
2018-05-22  9:16   ` Alex Bennée
2018-05-22 11:40   ` Auger Eric
2018-05-21 14:03 ` [Qemu-devel] [PATCH 02/27] Make tb_invalidate_phys_addr() take a MemTxAttrs argument Peter Maydell
2018-05-21 23:54   ` Richard Henderson
2018-05-22  9:21   ` Alex Bennée
2018-05-21 14:03 ` [Qemu-devel] [PATCH 03/27] Make address_space_translate{, _cached}() " Peter Maydell
2018-05-22 10:49   ` Alex Bennée
2018-05-22 16:12   ` Richard Henderson
2018-05-21 14:03 ` [Qemu-devel] [PATCH 04/27] Make address_space_map() " Peter Maydell
2018-05-22 10:49   ` Alex Bennée
2018-05-22 16:13   ` Richard Henderson
2018-05-21 14:03 ` [Qemu-devel] [PATCH 05/27] Make address_space_access_valid() " Peter Maydell
2018-05-22 10:50   ` Alex Bennée
2018-05-22 16:14   ` Richard Henderson
2018-05-21 14:03 ` [Qemu-devel] [PATCH 06/27] Make flatview_extend_translation() " Peter Maydell
2018-05-22 10:56   ` Alex Bennée
2018-05-22 16:15   ` Richard Henderson
2018-05-21 14:03 ` [Qemu-devel] [PATCH 07/27] Make memory_region_access_valid() " Peter Maydell
2018-05-22 10:57   ` Alex Bennée
2018-05-22 16:17   ` Richard Henderson
2018-05-21 14:03 ` [Qemu-devel] [PATCH 08/27] Make MemoryRegion valid.accepts callback " Peter Maydell
2018-05-22 10:58   ` Alex Bennée
2018-05-22 16:20   ` Richard Henderson
2018-05-21 14:03 ` [Qemu-devel] [PATCH 09/27] Make flatview_access_valid() " Peter Maydell
2018-05-22 10:58   ` Alex Bennée
2018-05-22 16:33   ` Richard Henderson
2018-05-22 16:37     ` Peter Maydell
2018-05-21 14:03 ` [Qemu-devel] [PATCH 10/27] Make flatview_translate() " Peter Maydell
2018-05-22 10:58   ` Alex Bennée
2018-05-22 16:33   ` Richard Henderson
2018-05-21 14:03 ` [Qemu-devel] [PATCH 11/27] Make address_space_get_iotlb_entry() " Peter Maydell
2018-05-22 11:00   ` Alex Bennée
2018-05-22 17:29   ` Richard Henderson
2018-05-21 14:03 ` [Qemu-devel] [PATCH 12/27] Make flatview_do_translate() " Peter Maydell
2018-05-22 11:00   ` Alex Bennée
2018-05-22 17:29   ` Richard Henderson
2018-05-21 14:03 ` [Qemu-devel] [PATCH 13/27] Make address_space_translate_iommu " Peter Maydell
2018-05-22 11:00   ` Alex Bennée
2018-05-22 17:30   ` Richard Henderson
2018-05-21 14:03 ` [Qemu-devel] [PATCH 14/27] iommu: Add IOMMU index concept to IOMMU API Peter Maydell
2018-05-22  3:03   ` Peter Xu
2018-05-22  8:40     ` Peter Maydell
2018-05-22 11:02       ` Peter Xu
2018-05-22 11:11         ` Peter Maydell
2018-05-23  1:06           ` Peter Xu
2018-05-23 11:47             ` Peter Maydell
2018-05-24  6:23               ` Peter Xu [this message]
2018-05-24 10:54                 ` Peter Maydell
2018-05-25  2:50                   ` Peter Xu
2018-05-25  9:27                   ` Auger Eric
2018-05-25  9:34                     ` Peter Maydell
2018-05-22 12:58   ` Auger Eric
2018-05-22 13:22     ` Peter Maydell
2018-05-22 14:11       ` Auger Eric
2018-05-22 14:19         ` Peter Maydell
2018-05-22 14:22           ` Auger Eric
2018-05-22 17:42   ` Richard Henderson
2018-05-22 17:51     ` Peter Maydell
2018-05-22 17:52       ` Richard Henderson
2018-05-21 14:03 ` [Qemu-devel] [PATCH 15/27] iommu: Add IOMMU index argument to notifier APIs Peter Maydell
2018-05-22 17:45   ` Richard Henderson
2018-05-23  9:08   ` Alex Bennée
2018-06-04 13:03     ` Peter Maydell
2018-06-04 15:09       ` Alex Bennée
2018-06-04 15:23         ` Peter Maydell
2018-05-24 15:29   ` Auger Eric
2018-05-24 17:03     ` Peter Maydell
2018-05-24 19:13       ` Auger Eric
2018-05-21 14:03 ` [Qemu-devel] [PATCH 16/27] iommu: Add IOMMU index argument to translate method Peter Maydell
2018-05-22 18:06   ` Richard Henderson
2018-05-23  9:11   ` Alex Bennée
2018-05-21 14:03 ` [Qemu-devel] [PATCH 17/27] exec.c: Handle IOMMUs in address_space_translate_for_iotlb() Peter Maydell
2018-05-23  9:51   ` Alex Bennée
2018-05-23 11:52     ` Peter Maydell
2018-05-24 19:54     ` Auger Eric
2018-05-25  8:52       ` Peter Maydell
2018-05-25  9:50         ` Auger Eric
2018-05-25  9:59           ` Peter Maydell
2018-05-21 14:03 ` [Qemu-devel] [PATCH 18/27] hw/misc/tz-mpc.c: Implement the Arm TrustZone Memory Protection Controller Peter Maydell
2018-05-22 11:30   ` Auger Eric
2018-05-22 11:56     ` Peter Maydell
2018-05-22 12:23       ` Auger Eric
2018-05-23 10:41   ` Alex Bennée
2018-05-21 14:03 ` [Qemu-devel] [PATCH 19/27] hw/misc/tz-mpc.c: Implement registers Peter Maydell
2018-05-23 10:44   ` Alex Bennée
2018-05-21 14:03 ` [Qemu-devel] [PATCH 20/27] hw/misc/tz-mpc.c: Implement correct blocked-access behaviour Peter Maydell
2018-05-23 10:49   ` Alex Bennée
2018-05-23 11:54     ` Peter Maydell
2018-05-21 14:03 ` [Qemu-devel] [PATCH 21/27] hw/misc/tz_mpc.c: Honour the BLK_LUT settings in translate Peter Maydell
2018-05-21 14:03 ` [Qemu-devel] [PATCH 22/27] vmstate.h: Provide VMSTATE_BOOL_SUB_ARRAY Peter Maydell
2018-05-23 11:01   ` Alex Bennée
2018-05-21 14:03 ` [Qemu-devel] [PATCH 23/27] hw/core/or-irq: Support more than 16 inputs to an OR gate Peter Maydell
2018-05-21 14:34   ` Paolo Bonzini
2018-05-21 15:02     ` Peter Maydell
2018-05-30 16:59       ` Paolo Bonzini
2018-05-30 17:35         ` Peter Maydell
2018-05-31 10:21           ` Paolo Bonzini
2018-05-31 10:50             ` Peter Maydell
2018-05-31 11:50               ` Paolo Bonzini
2018-05-31 11:59                 ` Peter Maydell
2018-05-21 14:03 ` [Qemu-devel] [PATCH 24/27] hw/misc/iotkit-secctl.c: Implement SECMPCINTSTATUS Peter Maydell
2018-05-21 14:04 ` [Qemu-devel] [PATCH 25/27] hw/arm/iotkit: Instantiate MPC Peter Maydell
2018-05-23 11:38   ` Alex Bennée
2018-05-21 14:04 ` [Qemu-devel] [PATCH 26/27] hw/arm/iotkit: Wire up MPC interrupt lines Peter Maydell
2018-05-23 11:39   ` Alex Bennée
2018-05-21 14:04 ` [Qemu-devel] [PATCH 27/27] hw/arm/mps2-tz.c: Instantiate MPCs Peter Maydell
2018-05-23 11:41   ` Alex Bennée
2018-05-21 15:10 ` [Qemu-devel] [PATCH 00/27] iommu: support txattrs, support TCG execution, implement TZ MPC no-reply
2018-05-30 16:58 ` Paolo Bonzini
2018-05-31  9:54   ` Peter Maydell
2018-05-31 13:37     ` Peter Maydell

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