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Date: Fri, 1 Jun 2018 13:22:43 +0100
From: Stefan Hajnoczi <stefanha@gmail.com>
Message-ID: <20180601122243.GN8687@stefanha-x1.localdomain>
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Subject: Re: [Qemu-devel] Cortex M0 emulation tasks
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To: Peter Maydell <peter.maydell@linaro.org>
Cc: Julia Suvorova <jusual@mail.ru>, Joel Stanley <joel@jms.id.au>, Steffen =?iso-8859-1?Q?G=F6rtz?= <mail@steffen-goertz.de>, Jim Mussared <jim@groklearning.com>, qemu-devel <qemu-devel@nongnu.org>


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On Tue, May 29, 2018 at 07:09:20PM +0100, Peter Maydell wrote:
> On 28 May 2018 at 15:26, Stefan Hajnoczi <stefanha@gmail.com> wrote:
> > Hi,
> > I took a look at what's required for ARM Cortex M0 emulation that we
> > need for the micro:bit ARM board.  The following notes are based on
> > Appendix D3 of the ARMv6-M Architecture Reference Manual that Peter
> > Maydell recommended.
> >
> > Several people can work on this since there are many smaller tasks.
> >
> > The general approach for each task:
> > 1. Look at Appendix D3 to understand the architecture differences.
> > 2. Look at QEMU source code (mainly target/arm/translate.c) to
> > understand the current status.
>=20
> Rough guide to where things are:

Thanks for the info, that was very helpful.

Stefan

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Content-Type: application/pgp-signature; name="signature.asc"

-----BEGIN PGP SIGNATURE-----

iQEcBAEBAgAGBQJbETqTAAoJEJykq7OBq3PIfsIH/0h5uxckwQ4wg1iviANgpDMY
/5eIMga89BGKGDSuW1UbRSZIVComWVFHcR7qJhp+uxWhXxnVb6zjeSKopMZvNUGA
0FLfJ6mflalS1Fp0hxOBjM+jyqkfNfLz5eTFTN8CuCE78s9QOk7bIMMPYNuF3Jw1
2a0EmMd49AZZF4etxj6vQH1WfeTq9wUkadJPLW/CJwfhRl+CTC2Ml4iRJ36uKAjd
hXSsmKAEq2ZW8csEOp6KGUDDAZPNoYUiBA0HtYAtzAlaGWDuwe90rMcjb1eYlrnl
wHTDhu7LXDMcn18PL0OpWXzdFMRzgojsjGkMIwjh4VOTRLjScrKdqvzdpFXH8/A=
=TT44
-----END PGP SIGNATURE-----

--dPW7zu3hTOhZvCDO--