From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34233) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fOizH-0008VX-Q9 for qemu-devel@nongnu.org; Fri, 01 Jun 2018 08:16:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fOizE-00044J-FH for qemu-devel@nongnu.org; Fri, 01 Jun 2018 08:16:55 -0400 Received: from 17.mo1.mail-out.ovh.net ([87.98.179.142]:35409) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fOizE-0003xE-8O for qemu-devel@nongnu.org; Fri, 01 Jun 2018 08:16:52 -0400 Received: from player699.ha.ovh.net (unknown [10.109.122.50]) by mo1.mail-out.ovh.net (Postfix) with ESMTP id 4094E1019F6 for ; Fri, 1 Jun 2018 14:16:41 +0200 (CEST) Date: Fri, 1 Jun 2018 14:16:23 +0200 From: Greg Kurz Message-ID: <20180601141623.78682c23@bahia.lan> In-Reply-To: <20180531130429.24911-1-joel@jms.id.au> References: <20180531130429.24911-1-joel@jms.id.au> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v2] target/ppc: Allow privileged access to SPR_PCR List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Joel Stanley Cc: David Gibson , Alexander Graf , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, =?UTF-8?B?Q8OpZHJpYw==?= Le Goater , Benjamin Herrenschmidt , Michael Ellerman , Michael Neuling On Thu, 31 May 2018 22:34:29 +0930 Joel Stanley wrote: > The powerpc Linux kernel[1] and skiboot firmware[2] recently gained changes > that cause the Processor Compatibility Register (PCR) SPR to be cleared. > > These changes cause Linux to fail to boot on the Qemu powernv machine > with an error: > > Trying to write privileged spr 338 (0x152) at 0000000030017f0c > > With this patch Qemu makes this register available as a hypervisor > privileged register. > > Note that bits set in this register disable features of the processor. > Currently the only register state that is supported is when the register > is zeroed (enable all features). This is sufficient for guests to > once again boot. > > [1] https://lkml.kernel.org/r/20180518013742.24095-1-mikey@neuling.org > [2] https://patchwork.ozlabs.org/patch/915932/ > > Signed-off-by: Joel Stanley > --- > v2: > - Change error message to say Invalid instead of Unimplemented > - Fix compile warning on other powerpc targets, thanks patchew > --- Reviewed-by: Greg Kurz > target/ppc/helper.h | 1 + > target/ppc/misc_helper.c | 10 ++++++++++ > target/ppc/translate_init.inc.c | 9 +++++++-- > 3 files changed, 18 insertions(+), 2 deletions(-) > > diff --git a/target/ppc/helper.h b/target/ppc/helper.h > index 19453c68138a..d751f0e21909 100644 > --- a/target/ppc/helper.h > +++ b/target/ppc/helper.h > @@ -17,6 +17,7 @@ DEF_HELPER_2(pminsn, void, env, i32) > DEF_HELPER_1(rfid, void, env) > DEF_HELPER_1(hrfid, void, env) > DEF_HELPER_2(store_lpcr, void, env, tl) > +DEF_HELPER_2(store_pcr, void, env, tl) > #endif > DEF_HELPER_1(check_tlb_flush_local, void, env) > DEF_HELPER_1(check_tlb_flush_global, void, env) > diff --git a/target/ppc/misc_helper.c b/target/ppc/misc_helper.c > index 8c8cba5cc6f1..1870f4c47f1a 100644 > --- a/target/ppc/misc_helper.c > +++ b/target/ppc/misc_helper.c > @@ -20,6 +20,7 @@ > #include "cpu.h" > #include "exec/exec-all.h" > #include "exec/helper-proto.h" > +#include "qemu/error-report.h" > > #include "helper_regs.h" > > @@ -98,6 +99,15 @@ void helper_store_ptcr(CPUPPCState *env, target_ulong val) > tlb_flush(CPU(cpu)); > } > } > + > +void helper_store_pcr(CPUPPCState *env, target_ulong value) > +{ > + if (value != 0) { > + error_report("Invalid PCR value 0x"TARGET_FMT_lx, value); > + return; > + } > + env->spr[SPR_PCR] = value; > +} > #endif /* defined(TARGET_PPC64) */ > > void helper_store_pidr(CPUPPCState *env, target_ulong val) > diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c > index ab782cb32aaa..1a89017ddea8 100644 > --- a/target/ppc/translate_init.inc.c > +++ b/target/ppc/translate_init.inc.c > @@ -424,6 +424,10 @@ static void spr_write_ptcr(DisasContext *ctx, int sprn, int gprn) > gen_helper_store_ptcr(cpu_env, cpu_gpr[gprn]); > } > > +static void spr_write_pcr(DisasContext *ctx, int sprn, int gprn) > +{ > + gen_helper_store_pcr(cpu_env, cpu_gpr[gprn]); > +} > #endif > #endif > > @@ -7957,11 +7961,12 @@ static void gen_spr_power6_common(CPUPPCState *env) > #endif > /* > * Register PCR to report POWERPC_EXCP_PRIV_REG instead of > - * POWERPC_EXCP_INVAL_SPR. > + * POWERPC_EXCP_INVAL_SPR in userspace. Permit hypervisor access. > */ > - spr_register(env, SPR_PCR, "PCR", > + spr_register_hv(env, SPR_PCR, "PCR", > SPR_NOACCESS, SPR_NOACCESS, > SPR_NOACCESS, SPR_NOACCESS, > + &spr_read_generic, &spr_write_pcr, > 0x00000000); > } >