From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
To: "Daniel P. Berrangé" <berrange@redhat.com>
Cc: pbonzini@redhat.com, rth@twiddle.net, qemu-devel@nongnu.org,
kvm@vger.kernel.org, ehabkost@redhat.com
Subject: Re: [Qemu-devel] [PATCH 1/2] i386: define the AMD 'amd-ssbd' CPUID feature bit
Date: Mon, 4 Jun 2018 16:20:53 -0400 [thread overview]
Message-ID: <20180604202053.GG5867@char.us.oracle.com> (raw)
In-Reply-To: <20180604085440.GB19749@redhat.com>
On Mon, Jun 04, 2018 at 09:54:40AM +0100, Daniel P. Berrangé wrote:
> On Fri, Jun 01, 2018 at 11:38:08AM -0400, Konrad Rzeszutek Wilk wrote:
> > AMD future CPUs expose _two_ ways to utilize the Intel equivalant
> > of the Speculative Store Bypass Disable. The first is via
> > the virtualized VIRT_SPEC CTRL MSR (0xC001_011f) and the second
> > is via the SPEC_CTRL MSR (0x48). The document titled:
> > 124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf
> >
> > gives priority of SPEC CTRL MSR over the VIRT SPEC CTRL MSR.
> >
> > A copy of this document is available at
> > https://bugzilla.kernel.org/show_bug.cgi?id=199889
> >
> > Anyhow, this means that on future AMD CPUs there will be _two_ ways to
> > deal with SSBD.
>
> Oh what fun ;-)
>
> Unless I'm mistaken the current Linux kernel doesn't know about these
> new amd-ssbd / amd-no-ssb flags either. Will you also be sending patches
> for that half of the problem ?
I sent them as well. But forgot to CC qemu-devel :-(
next prev parent reply other threads:[~2018-06-04 20:21 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20180601145921.9500-1-konrad.wilk@oracle.com>
2018-06-01 15:38 ` [Qemu-devel] [PATCH QEMU] Patches for new AMD CPU bits Konrad Rzeszutek Wilk
2018-06-01 15:38 ` [Qemu-devel] [PATCH 1/2] i386: define the AMD 'amd-ssbd' CPUID feature bit Konrad Rzeszutek Wilk
2018-06-04 8:54 ` Daniel P. Berrangé
2018-06-04 20:20 ` Konrad Rzeszutek Wilk [this message]
2018-06-04 20:07 ` Eduardo Habkost
2018-06-04 20:22 ` Konrad Rzeszutek Wilk
2018-06-04 21:15 ` Eduardo Habkost
2018-06-05 21:40 ` Konrad Rzeszutek Wilk
2018-06-13 10:19 ` Daniel P. Berrangé
2018-06-13 16:09 ` Konrad Rzeszutek Wilk
2018-06-13 16:21 ` Daniel P. Berrangé
2018-06-13 16:34 ` Konrad Rzeszutek Wilk
2018-06-13 16:39 ` Daniel P. Berrangé
2018-06-13 16:56 ` Eduardo Habkost
2018-06-05 13:31 ` Tom Lendacky
2018-06-05 14:04 ` Daniel P. Berrangé
2018-06-06 14:20 ` Daniel P. Berrangé
2018-06-08 21:22 ` Tom Lendacky
2018-06-01 15:38 ` [Qemu-devel] [PATCH 2/2] i386: Define AMD's no SSB mitigation needed Konrad Rzeszutek Wilk
2018-06-13 21:38 ` [Qemu-devel] [PATCH QEMU] Patches for new AMD CPU bits Eduardo Habkost
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