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From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
To: Eduardo Habkost <ehabkost@redhat.com>
Cc: kvm@vger.kernel.org, qemu-devel@nongnu.org, pbonzini@redhat.com,
	rth@twiddle.net
Subject: Re: [Qemu-devel] [PATCH 1/2] i386: define the AMD 'amd-ssbd' CPUID feature bit
Date: Mon, 4 Jun 2018 16:22:05 -0400	[thread overview]
Message-ID: <20180604202205.GH5867@char.us.oracle.com> (raw)
In-Reply-To: <20180604200701.GB3184@localhost.localdomain>

On Mon, Jun 04, 2018 at 05:07:01PM -0300, Eduardo Habkost wrote:
> On Fri, Jun 01, 2018 at 11:38:08AM -0400, Konrad Rzeszutek Wilk wrote:
> > AMD future CPUs expose _two_ ways to utilize the Intel equivalant
> > of the Speculative Store Bypass Disable. The first is via
> > the virtualized VIRT_SPEC CTRL MSR (0xC001_011f) and the second
> > is via the SPEC_CTRL MSR (0x48). The document titled:
> > 124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf
> > 
> > gives priority of SPEC CTRL MSR over the VIRT SPEC CTRL MSR.
> > 
> > A copy of this document is available at
> >       https://bugzilla.kernel.org/show_bug.cgi?id=199889
> > 
> > Anyhow, this means that on future AMD CPUs there will be  _two_ ways to
> > deal with SSBD.
> 
> Does anybody know if there are AMD CPUs where virt-ssbd won't
> work and would require amd-ssbd to mitigate vulnerabilities?
> 
> Also, do we have kernel arch/x86/kvm/cpuid.c patches, already?

Not yet. They are being discussed right now. I figured I would send
these patches out as a 'Hey, coming at you!', but failed to change
the title to be 'RFC'.

> I prefer to add new CPUID flag names only after the flag name is
> already agreed upon on the kernel side.

Of course. I will respin once that discussion has calmed down.

> 
> 
> > 
> > Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
> > ---
> >  target/i386/cpu.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> > index 52d334a..f91990c 100644
> > --- a/target/i386/cpu.c
> > +++ b/target/i386/cpu.c
> > @@ -490,7 +490,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
> >              "ibpb", NULL, NULL, NULL,
> >              NULL, NULL, NULL, NULL,
> >              NULL, NULL, NULL, NULL,
> > -            NULL, "virt-ssbd", NULL, NULL,
> > +            "amd-ssbd", "virt-ssbd", NULL, NULL,
> >              NULL, NULL, NULL, NULL,
> >          },
> >          .cpuid_eax = 0x80000008,
> > -- 
> > 1.8.3.1
> > 
> > 
> 
> -- 
> Eduardo

  reply	other threads:[~2018-06-04 20:22 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20180601145921.9500-1-konrad.wilk@oracle.com>
2018-06-01 15:38 ` [Qemu-devel] [PATCH QEMU] Patches for new AMD CPU bits Konrad Rzeszutek Wilk
2018-06-01 15:38   ` [Qemu-devel] [PATCH 1/2] i386: define the AMD 'amd-ssbd' CPUID feature bit Konrad Rzeszutek Wilk
2018-06-04  8:54     ` Daniel P. Berrangé
2018-06-04 20:20       ` Konrad Rzeszutek Wilk
2018-06-04 20:07     ` Eduardo Habkost
2018-06-04 20:22       ` Konrad Rzeszutek Wilk [this message]
2018-06-04 21:15         ` Eduardo Habkost
2018-06-05 21:40           ` Konrad Rzeszutek Wilk
2018-06-13 10:19         ` Daniel P. Berrangé
2018-06-13 16:09           ` Konrad Rzeszutek Wilk
2018-06-13 16:21             ` Daniel P. Berrangé
2018-06-13 16:34               ` Konrad Rzeszutek Wilk
2018-06-13 16:39                 ` Daniel P. Berrangé
2018-06-13 16:56                   ` Eduardo Habkost
2018-06-05 13:31       ` Tom Lendacky
2018-06-05 14:04         ` Daniel P. Berrangé
2018-06-06 14:20         ` Daniel P. Berrangé
2018-06-08 21:22           ` Tom Lendacky
2018-06-01 15:38   ` [Qemu-devel] [PATCH 2/2] i386: Define AMD's no SSB mitigation needed Konrad Rzeszutek Wilk
2018-06-13 21:38   ` [Qemu-devel] [PATCH QEMU] Patches for new AMD CPU bits Eduardo Habkost

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